Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
  • H04L47/18—End to end
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F15/00—Digital computers in general; Data processing equipment in general
  • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
  • G06F15/163—Interprocessor communication
  • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
  • G06F15/17356—Indirect interconnection networks
  • G06F15/17368—Indirect interconnection networks non hierarchical topologies
  • G06F15/17375—One dimensional, e.g. linear array, ring
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
  • H04L12/46—Interconnection of networks
  • H04L12/4604—LAN interconnection over a backbone network, e.g. Internet, Frame Relay
  • H04L12/4608—LAN interconnection over ATM networks
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L12/5602—Bandwidth control in ATM Networks, e.g. leaky bucket
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
  • H04L47/11—Identifying congestion
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
  • H04L47/26—Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
  • H04L47/26—Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
  • H04L47/266—Stopping or restarting the source, e.g. X-on or X-off
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
  • H04L47/29—Flow control; Congestion control using a combination of thresholds
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/10—Flow control; Congestion control
  • H04L47/30—Flow control; Congestion control in combination with information about buffer occupancy at either end or at transit nodes
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L47/00—Traffic control in data switching networks
  • H04L47/50—Queue scheduling
  • H04L47/62—Queue scheduling characterised by scheduling criteria
  • H04L47/621—Individual queue per connection or flow, e.g. per VC
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/10—Packet switching elements characterised by the switching fabric construction
  • H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
  • H04L49/105—ATM switching elements
  • H04L49/106—ATM switching elements using space switching, e.g. crossbar or matrix
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/10—Packet switching elements characterised by the switching fabric construction
  • H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
  • H04L49/105—ATM switching elements
  • H04L49/107—ATM switching elements using shared medium
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/15—Interconnection of switching modules
  • H04L49/1515—Non-blocking multistage, e.g. Clos
  • H04L49/153—ATM switching fabrics having parallel switch planes
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/15—Interconnection of switching modules
  • H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/15—Interconnection of switching modules
  • H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
  • H04L49/1576—Crossbar or matrix
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/20—Support for services
  • H04L49/201—Multicast operation; Broadcast operation
  • H04L49/203—ATM switching fabrics with multicast or broadcast capabilities
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/25—Routing or path finding in a switch fabric
  • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/25—Routing or path finding in a switch fabric
  • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
  • H04L49/255—Control mechanisms for ATM switching fabrics
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/25—Routing or path finding in a switch fabric
  • H04L49/256—Routing or path finding in ATM switching fabrics
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/30—Peripheral units, e.g. input or output ports
  • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/30—Peripheral units, e.g. input or output ports
  • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
  • H04L49/309—Header conversion, routing tables or routing tags
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/45—Arrangements for providing or supporting expansion
  • H04L49/455—Provisions for supporting expansion in ATM switches
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/55—Prevention, detection or correction of errors
  • H04L49/552—Prevention, detection or correction of errors by ensuring the integrity of packets received through redundant connections
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L49/00—Packet switching elements
  • H04L49/55—Prevention, detection or correction of errors
  • H04L49/555—Error detection
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04Q—SELECTING
  • H04Q11/00—Selecting arrangements for multiplex systems
  • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
  • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
  • H04Q11/0478—Provisions for broadband connections
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/06—Synchronising arrangements
  • H04J3/0635—Clock or time synchronisation in a network
  • H04J3/0682—Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/06—Synchronising arrangements
  • H04J3/0635—Clock or time synchronisation in a network
  • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5614—User Network Interface
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5614—User Network Interface
  • H04L2012/5616—Terminal equipment, e.g. codecs, synch.
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5625—Operations, administration and maintenance [OAM]
  • H04L2012/5627—Fault tolerance and recovery
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5628—Testing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5629—Admission control
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5629—Admission control
  • H04L2012/5631—Resource management and allocation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5629—Admission control
  • H04L2012/5631—Resource management and allocation
  • H04L2012/5632—Bandwidth allocation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5629—Admission control
  • H04L2012/5631—Resource management and allocation
  • H04L2012/5632—Bandwidth allocation
  • H04L2012/5634—In-call negotiation
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5629—Admission control
  • H04L2012/5631—Resource management and allocation
  • H04L2012/5632—Bandwidth allocation
  • H04L2012/5635—Backpressure, e.g. for ABR
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/564—Connection-oriented
  • H04L2012/5642—Multicast/broadcast/point-multipoint, e.g. VOD
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/564—Connection-oriented
  • H04L2012/5643—Concast/multipoint-to-point
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
  • H04L2012/5647—Cell loss
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
  • H04L2012/5647—Cell loss
  • H04L2012/5648—Packet discarding, e.g. EPD, PTD
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
  • H04L2012/5649—Cell delay or jitter
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
  • H04L2012/5651—Priority, marking, classes
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
  • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
  • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5672—Multiplexing, e.g. coding, scrambling
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
  • H04L2012/5679—Arbitration or scheduling
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
  • H04L2012/5681—Buffer or queue management
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
  • H04L2012/5681—Buffer or queue management
  • H04L2012/5682—Threshold; Watermark
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
  • H04L2012/5681—Buffer or queue management
  • H04L2012/5683—Buffer or queue management for avoiding head of line blocking
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/54—Store-and-forward switching systems 
  • H04L12/56—Packet switching systems
  • H04L12/5601—Transfer mode dependent, e.g. ATM
  • H04L2012/5685—Addressing issues
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L7/00—Arrangements for synchronising receiver with transmitter
  • H04L7/04—Speed or phase control by synchronisation signals
  • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
  • H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence

Definitions

• This invention relates generally to networks and, more specifically, to management of link access by an asynchronous transfer mode switch.
• ATM networks such as asynchronous transfer mode (“ATM”) networks are used for transfer of audio, video and other data.
• ATM networks deliver data by routing data units such as ATM cells from source to destination through switches.
• Switches include input/output ("I/O") ports through which ATM cells are received and transmitted. The appropriate output port for transmission of the cell is determined based on the cell header.
• Such traffic types include the constant bit rate (“CBR”) service class, the variable bit rate (“VBR”) service class, the available bit rate (“ABR”) service class, and the unspecified bit rate (“UBR”) service class.
• CBR constant bit rate
• VBR variable bit rate
• ABR available bit rate
• URR unspecified bit rate
• Telecommunications network applications such as teleconferencing require deterministic delay bounds, and are typically assigned to the CBR service class.
• Transactions processing applications such as automated teller machines require a "tightly bounded" delay specification to provide acceptable response times.
• Such applications typically are assigned to the VBR service class.
• File transfer applications such as internetwork traffic merely require a "bounded" delay, and thus, typically employ the ABR service class.
• the UBR service class normally provides no delay bound.
• Bandwidth is another consideration in establishing an acceptable switch configuration. Video applications typically have a predictable bandwidth requirement, while file transfer applications are much more aperiodic, or "bursty" .
• High-delay and line utilization are opposing goals when multiplexing sources.
• High utilization is achieved by having a set of connections share bandwidth that is unused by connections that need very low delay. This shared bandwidth is known as dynamic bandwidth because it is distributed to connections based on instantaneous operating conditions.
• VBR, ABR and UBR utilize dynamic bandwidth to achieve high line utilization.
• the bandwidth used by connections that need very low delay is known as allocated bandwidth because it is dedicated to particular connections.
• One way of scheduling traffic of different types is to use a priority scheme, in which certain traffic types are given higher transfer priority than others.
• the problem with such a priority arrangement is that higher priority traffic can prevent the transmission of lower priority traffic with acceptable delays.
• the link scheduling permits delay requirements associated with different categories of transmission (i.e., scheduling categories) to be guaranteed.
• a plurality of queues are associated with and contend for access to each link supported by the switch.
• the queues contain pointers to cells to be transmitted over the link.
• Lists of queues associated with each link i.e., scheduling lists
• each link is associated with more than one type of list (with the list type corresponding to a scheduling category) and more than one prioritized list of each type (with the priority of the list corresponding to a quality of service) .
• the scheduling lists are accessed in a predetermined sequence in order to provide link access to the queue at the top of the respective list.
• the predetermined sequence with which the scheduling lists are accessed is a function of the scheduling category, priority of the list within the particular scheduling category and whether or not the respective bandwidth requirement (if any) for the scheduling category has been met.
• the bandwidth provided to the different scheduling categories over a predetermined interval is measured and compared to the respective bandwidth requirement. In this way, it is determined whether or not the respective bandwidth requirement for the scheduling category has been met.
• the switch includes at least one input port containing input queues of cells received from the network, at least one output port containing queues for buffering cells to be transmitted from the switch and a switch fabric for permitting transmission of the cells from an input queue to one or more output queues.
• Each output port has a memory associated therewith for storing the lists of queues containing cells to be transmitted over a link ⁇ upported by the port. In particular, a set of lists is stored for each link supported by the output port.
• Each set of lists includes lists of more than one type, corresponding to different scheduling categories (i.e., allocated, dynamic VBR, dynamic ABR and dynamic UBR) , and different priorities of lists within each scheduling category (i.e., corresponding to a particular quality of service) .
• the lists are accessed in a predetermined order according to the priority of the respective scheduling categories as compared to other scheduling categories, the priority of the list as compared to other lists within the particular scheduling category, and whether or not the bandwidth requirement (if any) for the respective scheduling category has been met.
• Each output port maintains a bandwidth table in memory for each output link supported by the port.
• the bandwidth table contains entries indicating the scheduling category associated with a predetermined number of prior cell transmissions. That is, each time a cell is transmitted, its scheduling category is entered into the bandwidth table for the link over which the cell was transmitted. Counters maintain a count of the number of bandwidth table entries of each scheduling category. The number of entries of a particular scheduling category is compared with the specified bandwidth requirement for that scheduling category in order to determine whether or not the bandwidth requirement has been met. This determination of whether or not the bandwidth requirement has been met is then used as one criteria for sequencing through the lists in order to provide the output queues with access to the respective link.
• Fig. 1 is a block diagram of a network switch
• Fig. 2 is a block diagram illustrating switch port scheduling and network link scheduling
• Fig. 3 illustrates the structure of a queue descriptor associated with an output queue of the switch of Fig. 1;
• Fig. ' 4 illustrates the scheduling lists and bandwidth measurement table associated with each link of a particular FSPP
• Fig. 5 illustrates the logical construction of a list
• Fig. 6 shows a bandwidth measurement table with illustrative entries
• Fig. 7 shows an implementation of three illustrative lists.
• the presently disclosed switch 10 includes a plurality of input ports 20, a plurality of output ports 22 and an NxN switch fabric 11, such as a cross point switch fabric, coupled between the input ports 20 and output ports 22.
• Each input port 20 includes a To Switch Port Processor (“TSPP”) ASIC 14 and each output port 22 includes a From Switch Port Processor (“FSPP”) ASIC 16.
• TSPP To Switch Port Processor
• FSPP From Switch Port Processor
• BA Bandwidth Arbiter
• each MTC 18 supports up to four TSPPs 14 or FSPPs 16.
• the switch fabric 11 includes a data crossbar 13 for data cell transport and the bandwidth arbiter 12 and MTCs 18 for control signal transport.
• the bandwidth arbiter 12 controls, inter alia, transport of data cells from a TSPP 14 to one or more FSPPs 16 through the data crossbar 13 (i.e., switch port scheduling) .
• Each FSPP 16 receives cells from the data crossbar 13 and schedules transmission of those cells onto network links 30 (i.e., link scheduling) .
• Each of the input ports 20 and output ports 22 includes a plurality of input buffers 26 and output buffers 28, respectively (Fig. 2) .
• the buffers 26, 28 are organized into a plurality of input queues 32a-m (referred to herein generally as input queues 32) and a plurality of output queues 34a-m (referred to herein generally as output queues 34) , respectively.
• each input port 20 includes a plurality of input queues 32 and each output port 22 includes a plurality of output queues 34, as shown.
• the input queues 32 are stored in a Control RAM and a Pointer RAM of the input port 20 and the output queues 34 are stored in a CRl RAM 61 and a CR2 RAM 63 of the output port 22.
• a data cell 24 enters the switch through an input port 20 and is enqueued on an input queue 32 at the respective TSPP 14. The cell is then transmitted from the input queue 32 to one or more output queues 34 via the data crossbar 13. Control signals are transmitted from a TSPP 14 to one or more FSPPs 16 via the respective MTC 18 and the bandwidth arbiter 12. In particular, data and control signals may be transmitted from an input queue 32 to a particular one of the output queues 34, in the case of a point to point connection 40. Alternatively, data and control signals may be transmitted from an input queue 32 to a selected set of output queues 34, in the case of a point to multipoint connection 42. From the output queue(s) 34, the data cell 24 is transmitted outside of the switch 10, for example, to another switch 29 via a network link 30.
• the bandwidth arbiter 12 contains a crossbar controller 15 which includes a probe crossbar, an XOFF crossbar and an XON crossbar, each of which is an NxN switch fabric.
• a request message, or probe control signal flows through the probe crossbar and is used to query whether or not sufficient space is available at the destination output queue, or queues 34 to enqueue a cell.
• the request message is considered a "forward" control signal since its direction is from a TSPP 14 to one or more FSPPs 16 (i.e., the same direction as data) .
• a two bit control signal flows in the reverse direction (from one or more FSPPs to a TSPP) through the XOFF crossbar and responds to the request message query by indicating whether or not the destination output queue, or queues 34 are presently capable of accepting data cells and thus, whether or not the transmitting TSPP can transmit cells via the data crossbar 13.
• the XOFF control signal indicates that the queried output queue(s) 34 are not presently capable of receiving data
• another reverse control signal which flows through the XON crossbar, notifies the transmitting TSPP once space becomes available at the destination output queue(s) 34.
• Each output port 22 contains four memories: a Control RAM 1 (“CRl RAM”) 61, a Control RAM 2 (“CR2 RAM”) 63, a Cell Buffer RAM 35, and a Quantum Flow Control RAM (“QFC RAM”) 67.
• the Cell Buffer RAM 35 is where the actual cells are buffered while they await transmission.
• the CRl RAM 61 and the CR2 RAM 63 contain the output queues 34, with each queue 34 containing pointers to cells in the Cell Buffer RAM 35 (i.e., the queues may be described generally as containing cells) .
• the CRl RAM 61 contains information required to implement scheduling lists used to schedule link access by the output queues 34 associated with each link 30 supported by the FSPP 16, as will be discussed.
• the QFC RAM 67 stores update information for transfer to another switch 29 via a network link 30. Update cells are generated in response to the update information provided by a TSPP 14 and specify whether the particular TSPP 14 is presently capable of accepting data cells.
• Each FSPP 16 supports N network links 30. In one example, the number N of network links 30 supported by each FSPP 16 is between one and eight.
• the FSPP 16 contains up to 16,384 output queues 34 associated with each of the supported links 30 with such output queues contending for access to the link.
• the process of giving the queues 34 associated with a particular link 30 access to transmit cells over the respective link 30 is referred to as "link scheduling". Link scheduling is performed by a control portion 52 of the FSPP 16 and, in particular, by an enqueue controller 54 and a dequeue controller 56.
• Cells may be transferred from output queues 34 to links 30 using bandwidth assigned specifically to such connections ("allocated bandwidth”) or using unallocated bandwidth or unused allocated bandwidth (“dynamic bandwidth”) .
• Dynamic bandwidth is further broken down to be shared among different service classes (i.e., the Variable Bit Rate “VBR” service class, the Available Bit Rate “ABR” service class, and the Unspecified Bit Rate “UBR” service class) .
• the different service classes are differentiated by delay and cell loss characteristics.
• the ABR service class guarantees a predetermined minimum transmission bandwidth rate (which can be expressed as a minimum percentage of the particular link 30) with no cell loss
• the VBR service class guarantees only a predetermined minimum transmission bandwidth rate
• the UBR service class has neither a minimum bandwidth rate nor a no cell loss guarantee.
• each scheduling category i.e., allocated, dynamic ABR, dynamic VBR and dynamic UBR
• priorities which correspond to a particular quality of service. In the illustrative embodiment, the priorities associated with each scheduling category are between zero and three, with zero being the highest priority.
• the scheduling category associated with a particular cell is determined from the header of a cell 24.
• An output queue 34 may contain either allocated cells, dynamic cells or both allocated and dynamic cells. However, a queue containing dynamic cells will contain dynamic cells associated with only one service class (i.e., VBR, ABR or UBR) .
• each output queue 34 has a queue descriptor 100 associated therewith which is stored in the CR2 RAM 63 of the output port 22.
• the queue descriptor 100 specifies, inter alia, the service class associated with dynamic cells buffered by the queue (i.e., ABR, VBR, or UBR) in a Class field 104.
• the priority of cells within a scheduling category is specified by a PrfPri field 108 for allocated bandwidth cells and by a DynPri field 112 for dynamic bandwidth cells.
• a Link field 118 is also contained in the queue descriptor 100 in which the particular link 30 associated with the queue 34 is identified.
• lists of queues are maintained in the CRl RAM 61 associated with each FSPP 16 for the purpose of link scheduling.
• a separate set of lists is provided for each link 30 supported by the FSPP 16.
• the following lists are stored: four priorities of preferred lists 130 (labelled PREFERRED0, PREFERRED1, PREFERRED2 and
• VBR lists 134 for allocated cells
• ABR lists 136 for dynamic VBR cells
• UBR lists 138 for dynamic UBR cells.
• Also stored for each link 30 supported by the FSPP 16 is a pair of update/check queues 142, 144 for use in scheduling flow control update cells for transmission to other network elements, as will be described.
• Queue numbers of queues 34 containing allocated bandwidth cells are placed on one of the preferred lists 130 and queue numbers of queues 34 containing dynamic bandwidth cells are placed on one of the dynamic lists 134, 136, or 138. More particularly, an output queue 34 may be scheduled on one or more lists depending on the scheduling category of cells contained therein. An output queue 34 is scheduled on only one list if the queue contains either only allocated cells or only dynamic cells. If an output queue 34 contains both allocated and dynamic cells however, the queue is scheduled on more than one list (i.e., on a preferred list 130 for the allocated cells and on one of the dynamic lists 134, 136 or 138 for the dynamic cells) .
• a queue 34 containing allocated cells and dynamic VBR cells is serviced using both a preferred list 130 as well as a dynamic VBR list 134.
• the criteria on which a list is scheduled includes the scheduling category (e.g., entries on the preferred lists are serviced before entries on the dynamic lists) , the priority of the list within the particular scheduling category (e.g., a priority zero list is scheduled before a priority one, two or three list) and whether or not the bandwidth requirement
• the queue numbers are serviced in order of arrival, with the first queue number added to the list (i.e., the head of the list) being the first to be removed.
• the dequeue controller 56 (Fig. 1) causes the number of the transmitting queue to be removed from the head of the list and a cell count maintained in the queue descriptor 100 to be decremented.
• the queue descriptor 100 includes a Dynamic Cell Count field 120 and an Allocated Cell Count field 124.
• the Allocated Cell Count 124 (Fig. 3) is decremented and, if the transmitted cell is a dynamic cell, then the Dynamic Cell Count 120 is decremented. If the cell count value thereafter is non-zero, then the queue number is returned to the tail of the list since a non-zero cell count value indicates that the particular queue still contains cells of the respective scheduling category and priority. Alternatively, if the decremented cell count value is zero, then the queue is removed from the list, since that queue no longer contains cells of the particular scheduling category and priority associated ' with that list. By servicing the queue number at - li ⁇ the head of the list fir ⁇ t, and returning a serviced queue to the tail of the list, queues within a list are scheduled in round-robin fashion.
• the lists are implemented as linked lists of queue numbers identifying the queues 34.
• the queue numbers in a list are "linked" in the ⁇ ense that each queue number points to another queue number on the list using the queue number itself as a pointer, as will be de ⁇ cribed further below in conjunction with Fig. 7.
• the lists are loaded by the enqueue controller 54 (Fig.
• the Dynamic Cell Count 120 is incremented and each time a cell having allocated bandwidth is enqueue, the Allocated
• Cell Count 124 is incremented. Note that each time a cell is dequeued, the respective count (i.e., the Dynamic Cell
• the queue 34 is enqueued on a queue 34 and the respective count field 120, 124 incremented, it is determined whether the queue should be placed on a scheduling list. In general, if the queue 34 is already on the appropriate list (i.e., the list corresponding to the scheduling category and priority of the just enqueued cell) , then the queue 34 is not placed on the list again. Alternatively, if the queue is not on the appropriate list, then the queue is added to the list.
• the way in which it is determined whether the queue 34 is already on the appropriate list is by checking the cell count 120, 124 associated with the enqueued cell. For example, before a dynamic bandwidth cell is enqueued on an output queue 34, the Dynamic Cell Count field 120 in the queue descriptor 100 is evaluated to determine if the count is zero. If the count is zero, then the queue 34 did not previously contain any dynamic bandwidth cells and the queue 34 is put on the appropriate dynamic bandwidth list 134, 136, or 138. Similarly, before an allocated cell is enqueued, the Allocated Cell Count is evaluated. An Allocated Cell Count of zero indicates that the queue 34 does not contain any other allocated bandwidth cells causing the queue to be added to the appropriate preferred list 130.
• the scheduling lists are accessed in a predetermined order by the FSPP 16 based on scheduling category and priority, as well as on the basis of whether the bandwidth requirement associated with the particular scheduling category ha ⁇ been satisfied.
• the bandwidth provided to each ⁇ cheduling category i ⁇ measured with the use of a bandwidth table 150 (Fig. 4) .
• the FSPP 16 stores a bandwidth table 150 for each supported link 30.
• the bandwidth table 150 maintains a "running average" of the scheduling categories transmitted over a predetermined interval (i.e., a predetermined number of cell time ⁇ ) .
• the entries in the bandwidth table 150 are shifted to the right ⁇ o that, at the end of N cell time ⁇ (where N is the number of location ⁇ in the bandwidth table), the table is full. Thereafter, when a cell i ⁇ tran ⁇ mitted, the fir ⁇ t location 154 in the bandwidth table is overwritten with the ⁇ cheduling category a ⁇ sociated with the presently transmitted cell and the remaining entries are shifted to the right, causing the last entry 158 to be removed from the table 150.
• Two counter ⁇ 58, 60 are provided in the control portion 52 of the FSPP 16 to count the number of cell ⁇ of each ⁇ cheduling category tran ⁇ mitted within the predetermined interval.
• one counter 58 count ⁇ the number of ABR cell ⁇ tran ⁇ mitted over the predetermined interval (i.e., the number of ABR entries in the bandwidth table 150) and the other counter 60 counts the number of VBR cells transmitted over the predetermined interval.
• the respective counter is incremented.
• its scheduling category is read and the respective counter decremented. In this way, each counter 58, 60 maintains a running tally of the number of entries in the bandwidth table 150 of the respective scheduling category.
• the FSPP 16 periodically compares the count maintained in each counter 58, 60 with the minimum bandwidth requirement for the respective scheduling category. For example, if ABR traffic is required to have 20% of the link 30 to meet the ABR bandwidth requirement, then the count in the ABR counter 58 i ⁇ compared to the required 20% bandwidth. If the bandwidth from the counter is greater than the required bandwidth, then the bandwidth requirement is met; whereas, if the bandwidth requirement from the counter is less than the required bandwidth, then the bandwidth requirement is not met.
• Table 1 li ⁇ t ⁇ the order in which the scheduling lists are selected to permit link acces ⁇ to the queues 34 contained therein, with item 1 of Table 1 reflecting the highest priority list access operation and item 18 the lowest.
• Round-robin 0 VBRO (Low), ABRO (Low) and UBR0
• ABR flow control con ⁇ i ⁇ ts of feedback messages used for flow control for the ABR traffic type and refers to the update/check queues 142, 144. These queues contain update information for other switches 29. The update information indicates whether or not a particular TSPP 14 has the buffer capacity to presently accept data cells from the other switch.
• the update information contained in the queues 142, 144 will be transmitted before any other cell trans i ⁇ sion if a predetermined interval has lapsed. Stated differently, an update cell generated from the update information is transmitted at least once during each such predetermined interval.
• update/check queue 142 is provided. According to item one of the link schedule Table 1, transmission of update information contained in the queue 142 has the highest priority in the event that the timer has expired.
• an ABR flow control timer in the FSPP 16 is loaded each time an update cell is transmitted and counts down thereafter. When this timer reache ⁇ a count of zero, another update cell i ⁇ tran ⁇ mitted according to item one in Table 1 above.
• update information will be transmitted with a priority higher than mo ⁇ t of the dynamic bandwidth transmissions.
• the second update/check queue 144 has a priority after transmissions from the VBRO list when the VBR bandwidth requirement is not met (i.e., item 6 in Table 1 above) but before all other dynamic bandwidth transmissions. This level of priority of the second update/check queue 144 is reflected by item 7 in the link schedule Table 1. It will be appreciated that although update/check queues 142, 144 are provided and scheduled in the manner described above in the illustrative embodiment, alternative schemes are possible for prioritizing the transmis ⁇ ion of update information relative to transmission of other types of cells over a particular link.
• list selection according to the above Table is performed simultaneously rather than consecutively. In particular, it is simultaneously determined which available list selection item has the highest priority. Considering item ⁇ 8 and 9 in Table 1 a ⁇ an example, it is simultaneously determined whether: (1) there exist ⁇ an entry on the ABRO list and the ABR bandwidth requirement has not been met; and (2) whether there exi ⁇ t ⁇ an entry on the VBR1 li ⁇ t and the VBR bandwidth requirement ha ⁇ not been met. The highe ⁇ t priority one of these conditions which is true corre ⁇ pond ⁇ to the next li ⁇ t selection.
• the list selection sequence could alternatively be performed consecutively.
• all the preferred lists with allocated traffic for a link are scheduled with a priority above dynamic lists with dynamic traffic for that link.
• Newly received cells in a higher priority preferred list are tran ⁇ mitted before previou ⁇ ly received cells in a lower priority preferred li ⁇ t.
• the VBR service class achieves a preselected percentage of dynamic bandwidth before allowing the lower priority ABR service cla ⁇ s to share in the dynamic bandwidth. Once ABR has achieved its preselected percentage, the remaining dynamic bandwidth is shared among VBR (low priority) , ABR (low priority) and UBR in round-robin fashion.
• each list contains queue number 11 at the head of the list, followed by queue number 3 and finally queue number 14 at the tail of the list.
• each queue number on the list pointing to another queue number on the list using the queue number itself as a pointer.
• As ⁇ ociated with each list are list pointers 168 containing queue numbers and a list descriptor 170 which point ⁇ to the head and tail of the li ⁇ t. Both the list pointers 168 and list descriptors 170 for each li ⁇ t are ⁇ tored in the CRl RAM 61 of the FSPP 16. All of the preferred lists share the same set of list pointers 168. Likewise, all of the dynamic lists, ABR, VBR and UBR, share a common set of list pointers 168.
• the list descriptor 170 is different for each list and points to the head and tail of the respective list.
• the queue number at the head of the list is u ⁇ ed to index the li ⁇ t pointer ⁇ 168.
• the queue number pointed to by the head of the list is the second entry in the list.
• the queue number of the second entry is used to index the list pointers 168 and the queue number pointed to by this second entry is the third entry and so on until the queue number pointed to is equal to the queue number of the la ⁇ t entry (i.e., the tail of the li ⁇ t a ⁇ specified in the list descriptor 170) .
• queue number 11 i.e., the head of the list
• queue number 3 is used to index the li ⁇ t pointers 168 to read the queue number of the third entry on the li ⁇ t, or queue number 14.
• a queue is added to the list by writing the queue number to the list pointer location indexed by the present tail of the list and replacing the present tail of the list in the list descriptor 170 with the queue number being added.

Landscapes

• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Physics & Mathematics (AREA)
• Mathematical Physics (AREA)
• Computer Hardware Design (AREA)
• Theoretical Computer Science (AREA)
• Software Systems (AREA)
• General Engineering & Computer Science (AREA)
• General Physics & Mathematics (AREA)
• Computer Security & Cryptography (AREA)
• Data Exchanges In Wide-Area Networks (AREA)

Applications Claiming Priority (3)

Publications (2)

Family

ID=38659664

Family Applications (1)

Country Status (4)

Families Citing this family (3)

Family Cites Families (6)

• 1996
  • 1996-07-18 EP EP96924603A patent/EP0845181A4/en not_active Withdrawn
  • 1996-07-18 JP JP9506066A patent/JP2000501897A/ja active Pending
  • 1996-07-18 WO PCT/US1996/011919 patent/WO1997004561A1/en not_active Application Discontinuation
  • 1996-07-18 AU AU65009/96A patent/AU6500996A/en not_active Abandoned

Non-Patent Citations (3)

Also Published As

Similar Documents

Legal Events