EP0778517A3 - Improvements in or relating to the encoding of an image control signal - Google Patents

Improvements in or relating to the encoding of an image control signal Download PDF

Info

Publication number
EP0778517A3
EP0778517A3 EP96308543A EP96308543A EP0778517A3 EP 0778517 A3 EP0778517 A3 EP 0778517A3 EP 96308543 A EP96308543 A EP 96308543A EP 96308543 A EP96308543 A EP 96308543A EP 0778517 A3 EP0778517 A3 EP 0778517A3
Authority
EP
European Patent Office
Prior art keywords
transition
encoding
relating
clock cycle
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96308543A
Other languages
German (de)
French (fr)
Other versions
EP0778517A2 (en
Inventor
Richard Mark Prentice
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of EP0778517A2 publication Critical patent/EP0778517A2/en
Publication of EP0778517A3 publication Critical patent/EP0778517A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2230/00—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller

Abstract

A system for encoding control data onto a clock signal includes at least one clock cycle in the clock signal; a first transition in the at least one clock cycle, the first transition is from a first voltage level to a second voltage level, the first transition is in a first location in the at least one clock cycle; a second transition in the at least one clock cycle, the second transition is from the second voltage level to the first voltage level, the second transition has a variable location in the clock cycle; and an encoder circuit for positioning the second transition in the variable location in response to the control data.
EP96308543A 1995-11-27 1996-11-26 Improvements in or relating to the encoding of an image control signal Withdrawn EP0778517A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US760695P 1995-11-27 1995-11-27
US7606 1995-11-27

Publications (2)

Publication Number Publication Date
EP0778517A2 EP0778517A2 (en) 1997-06-11
EP0778517A3 true EP0778517A3 (en) 1998-02-11

Family

ID=21727159

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96308543A Withdrawn EP0778517A3 (en) 1995-11-27 1996-11-26 Improvements in or relating to the encoding of an image control signal

Country Status (5)

Country Link
EP (1) EP0778517A3 (en)
JP (1) JPH09246974A (en)
KR (1) KR970029314A (en)
SG (2) SG52866A1 (en)
TW (1) TW357530B (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356260B1 (en) * 1998-04-10 2002-03-12 National Semiconductor Corporation Method for reducing power and electromagnetic interference in conveying video data
AU2681799A (en) * 1998-04-17 1999-11-08 Conexant Systems, Inc. Low cost line-based video compression of digital video stream data
US6564269B1 (en) * 1998-09-10 2003-05-13 Silicon Image, Inc. Bi-directional data transfer using the video blanking period in a digital data stream
US6252419B1 (en) 1999-01-08 2001-06-26 Altera Corporation LVDS interface incorporating phase-locked loop circuitry for use in programmable logic device
US6832173B1 (en) 2002-07-30 2004-12-14 Altera Corporation Testing circuit and method for phase-locked loop
US6867616B1 (en) 2003-06-04 2005-03-15 Altera Corporation Programmable logic device serial interface having dual-use phase-locked loop circuitry
US7019570B2 (en) 2003-09-05 2006-03-28 Altera Corporation Dual-gain loop circuitry for programmable logic device
US6924678B2 (en) 2003-10-21 2005-08-02 Altera Corporation Programmable phase-locked loop circuitry for programmable logic device
US7091760B1 (en) 2004-02-25 2006-08-15 Altera Corporation DLL with adjustable phase shift using processed control signal
US7075365B1 (en) 2004-04-22 2006-07-11 Altera Corporation Configurable clock network for programmable logic device
US7230495B2 (en) 2004-04-28 2007-06-12 Micron Technology, Inc. Phase-locked loop circuits with reduced lock time
US7436228B1 (en) 2005-12-22 2008-10-14 Altera Corporation Variable-bandwidth loop filter methods and apparatus
US7728674B1 (en) 2006-05-19 2010-06-01 Altera Corporation Voltage-controlled oscillator methods and apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4412335A (en) * 1980-11-28 1983-10-25 International Business Machines Corporation Digital signal distribution system
US4606022A (en) * 1983-06-13 1986-08-12 Nissan Motor Company, Limited Data transmission/reception network system
JPH03154428A (en) * 1989-11-10 1991-07-02 Fujitsu Ten Ltd Data communication system
US5140611A (en) * 1989-09-29 1992-08-18 Rockwell International Corporation Pulse width modulated self-clocking and self-synchronizing data transmission and method for a telephonic communication network switching system
EP0645750A1 (en) * 1993-09-28 1995-03-29 Koninklijke Philips Electronics N.V. Arrangement for adjusting monitor settings in a picture display system
US5621758A (en) * 1995-08-09 1997-04-15 Mitsubishi Electric Semiconductor Software PWM Communication system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3237176A (en) * 1962-01-26 1966-02-22 Rca Corp Binary recording system
US4344039A (en) * 1979-03-13 1982-08-10 Sanyo Electric Co., Ltd. Demodulating circuit for self-clocking-information
US4547764A (en) * 1983-10-31 1985-10-15 Burroughs Corporation Pulse width decoder for double frequency encoded serial data
US5642139A (en) * 1994-04-29 1997-06-24 Cirrus Logic, Inc. PCMCIA video card

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4412335A (en) * 1980-11-28 1983-10-25 International Business Machines Corporation Digital signal distribution system
US4606022A (en) * 1983-06-13 1986-08-12 Nissan Motor Company, Limited Data transmission/reception network system
US5140611A (en) * 1989-09-29 1992-08-18 Rockwell International Corporation Pulse width modulated self-clocking and self-synchronizing data transmission and method for a telephonic communication network switching system
JPH03154428A (en) * 1989-11-10 1991-07-02 Fujitsu Ten Ltd Data communication system
EP0645750A1 (en) * 1993-09-28 1995-03-29 Koninklijke Philips Electronics N.V. Arrangement for adjusting monitor settings in a picture display system
US5621758A (en) * 1995-08-09 1997-04-15 Mitsubishi Electric Semiconductor Software PWM Communication system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 15, no. 383 (E - 1116) 27 September 1991 (1991-09-27) *

Also Published As

Publication number Publication date
JPH09246974A (en) 1997-09-19
SG52866A1 (en) 1998-09-28
KR970029314A (en) 1997-06-26
SG95614A1 (en) 2003-04-23
EP0778517A2 (en) 1997-06-11
TW357530B (en) 1999-05-01

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