EP0700004A3 - System and method for communicating between devices - Google Patents

System and method for communicating between devices Download PDF

Info

Publication number
EP0700004A3
EP0700004A3 EP95480104A EP95480104A EP0700004A3 EP 0700004 A3 EP0700004 A3 EP 0700004A3 EP 95480104 A EP95480104 A EP 95480104A EP 95480104 A EP95480104 A EP 95480104A EP 0700004 A3 EP0700004 A3 EP 0700004A3
Authority
EP
European Patent Office
Prior art keywords
communicating
devices
signal
action
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP95480104A
Other languages
German (de)
French (fr)
Other versions
EP0700004A2 (en
Inventor
Michael Scott Allen
Ravi Kumar Arimilli
John Michael Kaiser
William Kurt Lewchuk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP0700004A2 publication Critical patent/EP0700004A2/en
Publication of EP0700004A3 publication Critical patent/EP0700004A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Small-Scale Networks (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

A method and system are provided for communicating between devices. A signal is output from a first device. In response to the signal, at least one action is initiated by a second device. An indication is output of whether the second device completed the action and of whether operation of the second device is independent of the first device reoutputting the signal.
EP95480104A 1994-08-31 1995-08-08 System and method for communicating between devices Withdrawn EP0700004A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US29887394A 1994-08-31 1994-08-31
US298873 1994-08-31

Publications (2)

Publication Number Publication Date
EP0700004A2 EP0700004A2 (en) 1996-03-06
EP0700004A3 true EP0700004A3 (en) 1998-07-01

Family

ID=23152337

Family Applications (1)

Application Number Title Priority Date Filing Date
EP95480104A Withdrawn EP0700004A3 (en) 1994-08-31 1995-08-08 System and method for communicating between devices

Country Status (6)

Country Link
US (1) US5745698A (en)
EP (1) EP0700004A3 (en)
JP (1) JPH0877126A (en)
KR (1) KR0153487B1 (en)
CN (2) CN1205792C (en)
CA (1) CA2155890A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6112270A (en) * 1997-10-31 2000-08-29 International Business Machines Corporation Method and system for high speed transferring of strictly ordered bus operations by reissuing bus operations in a multiprocessor system
US6128705A (en) * 1998-01-07 2000-10-03 International Business Machines Corporation Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations
US6314495B1 (en) * 1998-01-07 2001-11-06 International Business Machines Corporation Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations
US6192453B1 (en) * 1998-07-13 2001-02-20 International Business Machines Corporation Method and apparatus for executing unresolvable system bus operations
US6898675B1 (en) 1998-08-24 2005-05-24 International Business Machines Corporation Data received before coherency window for a snoopy bus
US6976132B2 (en) * 2003-03-28 2005-12-13 International Business Machines Corporation Reducing latency of a snoop tenure
WO2007099614A1 (en) 2006-02-28 2007-09-07 Fujitsu Limited System controller and cache control method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4937734A (en) * 1989-02-21 1990-06-26 Sun Microsystems, Inc. High speed bus with virtual memory data transfer and rerun cycle capability
US5067071A (en) * 1985-02-27 1991-11-19 Encore Computer Corporation Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus
EP0609083A1 (en) * 1993-01-29 1994-08-03 Motorola, Inc. Information transfer in a data processing system

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3603932A (en) * 1969-04-07 1971-09-07 Bell Telephone Labor Inc Party line stations for selective calling systems
US4218739A (en) * 1976-10-28 1980-08-19 Honeywell Information Systems Inc. Data processing interrupt apparatus having selective suppression control
US4412285A (en) * 1981-04-01 1983-10-25 Teradata Corporation Multiprocessor intercommunication system and method
US4785394A (en) * 1986-09-19 1988-11-15 Datapoint Corporation Fair arbitration technique for a split transaction bus in a multiprocessor computer system
US5208914A (en) * 1989-12-29 1993-05-04 Superconductor Systems Limited Partnership Method and apparatus for non-sequential resource access
US5202973A (en) * 1990-06-29 1993-04-13 Digital Equipment Corporation Method of controlling a shared memory bus in a multiprocessor system for preventing bus collisions and for ensuring a full bus
US5191649A (en) * 1990-12-21 1993-03-02 Intel Corporation Multiprocessor computer system with data bus and ordered and out-of-order split data transactions
US5261109A (en) * 1990-12-21 1993-11-09 Intel Corporation Distributed arbitration method and apparatus for a computer bus using arbitration groups
US5274763A (en) * 1990-12-28 1993-12-28 Apple Computer, Inc. Data path apparatus for IO adapter
US5195089A (en) * 1990-12-31 1993-03-16 Sun Microsystems, Inc. Apparatus and method for a synchronous, high speed, packet-switched bus
US5416510A (en) * 1991-08-28 1995-05-16 Stereographics Corporation Camera controller for stereoscopic video system
JP3466212B2 (en) * 1991-09-17 2003-11-10 インテル・コーポレーション Computer system
US5367695A (en) * 1991-09-27 1994-11-22 Sun Microsystems, Inc. Bus-to-bus interface for preventing data incoherence in a multiple processor computer system
US5463753A (en) * 1992-10-02 1995-10-31 Compaq Computer Corp. Method and apparatus for reducing non-snoop window of a cache controller by delaying host bus grant signal to the cache controller
US5459459A (en) * 1992-12-28 1995-10-17 General Electric Company Method and apparatus for transmitting data from an energy meter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5067071A (en) * 1985-02-27 1991-11-19 Encore Computer Corporation Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus
US4937734A (en) * 1989-02-21 1990-06-26 Sun Microsystems, Inc. High speed bus with virtual memory data transfer and rerun cycle capability
EP0609083A1 (en) * 1993-01-29 1994-08-03 Motorola, Inc. Information transfer in a data processing system

Also Published As

Publication number Publication date
US5745698A (en) 1998-04-28
CN1191533C (en) 2005-03-02
KR0153487B1 (en) 1998-11-16
EP0700004A2 (en) 1996-03-06
CN1343054A (en) 2002-04-03
CN1205792C (en) 2005-06-08
CN1127961A (en) 1996-07-31
CA2155890A1 (en) 1996-03-01
KR960008561A (en) 1996-03-22
JPH0877126A (en) 1996-03-22

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