EP0584739A3 - - Google Patents

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Publication number
EP0584739A3
EP0584739A3 EP19930113348 EP93113348A EP0584739A3 EP 0584739 A3 EP0584739 A3 EP 0584739A3 EP 19930113348 EP19930113348 EP 19930113348 EP 93113348 A EP93113348 A EP 93113348A EP 0584739 A3 EP0584739 A3 EP 0584739A3
Authority
EP
European Patent Office
Prior art keywords
response
select signals
integrated circuit
semiconductor integrated
select
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19930113348
Other versions
EP0584739B1 (en
EP0584739A2 (en
Inventor
Masaru Koyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of EP0584739A2 publication Critical patent/EP0584739A2/en
Publication of EP0584739A3 publication Critical patent/EP0584739A3/xx
Application granted granted Critical
Publication of EP0584739B1 publication Critical patent/EP0584739B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags

Abstract

A semiconductor integrated circuit is operative in a plurality of different modes. A plurality of select signals whose number corresponds to modes selected from a plurality of different modes are outputted. In response to the select signals, it is detected whether at least two operation modes are selected simultaneously. If so, a detection signal is outputted. In response to this detection signal, the operation of the semiconductor integrated circuit is stopped. Further, in response to the select signal, the semiconductor integrated circuit is activated in a mode by means of a predetermined select signal of these select signals. Further, in response to these select signals, the selected mode can be detected. <IMAGE>
EP93113348A 1992-08-21 1993-08-20 Semiconductor integrated circuit operative in different modes Expired - Lifetime EP0584739B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP222686/92 1992-08-21
JP4222686A JP2856988B2 (en) 1992-08-21 1992-08-21 Semiconductor integrated circuit

Publications (3)

Publication Number Publication Date
EP0584739A2 EP0584739A2 (en) 1994-03-02
EP0584739A3 true EP0584739A3 (en) 1994-05-04
EP0584739B1 EP0584739B1 (en) 1997-10-22

Family

ID=16786327

Family Applications (1)

Application Number Title Priority Date Filing Date
EP93113348A Expired - Lifetime EP0584739B1 (en) 1992-08-21 1993-08-20 Semiconductor integrated circuit operative in different modes

Country Status (5)

Country Link
US (1) US5402018A (en)
EP (1) EP0584739B1 (en)
JP (1) JP2856988B2 (en)
KR (1) KR970008362B1 (en)
DE (1) DE69314731T2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738408A (en) * 1993-07-19 1995-02-07 Sharp Corp Buffer circuit
US5492509A (en) * 1994-06-06 1996-02-20 Ford Motor Company Operating range selection of an automatic transmission
US5796746A (en) * 1995-12-22 1998-08-18 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US6240535B1 (en) 1995-12-22 2001-05-29 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US6515505B1 (en) * 1995-12-26 2003-02-04 Cypress Semiconductor Corp. Functionality change by bond optioning decoding
US6496033B2 (en) 1998-06-08 2002-12-17 Cypress Semiconductor Corp. Universal logic chip
DE60130936T2 (en) 2000-03-08 2008-07-24 Matsushita Electric Industrial Co., Ltd., Kadoma Integrated semiconductor circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2120427A (en) * 1982-05-19 1983-11-30 Nissan Motor Operation mode monitor for microcomputer
FR2600453A1 (en) * 1986-06-23 1987-12-24 Mitsubishi Electric Corp SEMICONDUCTOR MEMORY DEVICE
EP0283186A2 (en) * 1987-03-06 1988-09-21 Kabushiki Kaisha Toshiba Semiconductor integrated circuit with a plurality of circuit blocks having equivalent functions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3560939A (en) * 1968-07-05 1971-02-02 Kozponti Fiz Kutato Intezet Digital channel selection apparatus
JPS588588B2 (en) * 1975-05-28 1983-02-16 株式会社日立製作所 semiconductor integrated circuit
JPS605385Y2 (en) * 1979-11-15 1985-02-19 パイオニア株式会社 Preset lighting device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2120427A (en) * 1982-05-19 1983-11-30 Nissan Motor Operation mode monitor for microcomputer
FR2600453A1 (en) * 1986-06-23 1987-12-24 Mitsubishi Electric Corp SEMICONDUCTOR MEMORY DEVICE
EP0283186A2 (en) * 1987-03-06 1988-09-21 Kabushiki Kaisha Toshiba Semiconductor integrated circuit with a plurality of circuit blocks having equivalent functions

Also Published As

Publication number Publication date
JPH0669342A (en) 1994-03-11
EP0584739B1 (en) 1997-10-22
KR940004797A (en) 1994-03-16
DE69314731T2 (en) 1998-03-19
DE69314731D1 (en) 1997-11-27
US5402018A (en) 1995-03-28
KR970008362B1 (en) 1997-05-23
EP0584739A2 (en) 1994-03-02
JP2856988B2 (en) 1999-02-10

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