EP0583398A4 - Drive amplifier for power line communications - Google Patents

Drive amplifier for power line communications

Info

Publication number
EP0583398A4
EP0583398A4 EP92912752A EP92912752A EP0583398A4 EP 0583398 A4 EP0583398 A4 EP 0583398A4 EP 92912752 A EP92912752 A EP 92912752A EP 92912752 A EP92912752 A EP 92912752A EP 0583398 A4 EP0583398 A4 EP 0583398A4
Authority
EP
European Patent Office
Prior art keywords
amplifier
circuit
transistor
power line
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP92912752A
Other languages
English (en)
Other versions
EP0583398A1 (fr
Inventor
Philip H Sutterlin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Echelon Corp
Original Assignee
Echelon Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Echelon Corp filed Critical Echelon Corp
Publication of EP0583398A1 publication Critical patent/EP0583398A1/fr
Publication of EP0583398A4 publication Critical patent/EP0583398A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72—Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3069—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the emitters of complementary power transistors being connected to the output
    • H03F3/3076—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the emitters of complementary power transistors being connected to the output with symmetrical driving of the end stage
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/54—Systems for transmission via power distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2203/00—Indexing scheme relating to line transmission systems
    • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5404—Methods of transmitting or receiving signals via power distribution lines
    • H04B2203/5425—Methods of transmitting or receiving signals via power distribution lines improving S/N by matching impedance, noise reduction, gain control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2203/00—Indexing scheme relating to line transmission systems
    • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5462—Systems for power line communications
    • H04B2203/5483—Systems for power line communications using coupling circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2203/00—Indexing scheme relating to line transmission systems
    • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5462—Systems for power line communications
    • H04B2203/5495—Systems for power line communications having measurements and testing channel

Definitions

  • the present invention relates generally to the field of amplifier circuits; more specifically, the invention relates to a class of amplifier circuits for transmitting communication signals over lines primarily used for power distribution.
  • the present invention provides a drive amplifier adapted for power line communication systems.
  • the invented amplifier circuit provides a low output impedance during transmit mode, and a high input impedance during receive mode. Special control circuitry is included to permit rapid switching between transmit and receive modes. Numerous other features desirable of a power line communications amplifier are also incorporated.
  • the amplifier circuit includes a first circuit means for amplifying a transmit signal consistent within a first operating potential range.
  • a second circuit means provides additional amplification of the transmit signal consistent within a second operating potential range, wherein the second range is larger than the first range.
  • a transformer is employed to couple the amplified transmit signal output by the second circuit means to the power line communications system.
  • the invention further includes a feedback means coupling the output of the second circuit means to an input of the first circuit means. This feedback means maintains a low output impedance while the amplifier circuit operates in a transmit mode of operation.
  • a control means coupled to the second circuit means is used for switching the amplifier circuit from the transmit mode to a receive mode of operation. When in the receive mode, the second circuit means presents a relatively high output impedance.
  • Figures 1A & 1B show a circuit schematic diagram of the drive amplifier of the present invention.
  • Figure 2 is a plot illustrating the amplifier's output impedance in receive mode as a function of frequency.
  • Figure 3 is a simplified circuit schematic of the present invention showing an alternative feedback configuration.
  • Figure 4 is a simplified circuit schematic of the present invention for illustrating an advantage of the currently preferred feedback configuration.
  • Figures 5A & 5B show a detailed circuit schematic of the current embodiment of the present invention including component values and part numbers.
  • FIG. 1A and 1B there is shown a circuit schematic diagram of the amplifier circuit of the present invention.
  • the communications signal In transmit mode, the communications signal is applied to node 27. From there, it is coupled through resistor 26 to the positive input terminal of operational amplifier (op amp) 23, i.e., node 28.
  • op amp operational amplifier
  • Phase compensation and gain for op amp 23 are provided by resistor 24, coupled between the negative input terminal of op amp 23 (i.e., node 20) and ground, and also by means of the parallel combination of resistor 21 and capacitor 22 coupled between nodes 29 and 20. Additional phase compensation is provided by the network comprising the series combination of resistors 31 and capacitor 33 coupled across nodes 29 and 35 in parallel with resistor 30.
  • FIGS 1A and 1B also show diode 36 and resistor 37 being coupled in series between node 35 and the negative supply potential, VEE- Node 35 is also coupled to the collector of NPN bipolar transistor 40.
  • the emitter of transistor 40 is coupled directly to VEE while the base of transistor 40, i.e., node 38, is coupled to VEE through resistor 39.
  • Node 35 is also coupled to the base of NPN bipolar transistor 59.
  • diode 36 and transistor 59 function as a current mirror, with resistor 30 (R-j) acting as the input resistor to the mirror.
  • Resistor 37 (R2) and resistor 60 (R3), coupled from the emitter of transistor 59 to VEE. establish the current ratio between the input and output of the mirror. Thus, this ratio sets the voltage gain through bipolar transistor 59 in conjunction with transistor 59 * s equivalent collector load.
  • This aspect of the present invention will be discussed in further detail shortly.
  • Figures 1 A & 1 B also show a transmit / receive control signal, T ⁇ ( ⁇ N), being applied to the base of PNP transistor 14 at node 10.
  • the emitter of PNP transistor 14 is coupled to positive supply potential VDD through resistor 12 while the collector of transistor 14 is coupled to the base of transistor 40 at node 38.
  • the base of bipolar transistor 14 is also coupled to the base of transistor 41 through resistor 16. Note that nodes 10 and 17 have a path to ground provided for them through respective resistors 11 and 19.
  • NPN bipolar transistor 41 is shown having its emitter grounded and its collector coupled to the base of PNP transistor 47 at node 49 through resistor 42.
  • the series combination of resistor 45 and diode 43 connect the positive supply potential Vcc to the base of transistor 47 at node 49.
  • the emitter of transistor 47 is coupled to Vcc through resistor 46.
  • NPN transistor 52 is connected to the collector of transistor 47 at node 53.
  • the base of transistor 52 is also coupled to the base of PNP transistor 61 through the series connection of diode 48, resistor 55 and diode 56.
  • the emitters of transistors 52 and 61 are coupled through biasing resistors 66 and 67.
  • transistors 52 and 61 are arranged in a push-pull configuration wherein the collectors of transistors 52 and 61 are coupled to supply potentials Vcc and VEE. respectively. Since the current mirrors driving transistors 52 and 61 are balanced, this means that the push- pull output stage is itself balanced. That is, if op amp 23 outputs zero volts at node 29, then the output at node 63 will also be zero. A positive output from op amp 23 causes more drive current to be drawn from transistor 61 relative to transistor 52 so that node 63 becomes more negative. Similarly, if op amp 23 produces a negative output, transistor 52 will receive more base current compared to transistor 61 , and node 63 will become more positive.
  • Feedback is provided for in the circuit of Figures 1 A & 1 B by means of resistors 70 and 71 and also capacitor 72.
  • Resistor 71 is connected between the emitter of transistor 52 (node 64) and the positive input terminal of operational amplifier 23.
  • the emitter of PNP transistor 61 is also coupled to node 28 through resistor 70.
  • Resistor 70 is coupled between nodes 65 and node 28.
  • Capacitor 72 is shown being connected across nodes 63 and 28.
  • transistor 59 provides voltage gain for the amplifier circuit at the same time that the push-pull output stage provides current gain. Both of these stages operate to drive a communications signal across a pair of resistors 75 and 76. Resistors 75 and 76 are coupled in parallel across nodes 63 and 80. Node 80, in turn, is coupled to ground through resistor 81 and capacitor 82, and to one winding of transformer 90 through AC coupling capacitor 83. Transformer 90 provides an interface between the driving amplifier circuit of the present invention and the power lines. Currently, transformer 90 comprises a transformer having a 3:1 turns ratio.
  • One of the important features of the present invention is its ability to transmit a communications signal at the carrier frequency with a low output impedance (e.g., less than 10 ohms).
  • a very low output impedance is desired in order to overcome the very low impedance of electrical appliances connected to the line.
  • transmissions take place at a carrier frequencies of 118 kilohertz and 134 kilohertz.
  • the driving amplifier provide a low impedance in transmit mode, but it also must provide a relatively high output impedance (greater than 500 ohms) at the carrier frequency while in a receive mode.
  • a relatively high output impedance greater than 500 ohms
  • the present invention achieves a relatively high output impedance in receive mode and a relatively low impedance in transmit mode.
  • the invention is capable of rapidly switching between the transmit and receive mode with corresponding switching of input impedance levels as seen from the power line.
  • the transmit signal is applied to the positive input terminal of operational amplifier 23 via node 27.
  • the amplified transmit signal appears at nodes 29 and 35 having a peak-to-peak amplitude which basically extends from the positive to negative operating potentials.
  • This signal is then coupled to node 35 at the base of NPN bipolar transistor 59.
  • the portion of the circuit represented in Rgure 1 A is powered by VQD ( ⁇ -g.. 5 V).
  • VQD ⁇ -g.. 5 V
  • the relatively small amplitude signal output by amplifier 23 eventually is gained up to a larger amplitude signal by transistor 59.
  • This larger signal is output onto the line by the push-pull output stage comprising transistors 52 and 61.
  • This stage provides current gain for the output amplifier signal.
  • the transmit control signal, T ⁇ (0N). is raised to a high logic level (e.g., 5 volts).
  • a high potential at node 10 turns off transistor 14.
  • transistor 40 is also turned off - its base being grounded through resistor 39. Turning off transistor 40 allows the voltage at node 35 to swing freely.
  • the output impedance appearing at node 63 is kept to a minimum by means of the negative feedback provided to operational amplifier 23 through resistors 66, 67 and 71 , 70. Basically, the output impedance of the amplifier is reduced inversely proportional to the loop gain of the amplifier and the feedback circuit.
  • the circuit is switched to a receive mode by taking the transmit control signal to a low logic level (e.g., ground). Grounding node 10 activates PNP transistor 14. With PNP transistor 14 on, drive current is supplied to the base of NPN transistor 40. This turns transistor 40 on, thereby pulling node 35 down to negative supply potential VEE. which turns off NPN transistor 59.
  • a low logic level e.g., ground
  • a ground potential on node 10 also grounds node 17. This turns off transistor 41 which causes a high potential at node 49 turning off transistor 47. With transistors 47 and 59 both off, the push-pull output stage comprising transistors 52 and 61 are disabled, i.e., the transistors have no drive current. Disabling the push-pull output stage results in a high output impedance at node 64 and 65. Hence, grounding the control signal T ⁇ ( ⁇ ) causes the amplifying portion of the circuit of Figure 1A and 1B to switch to a high impedance state. In this state the received communication signal is simply tapped off of the amplifier side of transformer 90 (node 94).
  • the invented amplifier is capable of switching between transmit and receive modes of operation very quickly -- with typical speeds on the order of 10 microseconds.
  • the ability to rapidly switch between one mode of operation and the other is crucial to the avoidance of collisions between signals on the power line medium. As the switching delay gets larger, the probability of incurring collisions increases dramatically.
  • Rrst of all providing an input node which can be driven digitally by standard logic devices is important in providing a control element for switching operations. All of the components shown in Figure 1A can be easily integrated into a single semiconductor circuit using conventional bipolar complimentary metal-oxide-semiconductor (BiCMOS) process technology.
  • BiCMOS bipolar complimentary metal-oxide-semiconductor
  • CMOS process can be used with appropriate substitution of transistors 14, 40 and diode 36.
  • the switching circuitry of the amplifier is easily interfaced to the switching control signal T ⁇ (0N).
  • all the control and input circuitry can be powered off of a common 5 volt power supply.
  • VDD 5 volts
  • VEE OV
  • Vcc +24V.
  • resistor values may need to be adjusted (e.g., resistors 42, 45 and 46) to accommodate this shift in supply voltage.
  • resistors 11, 12 and 39 are chosen to insure that transistor 14 always operates in a mode where it is either functions as a current source or it is completely turned off.
  • Transistor 14 is deliberately kept out of saturation so that node 38 can be switched quickly from a high to a low voltage level.
  • resistor 11 allows rapid discharge of the base voltage of transistor 14 during a high to low transition of node 10.
  • resistor 39 helps in the rapid discharge of the voltage at node 38 to turn off transistor 40.
  • Resistor 19 performs the same function to discharge node 17, coupled to the base of transistor 41, when the control signal T ⁇ ( ⁇ N) transitions from a high to a low level.
  • the power delivered to the line is kept relatively high without harmonic levels which would exceed government regulation limits. This is accomplished by means of transistor 59 and push-pull transistors 52 and 61, and the configuration wherein the relatively small output of op amp 23 is stepped up to a larger signal. As explained previously, transistor 59 provides voltage gain while current gain is provided by the push-pull combination. At present, the output stage of the invented amplifier circuit is capable of delivering about 40 milliamps with a communications signal of 18 volts peak-to-peak at node 63.
  • each of the component elements illustrated in Figure 1 B is preferably implemented as a discrete device.
  • the operational amplifier and switching portions of the circuit may be implemented on an integrated circuit as will be discussed further.
  • the high-powered output portion is optimally manufactured at a discrete level. Taking this manufacturing approach, the total cost of the circuit of Figure 1A and 1B is kept to a minimum.
  • Another advantage of the present invention is its ability to operate off of very small current (tens of milliamps) from the power supply, even under worse case conditions. Drawing such a small amount of current from the power supply allows the present invention to utilize a capacitive input power supply.
  • a capacitive input power supply is well known to power supply designers as a low cost supply.
  • the prohibitive factor associated with the capacitive input type of power supply is that it is limited in the amount of current it can deliver (generally not exceeding 50 milliamps). However, it more than compensates for this fact by its ability to generate higher voltages which translate into high power output (recall that power is equal to the product of voltage times current).
  • the present invention is able to benefit from the use of a capacitive input type of power supply. That is, the present invention relies upon a relatively large operating supply potential (e.g., 24 volts) compensated by a relatively low supply current (approximately 40 milliamps), to achieve maximum power output.
  • a relatively large operating supply potential e.g., 24 volts
  • a relatively low supply current approximately 40 milliamps
  • transformers not only transform impedance but they also modify voltage levels.
  • the voltage level on the amplifier side is nominally three times larger than the voltage level present on the line side. But at the same time, the transformer provides three times the current drive capability on the line side, with the benefit of smaller supply currents on the amplifier side.
  • the present invention employs large operating supply potentials at the output stage in combination with the 3:1 turns ration of transformer 90 to transform the high voltage associated with the amplifier side of the coil into a low voltage on the line side.
  • the present invention incorporates lead fag compensation networks coupled to op amp 23.
  • the lead compensation network circuitry comprises resistor 31 and capacitor 33 coupled in series between nodes 35 and 29.
  • Lag compensation is provided by the feedback network comprising resistors 21 , 24 and capacitor 22.
  • the lead and lag compensation networks guarantee at least 45° of phase margin.
  • Figure 2 illustrates the input impedance looking in from the power line of the circuit as a function of frequency.
  • the operating frequencies of concern are indicated as being 118 kilohertz and 134 kilohertz for the current embodiment.
  • the impedance is depicted by waveform 91.
  • the lower impedance at frequencies below 118 kilohertz is primarily due to the magnetizing inductance of transformer 90.
  • the low impedance is due to the presence of parasitic capacitance.
  • the impedance in the region of 118 KHz to 134 KHz is set primarily by resistor 81 and capacitor 82. Note that the valve of resistor 81 must be limited to avoid excessive ringing causes by noise present on the power line.
  • the amplifier circuit of the present invention also must have low harmonic distortion.
  • FCC and Class B government regulations prohibit conducting more than 250 microvolts of noise across any portion of the broadcast band. Emissions tests are performed to meet these regulations by use of a network which results in approximately 100 ohms across the hot and neutral power lines in the pertinent frequency range. The power lines are then measured to determine how much noise is being passed onto the lines. Because of the operating frequencies involved (e.g., 118 KHz and 134 KHz), there is a potential for a fifth harmonic to fall within the A.M. broadcast band.
  • Low harmonic distortion is attained in the present invention by enclosing the entire amplifier circuit - not only just the operational amplifier itself, but the operational amplifier as well as the output buffer circuitry - within the feedback loop.
  • the feedback connection back to the positive input of operational amplifier 23 is taken from the output node of the amplifier driver circuit at node 68.
  • This feedback path from node 63 to node 28 includes resistors 66, 67, 70, 71 and capacitor 72.
  • the fact that the feedback connection is around the whole amplifier- including the output buffers, instead of simply operational amplifier 23 alone - means that the present invention realizes distortion levels of better than 68dB below the fundamental when driving a 100 ohm resistive load.
  • the single feedback resistor of Figure 3 is shown being split into a pair of feedback resistors 70 and 71.
  • the amplifier is able to reduce the value o.f the resistance of Ro by R ⁇ 2 for the same output impedance seen looking in from the power line.
  • Figures 5A and 5B are a circuit schematic diagram of the current embodiment of the present invention including specific component types and values. Note that the circuit of Rgures 5A and 5B includes several EXCLUSIVE-OR logic gates together with extra associated circuitry. Practitioners in the art will appreciate that the purpose and function of this circuitry is to eliminate possible glitches which might occur while switching from transmit to receive mode and vice-a-versa. Of course, certain embodiments and applications may not require such circuitry, or may employ other components for similar reasons. This additional circuitry is not deemed to be essential to the present invention.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

Un amplificateur de communications sur ligne de courant électrique se compose d'un premier amplificateur (23) qui amplifie un signal transmis compatible avec une première plage de potentiel d'exploitation, d'un second amplificateur (52, 59, 61) assurant une amplification additionnelle du signal transmis compatible avec une seconde plage de potentiel d'exploitation, la seconde plage étant plus grande que la première, et d'un transformateur (90) utilisé pour connecter le signal transmis par le second amplificateur (52, 59, 61) au système de communications sur ligne de courant électrique. Un circuit de retour (70, 71, 72) relie la sortie du second amplificateur (52, 59, 61) à l'entrée du premier amplificateur (23) et fonctionne de façon à maintenir une faible impédance de sortie alors que le circuit de l'amplificateur fonctionne en mode transmission. Le circuit de commande (14, 40) est couplé au second amplificateur (52, 59, 61) pour transférer le circuit de l'amplificateur du mode transmission à un mode réception. Dans le mode réception, le circuit de l'amplificateur présente une impédance de sortie relativement élevée.
EP92912752A 1991-05-10 1992-05-07 Drive amplifier for power line communications Withdrawn EP0583398A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US69845591A 1991-05-10 1991-05-10
US698455 1991-05-10

Publications (2)

Publication Number Publication Date
EP0583398A1 EP0583398A1 (fr) 1994-02-23
EP0583398A4 true EP0583398A4 (en) 1997-03-05

Family

ID=24805329

Family Applications (1)

Application Number Title Priority Date Filing Date
EP92912752A Withdrawn EP0583398A4 (en) 1991-05-10 1992-05-07 Drive amplifier for power line communications

Country Status (4)

Country Link
EP (1) EP0583398A4 (fr)
AU (1) AU2005192A (fr)
GB (1) GB2271482A (fr)
WO (1) WO1992021177A1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6052027A (en) * 1997-04-07 2000-04-18 Bhc Consulting Pty Ltd. Wideband operational amplifier having a plurality of feedback loops
US7180412B2 (en) 2003-07-24 2007-02-20 Hunt Technologies, Inc. Power line communication system having time server
US7742393B2 (en) 2003-07-24 2010-06-22 Hunt Technologies, Inc. Locating endpoints in a power line communication system
US7102490B2 (en) * 2003-07-24 2006-09-05 Hunt Technologies, Inc. Endpoint transmitter and power generation system
US6998963B2 (en) 2003-07-24 2006-02-14 Hunt Technologies, Inc. Endpoint receiver system
US7236765B2 (en) 2003-07-24 2007-06-26 Hunt Technologies, Inc. Data communication over power lines
US7145438B2 (en) 2003-07-24 2006-12-05 Hunt Technologies, Inc. Endpoint event processing system
FR2985867B1 (fr) * 2012-01-16 2014-10-31 Peugeot Citroen Automobiles Sa Systeme de communication par courants porteurs hautes frequences plc sur une ligne pilote
CN103973242B (zh) * 2014-05-21 2017-04-19 瑞斯康微电子（深圳）有限公司 一种电力线载波功率放大电路

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1542629A (en) * 1973-04-04 1979-03-21 Plessey Co Ltd House exchange telephone system
US4637073A (en) * 1984-06-25 1987-01-13 Raytheon Company Transmit/receive switch

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4451801A (en) * 1981-08-24 1984-05-29 National Semiconductor Corporation Wideband linear carrier current amplifier
US4746897A (en) * 1984-01-30 1988-05-24 Westinghouse Electric Corp. Apparatus for transmitting and receiving a power line

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1542629A (en) * 1973-04-04 1979-03-21 Plessey Co Ltd House exchange telephone system
US4637073A (en) * 1984-06-25 1987-01-13 Raytheon Company Transmit/receive switch

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO9221177A1 *

Also Published As

Publication number Publication date
EP0583398A1 (fr) 1994-02-23
GB9322081D0 (en) 1994-02-09
AU2005192A (en) 1992-12-30
WO1992021177A1 (fr) 1992-11-26
GB2271482A (en) 1994-04-13

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