EP0557475A1 - Minimization of gto gate driver losses when antiparallel diode conduct - Google Patents

Abstract

Power conversion system for supplying alternating current to a multi-phase alternating current electric motor comprising an inverter comprising a plurality of independently controllable switching devices in order to selectively couple each phase of the motor to a unipolar electric power source . A control processor selectively activates the controllable switching devices to control the power sent to the motor. Each of the switching devices is derived by a respective diode from a plurality of antiparallel coupling diodes. The control processor combined with current sensors determines the amplitude and direction of the current during each phase of the motor. Said control processor inhibits the triggering of the controllable switching devices when the current in one of the associated diodes exceeds a preselected amplitude so that the switching devices are not triggered during the period during which the polarization of the devices is reversed. This system thus reduces power consumption and heat dissipation in the devices and in the associated loss control circuit.

Description

MINIMIZATION OF GTO GATE DRIVER LOSSES WHEN ANTIPARALLEL DIODE CONDUCT

BACKGROUND OF THE INVENTION This invention relates to inverter systems and, more particularly, to inverter systems using gate turn-off (GTO) devices for controlling power to a reactive load and to a method and apparatus for reducing power consumption in such GTO devices and associated gate driver circuits when reactive current prevents current transfer into the GTO device.

Power conversion systems for converting direct current (DC) power to alternating current (AC) power, commonly referred to as inverters, are well known in the art. In a typical form, these inverters comprise a pair of switching devices, such as GTO devices, serially connected between relatively positive and relatively negative power busses. A junction intermediate the GTO devices is connected to a load, such as an AC motor. For a multi-terminal load, such as a three-phase electric motor, three such inverters are utilized, each coupled to a respective one of the motor phases. In each inverter phase, only one GTO device conducts current at any time, one of the devices being connected to conduct current in a first direction through the load and the other of the devices being connected to conduct current in a second direction through the load.

Since current or voltage to the load is regulated by controlling the conduction cycles of the GTO devices in each inverter phase, there are times when neither of the devices in a phase are conducting and yet a current path must be provided for reactive current. For this reason, diodes are connected in parallel with each of the GTO devices with the diodes being poled oppositely of the associated GTO devices for conducting current in a reverse direction. In an exemplary inductively reactive load such as a motor, current through a phase winding is shunted from a GTO device into a diode when the GTO device is forced out of conduction.

During a time period when a substantial current exists in a diode, gating of the associated GTO device is ineffective to reverse the direction of current in the connected reactive load. More specifically, when current is flowing through the diode, the parallel connected GTO is reverse biased. If gate current is applied to the GTO device during this time period, the only effect is to draw a relatively large current from the GTO gate driver circuit. Since the gate current when the GTO device is being gated is much higher than when it is not being gated and the power dissipation even without anode current is relatively large, it is desirable to avoid gating of the GTO device when the device is reverse biased, i.e., when the parallel connected diode is carrying current. When the GTO device is connected in an inverter for supplying power to an induction motor, current lags the voltage resulting in a significant portion of time in which current is carried by a diode in parallel with a GTO device. Thus, there is a significant portion of time in which it is not desirable to apply gating current to a GTO device in order to avoid unnecessary power consumption and to minimize unnecessary heat dissipation.

SUMMARY OF THE INVENTION The above and other desirable advantages are attained in a power control system for an AC electric, multi-phase motor including an inverter circuit coupled to the motor for supplying regulated AC power to control the power output and/or speed of the motor. In one form, the system includes an inverter having a plurality of stages each coupled to a respective one of the phase windings of the motor. Each inverter stage includes a pair of series connected semiconductor switching devices serially coupled between relatively positive and relatively negative DC power busses. A unidirectional device, such as a diode, is coupled in anti-parallel circuit arrangement with each switching device. Means are provided for determining current flow in each phase winding of the motor. A microcomputer control supplies gating signals through a gate driver circuit to each of the switching devices to effect their conduction at preselected times in order to regulate operation of the motor. The control includes means responsive to the current in the motor windings for inhibiting gating of the switching devices when current in an associated anti-parallel diode exceeds a threshold value that prevents the switching device to effect a current reversal in the respective motor phase winding. The switching devices are preferably GTO thyristors and current in at least one phase of the motor is computed from monitored current in the other phases.

BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding of the present invention, reference may be had to the following detailed description taken in conjunction with the accompanying drawings in which: FIG. 1 is a partial schematic, partial block diagram of a power conversion circuit implementing the present invention; and

FIG. 2 is a functional block diagram of the method of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a simplified partial schematic, partial block diagram of a power conversion system incorporating the teachings of the present invention. The power conversion system is illustrated as a three phase inverter comprising inverter sections 10A, 10B, and IOC connected for controlling power to a three phase induction motor M. The inverter sections are coupled between relatively positive and relatively negative voltage rails 12 and 14, respectively. The rails 12 and 14 are connected to a power source 16 which may comprise a battery or other power generating means. A filter comprising series inductor 18 and shunt capacitor 20 isolates the battery 16 from the transients generated by the inverter circuit. Each of the inverter sections 10A, 10B, and 10C are substantially identical. Each section includes a pair of controllable switching devices 22 and 24 coupled in series between rails 12 and 14. Each of the switching devices 22, 24 has coupled in parallel with it a snubber circuit 26, 28, respectively, to limit the rate of change of current when turning on and to limit the rate of change of voltage when turning off. Various types of snubber circuits are well known in the art and no additional description is deemed necessary. Discussions of snubber circuits are set forth in a paper by A. Ferraro, "An Overview of Low Loss Snubber Technology for Transistor Converters", published in the Conference Record IEEE Power Electronics Specialists Conference, 1982, pp. 466-477. The controllable switching devices 22, 24 may be thyristors, transistors, or other semiconductor devices but in a preferred form comprise gate turn-off (GTO) devices or GTO thyristors. A GTO thyristor is a multi-layer semiconductor designed to freely conduct "forward" anode current, i.e., current flowing into its anode and out of its cathode, when its gate electrode is triggered by a suitable turn-on or firing signal. A GTO thyristor is distinguished from a conventional thyristor by its ability to interrupt or block forward anode current if a voltage of relatively negative polarity and appropriate magnitude and duration is applied across its gate-cathode junction. Such voltage is negative in the sense that the electrical potential of the gate is negative with respect to the cathode. It causes current to flow in a reverse direction in the thyristor¹s gate. In other words, to turn off a GTO thyristor, current is drained from the gate. Hereinafter, such current is referred to as either "negative gate current" or the "turn-off signal*.

In normal operation, the anode current-blocking or turn-off process of a GTO thyristor can be initiated at any time without waiting for a natural or externally forced zero crossing of the anode current. During the turn-off process, the negative gate current rapidly rises to a high peak that depends on the magnitude of anode current to be interrupted and then subsides as the thyristor recovers its ability to withstand off-state anode voltage. Once a turn-off process is successfully completed, the resistance of the gate-cathode junction is very high and limits negative gate current to a trivial magnitude. In the present invention, the GTO devices 22, 24 are alternately conductive so as to provide bi¬ directional current to each phase of the induction motor M. Considering inverter section 10A having corresponding GTO devices 22A and 24A, when device 22A is conductive, current I, is directed into motor M in the direction of arrow 30. After a predetermined time period, GTO device 22A is gated out of conduction. Since the motor M is an inductive reactive load, current I₁ cannot immediately cease without creating an infinite voltage rise. Accordingly, current I₁ transfers from the GTO device 22A to unidirectional conducting device 32A. The device 32A, preferably a power diode, is connected in a parallel circuit path with GTO device 24A but poled reversely with respect to device 24A. A companion unidirectional device 34A is connected in parallel with GTO device 22 in the same manner as device 32A. Current I₁ transfers to device 32A since the collapsing current in the phase winding of motor M causes a voltage reversal across the winding thereby forward biasing diode device 32A. At another predetermined time period, GTO device 24A is gated into conduction to thereby reverse the direction of current I_t in the corresponding phase winding of motor M as indicated by arrow 36. When GTO device 24A is thereafter gated out of conduction, current I, transfers to diode device 32A. This same process occurs for each winding of the motor M with the respective GTO devices 22, 24 being gated into and out of conduction in a manner to regulate power developed by motor M. One form of three phase inverter using GTO devices for controlling power to a motor is described in a paper by Kansaki et al., "Inverter Control System for Driving Induction Motors in Rapid Transit Cars Using High Power Gate Turn-off Thyristors", published in the Conference Record of the ISPCC, 1982, pp. 145-156.

Since GTO devices can be gated into and out of conduction, they require gate drive current of two polarities. The initial power required at the instant when polarity bias power required to hold the device on or off. Further, the bias current to hold the device in conduction may be from three to six amps for a typical induction motor load whereas the gate leakage current when the device is off may be only a few microamps. Consequently, the power dissipated in the GTO device when initially gated between on and off states and when in the on state is significantly higher than when the GTO device is in an off state. The gate driver circuit 38, which is connected to provide the bipolar gate drive current to each of the GTO devices 22, 24, experiences similar high power dissipation each time that the circuit 38 switches polarity at one of its outputs or when it is supplying "on" gate drive current. A gate drive circuit suitable for use as gate drive circuit 38 may take various forms and one exemplary form is shown in U.S. Patent No. 4,593,204 issued June 3, 1986 to McMurray, assigned to the assignee of the present invention.

The present invention is intended to minimize the power dissipation in the gate driver circuit 38 and in the GTO devices 22, 24 by inhibiting generation of gate drive current to respective ones of the GTO devices 22, 24 when a corresponding parallel connected diode device 32, 34 is conducting current above a predetermined level. In order to achieve this desirable result, the drive current to at least two of the three phases of motor M is monitored by current sensors 40 and 42. Although the third phase could also be monitored, the sum of I_1f I₂, and I₃ must equal zero allowing current in the third phase to be determined from current in the other phases. In the illustrative example, current I₁ and I₃ are monitored by sensors 40 and 42, respectively, and current I₂ is calculated within control processor 44.

Processor 44 may take the form of a microcomputer programmed to control gating of GTO devices 22, 24 in a manner to regulate power output of motor M or to maintain a preselected speed profile of motor M. The processor 44 may include various logic circuits and include analog-to-digital (A/D) converter 46 for translating the analog current signals from sensors 40, 42 to corresponding digital values, Control processors suitable for use as processor 44 are well known in the art. The inhibit function described herein may be implemented by logically combining the current signals from sensors 40, 42 with the gating commands to the GTO devices 22, 24. For example, if current I, is in the direction of arrow 30 and processor 44 initiates a signal to attempt to cause gate driver circuit 38 to generate an "on" command to GTO device 24, the signal from sensor 40 can be logically ANDED with the signal from processor 44 to inhibit the actuation of gate driver circuit 38 until current I, is less than a preselected threshold value.

For a clearer understanding of the operation of the inventive system, reference is made to the functional flowchart of FIG. 2. At block 48, the current signal I_x, i.e., I,, l₂, or I,, is tested to determine if it exceeds the threshold value I_τ. I_τ may be zero or some predetermined non-zero value at which gating of a corresponding GTO device will be effective to reverse current flow in a respective one of the motor phases. If the I_x signal is representative of phase current less than the threshold value, no inhibiting of gating of the GTO devices is necessary and the program function loops back to the start location. If the value of I_x exceeds I_τ, the direction of current is determined, i.e., is I_x greater than or less than zero, block 50. If I_χ is greater than zero, then either GTO 22 is conducting or diode 34 is conducting. Conversely, if I_χ is less than zero, then either GTO 22 is conducting or diode 32 is conducting. Block 52 determines, from the gating signals issued to gate driver circuit 38, if GTO device 22 is conducting. If device 22 is conducting, inhibiting is unnecessary and the program loops to start. If device 22 is not conducting, the program checks for gating commands to GTO 24, block 54, and inhibits such commands, block 56. Thus, gating of GTO device 24 is inhibited if current in parallel connected diode 32 is above a preselected threshold value I_τ since such gating is ineffective with the device 24 reversed biased except to increase power dissipation in device 24 and gate driver circuit 38.

In a similar manner, the system verifies the operation of GTO device 24, block 58, testing for gating signals to GTO device 22, block 60, and inhibiting such gating signals, block 62, if the system attempts to gate GTO device 22 while current through diode 34 has device 22 reverse biased.

The functional block diagram of FIG. 2 is descriptive of system operation whether the implementation is in a microcomputer or a hardwired logic circuit. The arrangement assures that an "on" gate drive current is only supplied when needed and not when the associated GTO device is reverse biased by a forward biased anti-parallel diode. Further, additional losses occurring due to redundant switching are avoided, including the aforemen'tioned losses associated with switching the GTO device to an "off" state even if the device does not experience an anode- cathode current.

While the principles of the present invention have now been made clear in an illustrative embodiment, it will become apparent to those skilled in the art that many modifications of the structures, arrangements, and components presented in the above illustrations may be made in the practice of the invention in order to develop alternate embodiments suitable to specific operating requirements without departing from the spirit and scope of the invention as set forth in the claims which follow.

Claims

CLAIMSWhat Is Claimed Is;

1. A method for reducing power consumption in an electric power control circuit including at least one GTO thyristor and at least one diode connected in parallel circuit arrangement with the GTO thyristor, the diode being poled to connect electric current in a direction opposite to the direction of current through the GTO thyristor, the system further including a gate driver circuit for supplying current to a gate terminal of the GTO thyristor to effect conduction thereof, the method comprising the steps of: monitoring current in the diode; and inhibiting operation of the gate driver circuit when current in the diode exceeds a predetermined value.

2. The method of claim 1 wherein the power control circuit is coupled in a current path with an inductive load and the step of inhibiting includes the step of inhibiting operation of the gate driver circuit until current will transfer to the GTO thyristor upon gating thereof.

3. The method of claim 1 wherein the step of monitoring comprises monitoring the direction of current in the inductive load coupled to the GTO thyristor power circuit.

4. The method of claim 3 wherein the inductive load comprises a three phase AC load, each phase being coupled to a respective power control circuit, the step of monitoring including the step of monitoring current in two of the three phases and computing the direction of current flow in the remaining phase from the two monitored phase currents.

5. A power conversion system for supplying AC power to a multiple phase, AC electric motor, the system including an inverter comprising a plurality of independently controllable switching devices for selectively coupling each phase of the motor to a source of unipolar electric power, means for selectively gating the controllable switching means for controlling power to the motor, each of the switching devices being bypassed by a respective one of a plurality of unidirectional conducting means, each of the unidirectional conducting means being poled to conduct current in a direction opposite to current through said switching devices, the improvement comprising: means for determining the magnitude and direction of current in each phase of the motor; and means responsive to the determining means for inhibiting gating of the controllable switching means when current in an associated one of the unidirectional conducting means exceeds a preselected magnitude.

6. The system of claim 5 wherein each of the switching devices comprises a gate turn-off (GTO) device having a gate terminal connected to the gating means, said inhibiting means being effective to selectively inhibit gating of selected ones of the GTO devices.

7. The system of claim 5 wherein the motor includes three phases and wherein said determining means comprises a first current sensor coupled for monitoring current in a first phase, a second current sensor for monitoring current in a second phase, and processing means for computing current in a third phase from current in said first and second phase.

8. A power control system for a three phase electric motor comprising: an inverter having three independently controllable inverter sections, each section having a pair of gate turn-off (GTO) thyristors serially connected between a relatively positive and a relatively negative pair of power rails, each of the GTO thyristors having a corresponding anti-parallel diode electrically connected thereto, a junction intermediate each pair of GTO thyristors being coupled to a respective one of the phases of the electric motor; current sensing means coupled in circuit with at least two of the three phases of the electric motor for providing signals representative of current in the at least two phases; gate driver means having a plurality of gate drive output terminals, each of the terminals being coupled to a gate terminal of a respective one of the GTo thyristors for gating the GTO thyristors into and out of conduction in response to gating signals from said gate driver means; control processor means coupled to said gate driver means for controlling the generation of gating signals in a manner to regulate the power output of the motor, said processor means being responsive to signals from said current sensing means for inhibiting generation of said gating signals to a selected one of said GTO thyristors when said current signals are indicative of current in said diode connected in parallel with the selected one of the GTO thyristors for reducing power consumption and thermal dissipation attributable to gating of said GTO thyristors when reverse biased.

9. The power control system of claim 8 wherein said control processor means calculates current in another of said three phases from measured current in the at least two phases.