EP0520579A3 - - Google Patents

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Publication number
EP0520579A3
EP0520579A3 EP19920201877 EP92201877A EP0520579A3 EP 0520579 A3 EP0520579 A3 EP 0520579A3 EP 19920201877 EP19920201877 EP 19920201877 EP 92201877 A EP92201877 A EP 92201877A EP 0520579 A3 EP0520579 A3 EP 0520579A3
Authority
EP
European Patent Office
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19920201877
Other languages
French (fr)
Other versions
EP0520579A2 (fr
EP0520579B1 (fr
Inventor
Marc Duranton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Laboratoires dElectronique Philips SAS
Philips Gloeilampenfabrieken NV
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laboratoires dElectronique Philips SAS, Philips Gloeilampenfabrieken NV, Koninklijke Philips Electronics NV filed Critical Laboratoires dElectronique Philips SAS
Publication of EP0520579A2 publication Critical patent/EP0520579A2/fr
Publication of EP0520579A3 publication Critical patent/EP0520579A3/fr
Application granted granted Critical
Publication of EP0520579B1 publication Critical patent/EP0520579B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
EP92201877A 1991-06-28 1992-06-25 Dispositif de traitement de l'information plus particulièrement adapté à un langage chaíné, du type FORTH notamment Expired - Lifetime EP0520579B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9108062A FR2678401A1 (fr) 1991-06-28 1991-06-28 Dispositif de traitement de l'information plus particulierement adapte a un langage chaine, du type forth notamment.
FR9108062 1991-06-28

Publications (3)

Publication Number Publication Date
EP0520579A2 EP0520579A2 (fr) 1992-12-30
EP0520579A3 true EP0520579A3 (lt) 1994-02-16
EP0520579B1 EP0520579B1 (fr) 1999-06-02

Family

ID=9414459

Family Applications (1)

Application Number Title Priority Date Filing Date
EP92201877A Expired - Lifetime EP0520579B1 (fr) 1991-06-28 1992-06-25 Dispositif de traitement de l'information plus particulièrement adapté à un langage chaíné, du type FORTH notamment

Country Status (5)

Country Link
US (1) US5479621A (lt)
EP (1) EP0520579B1 (lt)
JP (1) JP3233686B2 (lt)
DE (1) DE69229302T2 (lt)
FR (1) FR2678401A1 (lt)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5867681A (en) * 1996-05-23 1999-02-02 Lsi Logic Corporation Microprocessor having register dependent immediate decompression
US5794010A (en) * 1996-06-10 1998-08-11 Lsi Logic Corporation Method and apparatus for allowing execution of both compressed instructions and decompressed instructions in a microprocessor
US5905893A (en) * 1996-06-10 1999-05-18 Lsi Logic Corporation Microprocessor adapted for executing both a non-compressed fixed length instruction set and a compressed variable length instruction set
US5896519A (en) * 1996-06-10 1999-04-20 Lsi Logic Corporation Apparatus for detecting instructions from a variable-length compressed instruction set having extended and non-extended instructions
JP2000507019A (ja) * 1996-12-13 2000-06-06 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 直列式に動作する２台のプログラムドロジックコントローラを有する冗長データ処理システム
EP0992881A1 (en) * 1998-10-06 2000-04-12 Texas Instruments Inc. A processor
GB9822191D0 (en) * 1998-10-13 1998-12-02 Kubiczek Maciej High performance low cost microprocessor
US6633969B1 (en) 2000-08-11 2003-10-14 Lsi Logic Corporation Instruction translation system and method achieving single-cycle translation of variable-length MIPS16 instructions

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0185215A2 (en) * 1984-11-21 1986-06-25 Harris Corporation Forth-like language microprocessor

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3958222A (en) * 1974-06-27 1976-05-18 Ibm Corporation Reconfigurable decoding scheme for memory address signals that uses an associative memory table
US4070703A (en) * 1976-09-27 1978-01-24 Honeywell Information Systems Inc. Control store organization in a microprogrammed data processing system
US4462073A (en) * 1978-11-08 1984-07-24 Data General Corporation Apparatus for fetching and decoding instructions
US4415969A (en) * 1980-02-07 1983-11-15 Intel Corporation Macroinstruction translator unit for use in a microprocessor
US4514800A (en) * 1981-05-22 1985-04-30 Data General Corporation Digital computer system including apparatus for resolving names representing data items and capable of executing instructions belonging to general instruction sets
US4499604A (en) * 1981-05-22 1985-02-12 Data General Corporation Digital data processing system for executing instructions containing operation codes belonging to a plurality of operation code sets and names corresponding to name table entries
US4794522A (en) * 1985-09-30 1988-12-27 International Business Machines Corporation Method for detecting modified object code in an emulator
US4841476A (en) * 1986-10-06 1989-06-20 International Business Machines Corporation Extended floating point operations supporting emulation of source instruction execution
US4972317A (en) * 1986-10-06 1990-11-20 International Business Machines Corp. Microprocessor implemented data processing system capable of emulating execution of special instructions not within the established microprocessor instruction set by switching access from a main store portion of a memory
US4785392A (en) * 1986-10-14 1988-11-15 Amdahl Corporation Addressing multiple storage spaces
US5210832A (en) * 1986-10-14 1993-05-11 Amdahl Corporation Multiple domain emulation system with separate domain facilities which tests for emulated instruction exceptions before completion of operand fetch cycle
US4992934A (en) * 1986-12-15 1991-02-12 United Technologies Corporation Reduced instruction set computing apparatus and methods
FR2645986B1 (fr) * 1989-04-13 1994-06-17 Bull Sa Procede pour accelerer les acces memoire d'un systeme informatique et systeme pour la mise en oeuvre du procede

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0185215A2 (en) * 1984-11-21 1986-06-25 Harris Corporation Forth-like language microprocessor

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ELECTRONIC DESIGN vol. 35, no. 12, 14 Mai 1987, HASBROUCK HEIGHTS, NJ, US pages 93 - 100 T. JONES ET AL 'Standard-cell CPU toolkit crafts potent processors' *
INSPEC Database Institute of Electrical Engineers, LONDON, GB J. R. HAYES et al; "A 32 Bit Forth Microprocessor"; Accession No. 3190100 *

Also Published As

Publication number Publication date
EP0520579A2 (fr) 1992-12-30
EP0520579B1 (fr) 1999-06-02
DE69229302T2 (de) 1999-12-02
JP3233686B2 (ja) 2001-11-26
FR2678401A1 (fr) 1992-12-31
JPH05189240A (ja) 1993-07-30
DE69229302D1 (de) 1999-07-08
US5479621A (en) 1995-12-26

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