EP0505423A1

EP0505423A1 - Signal processing circuits

Info

Publication number: EP0505423A1
Application number: EP19910900875
Authority: EP
Inventors: Micheal Andrew Kellett
Original assignee: Individual
Current assignee: Individual
Priority date: 1989-12-11
Filing date: 1990-12-11
Publication date: 1992-09-30
Also published as: GB2239096A; GB9026834D0; WO1991009315A1; AU6955791A; GB2239096B; GB8927927D0

Abstract

Un système destiné à un ensemble à capteur piézoélectrique comporte un capteur (2) et un circuit de traitement de signaux (20, 21, 22), et est caractérisé en ce que des moyens sont prévus pour permettre, au moyen d'un condensateur (18), l'injection, dans l'ensemble, de signaux de test de sorte que les écarts de performances de l'ensemble à capteur par rapport aux valeurs requises/prédéterminées puissent être détectés sans modification du capteur et/ou du circuit.A system for a piezoelectric sensor assembly includes a sensor (2) and a signal processing circuit (20, 21, 22), and is characterized in that means are provided for enabling, by means of a capacitor ( 18), the injection, in the assembly, of test signals so that the differences in performance of the sensor assembly with respect to the required / predetermined values can be detected without modification of the sensor and / or of the circuit.

Description

SIGNAL PROCESSING CIRCUITS

BACKGROUND OF THE INVENTION

This invention relates to signal processing circuits and particularly to signal processing circuits associated with piezo electric transducers.

The present invention is particularly concerned with signal processing circuits for piezo electric transducers when utilised as accelerometers.

With such applications of transducers it is important that a very high degree of reliablity should be attained. In view of this it becomes more and more important to be able to establish correct functioning of transducers whilst they are undergoing their normal operation.

OBJECT OF THE INVENTION

It is an object of the present invention to provide means for the testing of a piezo electric transducer and its associated signal processing circuit whilst the transducer and cicuit are undergoing normal operation.

STATEMENTS OF THE INVENTION

According to a first aspect of the invention there is provided a method of testing the operational condition of a piezo electric transducer assembly including a transducer and a signal processing circuit, including the step of applying test signals by way of a capacitor to the transducer assembly in such manner that departures from required/predetermined operational performance of the transducer assembly can be established without involving modification of the transducer and/or circuit.

In accordance with a second aspect of the invention there is provided a system for a piezo electric transducer assembly including a transducer and a signal processing circuit, characterised in that means are provided for for enabling injection by way of a capacitor test signals into the assembly in such manner that departures from required/predetermined operational performance of the transducer assembly can be established without modification of the transducer and/or circuit.

In a preferred system a test signal input terminal is coupled to the positive voltage input of a voltage amplifier incorporated in the signal processing circuit by way of said capacitor.

Preferably, the ratio of the value of the capacitance of the capacitor to the source capacitance of the transducer is less than 0,1 to 1.

In particular, control means are provided for deriving from the output from the transducer assembly logic type signals which are arranged to provide said test signals.

BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding of the invention and to show how to carry the same into effect reference will now be made to the accompanying drawings in which;

Figure 1 very schematically illustrates an electrical model of a piezo electric transducer assembly, as being a combination of a voltage generator and a capacitor;

Figure 2 illustrates the piezo electric transducer presentation of Figure 1 when incorporated into signal processing circuit;

Figure 3 illustrates the application of the concepts of the invention to the circuit of Figure 2;

Figure 4 illustrates a more complex embodiment of a filtering and amplifier circuit incorporating the features of the invention; and

Figure 5 very schematically illustrates the incorporation of the arrangement of Figure 4 into a transducer application system.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to the drawings and particularly to Figure 1 in this Figure a piezo electric transducer assembly 1 is schematically illustrated as presenting electrically a voltage generator 2 whose output is proportional to the effect that the transducer assembly is intended to measure connected in series with a capacitor 3 formed by the source capacity of the transducer. Whilst the present invention is particularly concerned with the use of piezo electric transducers intended to serve as accelerometers the concepts and features to be discussed herein apply also to other applications of piezo electric transducer.

As may be expected the electrical output levels of a transducer invariably require amplification.

Figure 2 illustates a voltage amplifier. The circuit of Figure 2 is a combination of the transducer assembly of Figure 1 and a first embodiment of an amplifier circuit including an amplifier 5 having positive and negative voltage inputs 6 and 7, and an output 8. The positive input 6 is connected by way of a resistor 9 to a common ground line 10, and to a voltage input terminal 11.

The negative input 7 of the amplifier is connected through a resistor 12 to the common ground line 10 which latter is also connected to a second input terminal 13. The conventional negative feedback from the output 8 to the negative input 7 is by way of a resistor 14. The voltage gain of the amplifier is determined by the ratio of the resistance values of the resistors 12 and 14.

In the Figure 2 embodiment the transducer model as represented by Figure 1 is connected to the input terminals 11 and 13.

In use, any change in the physical parameter to which the transducer assembly 1 is intended to respond i.e., the development of or change of acceleration forces causes the transducer assembly to produce an output signal which is passed to the amplifier 5 the amplified output being produced at the output 8. With the circuit of Figure 2 the combination of the transducer source capacitance and the resistor 9 provides a low pass filter such that the ratio of the magnitude of the source capacitance and the resistance value of the resistor 9 determines the lowest frequency of operation of the voltage amplifier circuit of Figure 2.

In practice, as has been noted, with the use of transducers it is of considerable practical importance to be able to measure the operational condition of the transducers involved and the effective functioning of the associated amplifier and signal processing circuitry. This requirement is becoming of considerable practical importance with the application of transducers to control systems demanding high standards of reliablity. In particular, it is of considerable importance to be able to monitor and thus detect any departure from normal operation of a tranducer whilst it is involved in its normal operational environment. Such departures from normal operation can be as simple as an open circuit condition arising from mechanical disconnection or the transducer breaking away from its mounting location or in the event that the transducer becomes loosely attached to its mounting location instead of being firmly attached to such mounting location.

As has been above mentioned it is desirable to be able to test the operational condition/state of piezo electric transducers and associated circuitry without compromising the normal operation of the transducer and associated circuitry.

One such method of effecting/enabling such testing facility is schematically illustrated in relation to the embodiment shown in Figure 3. In discussing this Figure 3 those components with a function similar to corresponding components of previous Figures will be identified by the same reference numerals.

As will be immediately noted the circuit of Figure 3 is essentially similar to that of Figure 2.

The basic difference between the embodiments shown is the incorporation of a test signal input terminal 17 which is coupled to the positive voltage input 6 of the amplifier 5 by way of a capacitor 18.

The connection of the capacitor 18 with the input 6 allows injection of appropriate test signals into the signal processing circuit. In the Figure this has been schematically illustrated as a voltage generator 18A.

It will be understood that the nature and form of the test signals injected will be related to the particular characteristic of the system it is required to test.

The capacitance value of the capacitor 18 is chosen to be considerably less than that of the source capacity of the transducer. In practice, the ratio can be chosen to suit the particular circumstances and, is typically less than 0,1 to 1.

Thus, for example, a particular value for the capacitor 18 in a system using an accelerometer as discussed can be

220pF, whilst the value of the source capacitance of a piezo electric accelerometer such as has been disclosed in my copending Application No 8823409.1 publication No 2210695A can be 40,000pF.

With the embodiment shown in Figure 3, in the absence of a test signal to the test input pin/terminal 17, the circuit operates as normal except for a slight reduction in gain and an extension of low frequency response arising from the inclusion of the capacitor 18, and which for practical purposes can be ignored.

With the system as so far discussed the output from the amplifier circuit can be represented by a characteristic relationship between output and frequency assuming that the circuit and transducer are both operating correctly as intended.

Thus the application i.e., injection of a test signal to the test signal input terminal 17 would result in a predictable output if the transducer is functioning correctly and a different output in the event that the transducer was for some reason not functioning correctly.

In the event that either or both the circuit and the transducer are not operating correctly the resulting variation of the output following application of a test signal input would reflect the nature of any departure from normal operation of the circuit or transducer. For example, a particular variation of the output signal for a particular test signal frequency could be characteristic of a particular malfunction in the circuit/transducer so that the presence of a particular output signal variation is clearly indicative that a particular malfunction has occured.

Such inter-relationships can be establised by suitable calibration or analysis in the case in which the test signal is associated with logic circuitry. This analysis can be both quantative and qualitative.

It will be appreciated that the embodiment of Figure 3 is a relatively simple basic amplifier arrangement and that in practice, with a view to achieving more complex control and operational conditions circuitry of greater complexity would be involved. One such more complex circuitry is shown in Figure 4. Basically Figure 4 depicts a more complex version of the filter/amplifier circuit of Figure 3, and essentially includes an input amplifier stage 20, together with two further amplifier and filter stages 21 and 22.

The embodiment of Figure 4 can be very briefly considered as follows. The first stage 20 may be regarded as lying between the test input terminal 17 and a stage output to which a terminal 23 is connected. This input stage is generally similar to that of the Figure 3 embodiment with the addition of more complex filter facilities to give a more enhanced performance. The previously mentioned copending Application discusses in more detail a circuit similar to that of Figure 4.

The input stage 20 is followed by the above mentioned two amplifier/filter stages 21 and 22; of these the stage 21 is intended to provide a low pass filter whilst the stage 22 is intended to serve as a high pass filter. It is not not thought necessary to describe the detail of these second and third stages since their operation is not directly involved with the provision of the test signal input capability of the invention.

The -provision of the test signal input facility can be regarded as being part of the transducer assembly, or alternatively the test signal input facility can be regarded as being part of the filter/amplifier circuitry.

With the latter possibility the filter/amplifier circuitry can be maintained physically separate from the transducer assembly in so far as actual transducer applications are concerned. Figure 5 illustrates in block diagrammatic form a system incorporating the concepts of the invention. As shown a transducer assembly 30 incorporating the concepts of the invention is arranged to be responsive to an external stimulus 31. The output from the transducer assembly 30 feeds to a control system 32 whose operation is dependent upon the information contained in the transducer output. The control system 32 can be such as to be able to produce a test signal output 33 which is applied to the test input 34 to the transducer assembly. The test signals can take whatever electrical form thought appropriate. Clearly, a separate source of test signals can be used if desired.

It will be appreciated that the proposal to inject the test signals by way of a capacitor in accordance with the invention has provided a seemingly simple solution to a problem which has hitherto involved considerable complexity in being able to test the performance of a piezo electric transducer without disturbing adversely the output from the transducer one is trying to test. A further advantage of the proposal of the invention is that it is possible, in practice, to arrange for test signal injection terminals to be actually on the transducer to be tested and/or connected thereto through wiring from a remote or central test position.

The application of the test signals to the assembly of the transducer and its associated signal processing circuit can be at any convenient point of time in relation to the operation of the transducer and its associated signal processing circuit.

Thus test signals can be injected immediately after start-up of the assembly, at suitable times during rhe operation of the assembly; such testing can be cyclic or random.

For example, in the case of accelerometers provided on motor vehicles it can be convenient to carry out the testing operations on the assembly whilst the vehicle is at rest.

Claims

1. A method of testing the operational condition of a piezo electric transducer assembly including a transducer and a signal processing circuit, including the step of applying test signals by way of a capacitor to the transducer assembly in such manner that departures from required/predetermined operational performance of the transducer assembly can be established without involving modification of the transducer and/or circuit.

2. A system for a piezo electric transducer assembly including a transducer and a signal processing circuit, characterised in that means are provided for for enabling injection by way of a capacitor test signals into the assembly in such manner that departures from required/predetermined operational performance of the transducer assembly can be established without modification of the transducer and/or circuit;

3 A system as claimed in claim 2, and characterised in that a test signal input terminal is coupled to the positive voltage input of a voltage amplifier incorporated in the signal processing circuit by way of said capacitor.

4. A system as claimed in claim 3, and characterised in that the ratio of the value of the capacitance of the capacitor to the source capacitance of the transducer is less than 0,1 to 1.

5. A system as claimed in any of claim 3,or 4, and characterised in that the piezo electric transducer forms an accelerometer.

6. A system as claimed in any of claims 2 to 5, and characterised in that control means are provided for deriving from the output from the transducer assembly logic type signals which are arranged to provide said test signals.