EP0477165A2 - Current-limiting circuit - Google Patents
Current-limiting circuit Download PDFInfo
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- EP0477165A2 EP0477165A2 EP91890211A EP91890211A EP0477165A2 EP 0477165 A2 EP0477165 A2 EP 0477165A2 EP 91890211 A EP91890211 A EP 91890211A EP 91890211 A EP91890211 A EP 91890211A EP 0477165 A2 EP0477165 A2 EP 0477165A2
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- current source
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
- G05F1/573—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/577—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices for plural loads
Definitions
- the invention relates to a current limiting circuit for a load connected to a supply voltage source, with a control device which influences the load current via an actuator.
- the object of the present invention is a current limiting circuit to improve the type mentioned at the beginning in such a way that the disadvantages mentioned are avoided and that, in particular even with large currents (typically greater than 5 A), short reaction times (typically below 20 nSec) are made possible. Furthermore, good controllability of the current limitation without control vibrations should be achieved.
- control device has, in a branch lying parallel to the supply voltage source, a reference current source controlled via a reference voltage input and a feedback current source connected in series, and in that the actuator has at least two parallel connected load current sources which are connected in series to the load are arranged and at which the reference voltage provided by the feedback current source is located.
- the reference current source which can be controlled via the reference voltage input and thus controls the current limitation of the load, is located at the circuit input.
- This reference current source supplies the feedback current source, as a result of which the reference voltage is a function of a fixed, corresponding internal property of the feedback current source (for example the transconductance of the MOS-FET mentioned below as an embodiment) and the input current.
- This reference voltage is applied to the actuator, which has at least two load current sources connected in parallel, which are arranged in series with the load.
- the output current (n + 1) is thus greater than the reference current because any number of load current sources are connected in parallel on the output side.
- At least the feedback current source and the load current sources have MOS-FETs whose GATE and DRAIN connections are each connected to one another.
- the entire circuit can be integrated in the simplest way, both P-channel and N-channel versions being possible.
- the internal feedback in the MOS-FETs virtually replaces the previously used external control loop, which ensures extremely short reaction times with the simplest design.
- the miller capacitance (corresponds to an increase in the collector-base capacitance under the effect of the voltage amplification of the circuit) of the MOS-FETs of the current sources is compensated for by a switchable parallel impedance. This means that response times in the range of 5 nSec have already been achieved in experimental circuit designs.
- Examples of possible areas of application for the current limiting circuit according to the invention are power stages, analog testers, measuring devices or power supplies.
- the coverable current or voltage range is essentially only dependent on the available current sources (for example so-called “SIPMOS” transistors). In all cases, a vibration-free transition to current limiting operation is ensured.
- a current limiting circuit for a load connected to a supply voltage source U (shown here as load resistor R) is equipped with a control device, generally designated 1, which influences the load current via an actuator, generally designated 2.
- the control device 1 has, in a branch 3 lying parallel to the supply voltage source U, a reference current source 4 controlled via a reference voltage input U ref and a feedback current source 5 lying in series with it.
- the actuator 2 in turn has at least two load current sources 6 connected in parallel, which are arranged in series with the load R and on which the reference voltage U G provided by the feedback current source is present.
- the reference current source 4 which is controlled via the control input or reference voltage input U ref, supplies the reference current I ref to the fed-back current source 5 via the line 7.
- the voltage drop occurring there is a function of one of its fixed internal properties and of the input current.
- the reference voltage UG obtained in this way is applied to the parallel load current sources 6, with the result that the output current is finally (n + 1) times - where n is the number of load current sources 6 - greater than the reference current I ref .
- the current limiting circuit according to FIG. 2 differs from that according to FIG. 1 only by the schematic here registered compensation of the miller capacitance of the load current sources 6 (for example MOS-FETs) by means of a parallel impedance Z which can be switched on via an indicated switch 8, whereby the response time of the circuit to current fluctuations can be further reduced.
- the switch 8 can, for example, also be formed by a correspondingly connected MOS-FET - in the simplest case, the parallel impedance Z can be realized by an appropriately dimensioned capacitor. In this context, it should be regarded as essential that a certain delay in the response of the compensation is achieved via the switch 8, which should typically be in the region of 5 nsec.
- the current limiting circuit is again constructed similarly to FIG. 1, but here the feedback current source 5 and the two load current sources 6 are formed by MOS-FETs, the GATE and DRAIN connections of which are connected to one another.
- the entire circuit arrangement can thus be integrated very easily, with the result that such a circuit can be provided on a single module for the first time.
- the reference current source 4 here supplies the B-channel MOS-FET of the feedback current source 5, the DRAIN and GATE electrodes of which are connected to one another, with reference current.
- the reference voltage U G obtained in this way is applied to the GATE electrode of the further MOS-FETs in the load current sources 6.
- the output current is thus (n + 1) times greater than the reference current I ref .
- the linearity of the current limitation results from the characteristics of the MOS-FETs.
- the temperature and time independent drift is a function of the corresponding technology.
- the lower response time of the current limitation results from the fact that this takes place in parallel in all transistors and the speed of a transistor thus determines the switching speed of the entire circuit.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Control Of Voltage And Current In General (AREA)
- Control Of Electrical Variables (AREA)
- Amplifiers (AREA)
Abstract
Description
Die Erfidung betrifft eine Strombegrenzungsschaltung für eine an einer Versorgungsspannungsquelle liegende Last, mit einer Regeleinrichtung, welche über ein Stellglied den Laststrom beeinflußt.The invention relates to a current limiting circuit for a load connected to a supply voltage source, with a control device which influences the load current via an actuator.
Derartige Strombegrenzungsschaltungen, bzw. auch zumindest vom Aufbau her weitgehend ähnliche Konstantstromquellen, sind bekannnt und bisher üblicherweise in Form eines Regelkreises aufgebaut. In Serie zur Last, bzw. zu dem diese wirkungsmäßig darstellenden Lastwiderstand, ist ein Meßwiderstand eingesetzt, an dem der Laststrom einen Spannungsabfall verursacht. Dieser Spannungsabfall wird einem Regelverstärker zugefürht, dessen Ausgang über ein wiederum in Serie zur Last liegendes Stellglied den Laststrom beeinflußt. Die wesentlichen Nachteile dieser bekannten Anordnung sind, daß über den Meßwiderstand der gesamte Laststrom fließt, was insbesondere bei größeren Strömen zu unerwünscht hoher Verlustleistung führt, daß weiters die Reaktionszeiten des Regelverstärkers und des Stellgliedes sich summieren, und daß schließlich der Meßwiderstand nicht in einen Schaltungsbaustein integrierbar ist.Current limiting circuits of this type, or constant current sources which are at least largely similar in construction, are known and have hitherto usually been constructed in the form of a control loop. A measuring resistor is used in series with the load, or with the load resistance that represents this effect, at which the load current causes a voltage drop. This voltage drop is fed to a control amplifier, the output of which influences the load current via an actuator which is in turn connected to the load. The main disadvantages of this known arrangement are that the entire load current flows through the measuring resistor, which leads to undesirably high power dissipation, in particular with larger currents, that the response times of the control amplifier and the actuator add up, and that the measuring resistor cannot be integrated into a circuit module is.
Zumindest der erste der oben genannten Nachteile kann bei einer unter dem Namen "SENSFET" bekannt gewordenen Ausgestaltung des genannten Grundprinzips vermieden werden, bei welcher durch entsprechende Aufteilung der über den Meßwiderstand fließende Strom sehr viel kleiner (etwa um den Faktor 1000) als der Laststrom ist. Zufolge des nach wie vor vorhandenen separaten Regelverstärkers samt Stellglied bleibt jedoch das nachteilige Zeitverhalten der Gesamtanordnung.At least the first of the above-mentioned disadvantages can be avoided in an embodiment of the basic principle known under the name "SENSFET", in which the current flowing through the measuring resistor is much smaller (approximately by a factor of 1000) than the load current by appropriate division . As a result of the separate control amplifier and actuator still present, however, the disadvantageous timing behavior of the overall arrangement remains.
Aufgabe der vorliegenden Erfingung ist es, eine Strombegrenzungschaltung der eingangs genannten Art so zu verbessern, daß die genannten Nachteile vermieden werden und daß insbesonders auch bei großen Strömen (typischerweise größer 5 A) kleine Reaktionszeiten (typischerweise unter 20 nSek) ermöglicht werden. Weiters soll eine gute Steuerbarkeit der Strombegrenzung ohne Regelschwingungen erzielt werden.The object of the present invention is a current limiting circuit to improve the type mentioned at the beginning in such a way that the disadvantages mentioned are avoided and that, in particular even with large currents (typically greater than 5 A), short reaction times (typically below 20 nSec) are made possible. Furthermore, good controllability of the current limitation without control vibrations should be achieved.
Dies wird gemäß der vorliegenden Erfindung dadurch erreicht, daß die Regeleinrichtung in einem parallel zur Versorgungsspannungsquelle liegenden Zweig eine über einen Referenzspannungseingang gesteuerte Referenzstromquelle und eine dazu in Serie liegende rückgekoppelte Stromquelle aufweist und daß das Stellglied zumindest zwei parall geschaltete Laststromquellen aufweist, die in Serie zur Last angeordnet sind und an denen die von der rückgekoppelten Stromquelle bereitgestellte Referenzspannung liegt. Am Stromkreiseingang befindet sich also die Referenzstromquelle, die über den Referenzspannungseingang steuerbar ist und damit die Strombegrenzung der Last steuert. Diese Referenzstromquelle versorgt die rückgekoppelte Stromquelle, wodurch die Referenzspannung eine Funktion einer festliegenden, entsprechenden inneren Eigenschaft der rückgekoppelten Stromquelle (beispielsweise der Transkonduktion des weiter unten als Ausgestaltung angesprochenen MOS-FETs) und des Eingangsstromes ist. Diese Referenzspannung wird an das Stellglied gelegt, welches zumindest zwei parallel geschaltete Laststromquellen aufweist, die in Serie zur Last angeordnet sind. Damit ist der Ausgangsstrom (n+1)mal größer als der Referenzstrom, weil ausgangsseitig beliebig viele (n) Laststromquellen parallel geschaltet sind. Es lassen sich damit Reaktionszeiten kleiner als 20 nSek erzielen, was sich aus dem Umstand ergibt, daß die Strombegrenzung in allen Stromquellen (beispielsweise Elektronenröhren oder MOS-FETs) parallel erfolgt und damit die Schnelligkeit eines derartigen Elementes die Schaltschnelligkeit des gesamten Stromkreises bestimmt.This is achieved in accordance with the present invention in that the control device has, in a branch lying parallel to the supply voltage source, a reference current source controlled via a reference voltage input and a feedback current source connected in series, and in that the actuator has at least two parallel connected load current sources which are connected in series to the load are arranged and at which the reference voltage provided by the feedback current source is located. The reference current source, which can be controlled via the reference voltage input and thus controls the current limitation of the load, is located at the circuit input. This reference current source supplies the feedback current source, as a result of which the reference voltage is a function of a fixed, corresponding internal property of the feedback current source (for example the transconductance of the MOS-FET mentioned below as an embodiment) and the input current. This reference voltage is applied to the actuator, which has at least two load current sources connected in parallel, which are arranged in series with the load. The output current (n + 1) is thus greater than the reference current because any number of load current sources are connected in parallel on the output side. This enables response times of less than 20 nSec to be achieved, which results from the fact that the current limitation in all current sources (for example electron tubes or MOS-FETs) takes place in parallel, and thus the speed of such an element determines the switching speed of the entire circuit.
Nach einer besonders bevorzugten Ausgestaltung der Erfindung ist vorgesehen, daß zumindest die rückgekoppelte Stromquelle und die Laststromquellen MOS-FETs aufweisen, deren GATE- und DRAIN-Anschluß jeweils miteinander verbunden sind. Auf diese Weise ergibt sich einerseits auf einfachste Art eine Integrierbarkeit der gesamten Schaltung, wobei sowohl P-Kanal als auch N-Kanal Ausführung möglich ist. Die innere Rückkopplung in den MOS-FETs ersetzt dabei quasi den früher gebräuchlichen äußeren Regelkreis, was extrem kurze Reaktionszeiten bei einfachstem Aufbau sicherstellt.According to a particularly preferred embodiment of the invention, it is provided that at least the feedback current source and the load current sources have MOS-FETs whose GATE and DRAIN connections are each connected to one another. In this way, on the one hand, the entire circuit can be integrated in the simplest way, both P-channel and N-channel versions being possible. The internal feedback in the MOS-FETs virtually replaces the previously used external control loop, which ensures extremely short reaction times with the simplest design.
In weiterer Ausgestaltung der Erfindung kann zur Erzielung von noch kürzeren Reaktionszeiten vorgesehen werden, daß die Millerkapazität (entspricht einer Vergrößerung der Kollektor-Basis-Kapazität unter der Wirkung der Spannungsverstärkung der Schaltung) der MOS-FETs der Stromquellen durch eine einschaltbare Parallelimpedanz kompensiert ist. Damit wurden in experimentellen Schaltungsaufbauten bereits Reaktionszeiten im Bereich von 5 nSek erzielt.In a further embodiment of the invention, in order to achieve even shorter reaction times, it can be provided that the miller capacitance (corresponds to an increase in the collector-base capacitance under the effect of the voltage amplification of the circuit) of the MOS-FETs of the current sources is compensated for by a switchable parallel impedance. This means that response times in the range of 5 nSec have already been achieved in experimental circuit designs.
Als mögliche Anwendungsbereiche der erfindungsgemäßen Strombegrenzungsschaltung sind beispielsweise Leistungsstufen, Analogtester, Meßgeräte oder Stromversorgungen zu nennen.Examples of possible areas of application for the current limiting circuit according to the invention are power stages, analog testers, measuring devices or power supplies.
Der überdeckbare Strom- bzw. Spannungsbereich ist im wesentlichen nur abhängig von den verfügbaren Stromquellen (beispielsweise sogenannte "SIPMOS"-Transistoren). In allen Fällen ist ein schwingungsfreier Übergang in den Strombegrenzungsbetrieb sichergestellt.The coverable current or voltage range is essentially only dependent on the available current sources (for example so-called "SIPMOS" transistors). In all cases, a vibration-free transition to current limiting operation is ensured.
Die Erfindung wird im folgenden noch an Wand der in der Zeichnung teilweise schematisch dargestellten Schaltungsbilder näher erläutert.
- Fig. 1 zeigt dabei ein Grundsatzschaltbild einer erfindungsgemäßen Strombegrenzungsschaltung,
- Fig. 2 eine der Fig. 1 entsprechende Anordnung mit Kompensation der Millerkapazität und
- Fig. 3 ein weiteres Beispiel der erfindungsgemäßen Strombegrenzungsschaltung mit MOS-FETs.
- 1 shows a basic circuit diagram of a current limiting circuit according to the invention,
- Fig. 2 is an arrangement corresponding to Fig. 1 with compensation of miller capacity and
- Fig. 3 shows another example of the current limiting circuit according to the invention with MOS-FETs.
Gemäß Fig. 1 ist eine Strombegrenzungsschaltung für eine an einer Versorgungsspannungsquelle U liegende Last (hier als Lastwiderstand R eingezeichnet) mit einer allgemein mit 1 bezeichneten Regeleinrichtung ausgestattet, welche über ein allgemein mit 2 bezeichnetes Stellglied den Laststrom beeinflußt. Die Regeleinrichtung 1 weist in einem parallel zur Versorgungsspannungsquelle U liegenden Zweig 3 eine über einen Referenzpannungseingang Uref gesteuerte Referenzstromquelle 4 und eine dazu in Serie liegende rückgekoppelte Stromquelle 5 auf. Das Stellglied 2 seinerseits weist zumindest zwei parallel geschaltete Laststromquellen 6 auf, die in Serie zur Last R angeordnet sind und an denen die von der rückgekoppelten Stromquelle bereitgestellte Referenzspannung UG liegt.1, a current limiting circuit for a load connected to a supply voltage source U (shown here as load resistor R) is equipped with a control device, generally designated 1, which influences the load current via an actuator, generally designated 2. The
Die über den Steuereingang bzw. Referenzspannungseingang Uref gesteuerte Referenzstromquelle 4 liefert über die Leitung 7 den Referenzstrom Iref an die rückgekoppelte Stromquelle 5. Der an dieser entstehende Spannungsabfall ist eine Funktion einer ihrer festliegenden inneren Eigenschaften und des Eingangsstromes. Die so gewonnene Referenzspannung UG wird an die parallel liegenden Laststromquellen 6 gelegt, womit der Ausgangsstrom schließlich um das (n+1)fache - wobei n die Anzahl der Laststromquellen 6 ist - größer als der Referenzstrom Iref ist.The reference
Die Strombegrenzungssschaltung nach Fig. 2 unterscheidet sich von der nach Fig. 1 nur durch die hier schematisch eingetragene Kompensation der Millerkapazität der Laststromquellen 6 (beispielsweise MOS-FETs) durch eine über einen angedeuteten Schalter 8 einschaltbare Parallelimpetanz Z, womit die Reaktionszeit der Schaltung auf Stromschwankungen weiter verringert werden kann. Der Schalter 8 kann beispielsweise ebenfalls von einem entsprechend beschaltetem MOS-FET gebildet sein - die Paralllelimpetanz Z kann im einfachsten Falle durch einen entsprechend dimensionierten Kondensator realisiert sein. Als wesentlich ist in diesem Zusammenhang anzusehen, daß über den Schalter 8 eine gewisse Verzögerung des Ansprechens der Kompensation erreicht wird, die typisch in der Gegend von 5 nSek liegen soll.The current limiting circuit according to FIG. 2 differs from that according to FIG. 1 only by the schematic here registered compensation of the miller capacitance of the load current sources 6 (for example MOS-FETs) by means of a parallel impedance Z which can be switched on via an indicated switch 8, whereby the response time of the circuit to current fluctuations can be further reduced. The switch 8 can, for example, also be formed by a correspondingly connected MOS-FET - in the simplest case, the parallel impedance Z can be realized by an appropriately dimensioned capacitor. In this context, it should be regarded as essential that a certain delay in the response of the compensation is achieved via the switch 8, which should typically be in the region of 5 nsec.
Gemäß Fig. 3 ist die Strombegrenzungsschaltung wieder ähnlich zu Fig. 1 aufgebaut, wobei hier nun aber die rückgekoppelte Stromquelle 5 und die beiden Laststromquellen 6 von MOS-FETs gebildet sind, deren GATE- und DRAIN-Anschlüsse jeweils miteinander verbunden sind. Damit läßt sich die gesamte Schaltungsanordnung sehr leicht integrieren, womit erstmals eine derartige Schaltung auf einem einzelnen Baustein vorgesehen werden kann.3, the current limiting circuit is again constructed similarly to FIG. 1, but here the feedback
Die Referenzstromquelle 4 versorgt hier den B-Kanal MOS-FET der rückgekoppelten Stromquelle 5, dessen DRAIN- und GATE-Elektroden miteinander verbunden sind, mit Referenzstrom. Der an diesem MOS-FET entstehende Spannungsabfall ist eine Funktion seiner Transkonduktion und des Eingangsstromes: UGD = Gm x Iref, wobei UGD die Spannung zwischen GATE und DRAIN, Gm den Koeffizienten der gesteuerten Einströmung (innere Steilheit) und Iref den Referenzstrom bedeutet. Die so gewonnene Referenzspannung UG wird an die GATE-Elektrode der weiteren MOS-FETs in den Laststromquellen 6 gelegt. Dabei ist der dort zur DRAIN-Elektrode fließende Strom gleich dem im MOS-FET 5 fließenden Referenzstrom, weil Iaus = Gm x UG x (n+1) und weil UG der beiden Transistoren 5, 6 gleich ist.The reference
Damit ist der Ausgangsstrom um das (n+1)fache größer als der Referenzstrom Iref. Die Linearität der Strombegrenzung ergibt sich dabei aus der Charakteristik der MOS-FETs. Die Temperatur- und zeitunabhängige Drift ist eine Funktion der entsprechenden Technologie. Die geringere Reaktionszeit der Strombegrenzung ergibt sich aus dem Umstand, daß diese in allen Transistoren parallel erfolgt und die Schnelligkeit eines Transistors damit die Schaltschnelligkeit des gesamten Stromkreises bestimmt.The output current is thus (n + 1) times greater than the reference current I ref . The linearity of the current limitation results from the characteristics of the MOS-FETs. The temperature and time independent drift is a function of the corresponding technology. The lower response time of the current limitation results from the fact that this takes place in parallel in all transistors and the speed of a transistor thus determines the switching speed of the entire circuit.
Es kann damit eine extrem schnelle Festkörperstromquelle ohne externen Meßwiderstand realisiert werden, wobei die Strombegrenzung proportional zur Steuerspannung ist und von Null bis zu einer maximalen Stromstärke (abhängig von der Anzahl der Laststromquellen) eingestellt werden kann.This enables an extremely fast solid-state current source to be implemented without an external measuring resistor, the current limitation being proportional to the control voltage and being able to be set from zero to a maximum current (depending on the number of load current sources).
Claims (3)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AT190390A AT398865B (en) | 1990-09-19 | 1990-09-19 | CURRENT LIMIT CIRCUIT |
| AT1903/90 | 1990-09-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP0477165A2 true EP0477165A2 (en) | 1992-03-25 |
| EP0477165A3 EP0477165A3 (en) | 1993-08-25 |
Family
ID=3523509
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP19910890211 Withdrawn EP0477165A3 (en) | 1990-09-19 | 1991-09-16 | Current-limiting circuit |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0477165A3 (en) |
| AT (1) | AT398865B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0550823A1 (en) * | 1991-11-27 | 1993-07-14 | Robert Bosch Gmbh | Procedure for the limitation of the current across a servo component and equipment |
| EP0645686A1 (en) * | 1993-09-21 | 1995-03-29 | Siemens Aktiengesellschaft | Circuit arrangement to supply electrical loads with a constant voltage |
| WO1999024789A1 (en) * | 1997-11-12 | 1999-05-20 | Robert Bosch Gmbh | Sensor arrangement comprising a sensor and an evaluation circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55154617A (en) * | 1979-05-18 | 1980-12-02 | Mitsubishi Electric Corp | Control circuit for direct current power supply unit |
| EP0143955A1 (en) * | 1983-11-04 | 1985-06-12 | ABB CEAG Licht- und Stromversorgungstechnik GmbH | Power supply system |
| FR2628231A1 (en) * | 1988-03-04 | 1989-09-08 | Hughes Aircraft Co | HIGH SPEED HYBRID VOLTAGE REGULATOR WITH MILLER EFFECT REDUCTION |
| DE3920658A1 (en) * | 1988-06-23 | 1989-12-28 | Kone Elevator Gmbh | Method and device for protecting output drivers against overloading and short circuit |
| EP0354098A1 (en) * | 1988-08-01 | 1990-02-07 | Valeo Electronique | Circuit to control the variation of power with several power transistors in parallel |
-
1990
- 1990-09-19 AT AT190390A patent/AT398865B/en not_active IP Right Cessation
-
1991
- 1991-09-16 EP EP19910890211 patent/EP0477165A3/en not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55154617A (en) * | 1979-05-18 | 1980-12-02 | Mitsubishi Electric Corp | Control circuit for direct current power supply unit |
| EP0143955A1 (en) * | 1983-11-04 | 1985-06-12 | ABB CEAG Licht- und Stromversorgungstechnik GmbH | Power supply system |
| FR2628231A1 (en) * | 1988-03-04 | 1989-09-08 | Hughes Aircraft Co | HIGH SPEED HYBRID VOLTAGE REGULATOR WITH MILLER EFFECT REDUCTION |
| DE3920658A1 (en) * | 1988-06-23 | 1989-12-28 | Kone Elevator Gmbh | Method and device for protecting output drivers against overloading and short circuit |
| EP0354098A1 (en) * | 1988-08-01 | 1990-02-07 | Valeo Electronique | Circuit to control the variation of power with several power transistors in parallel |
Non-Patent Citations (1)
| Title |
|---|
| PATENT ABSTRACTS OF JAPAN vol. 5, no. 32 (P-50)27. Februar 1981 & JP-A-55 154 617 ( MITSUBISHI ) 2. Dezember 1980 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0550823A1 (en) * | 1991-11-27 | 1993-07-14 | Robert Bosch Gmbh | Procedure for the limitation of the current across a servo component and equipment |
| EP0645686A1 (en) * | 1993-09-21 | 1995-03-29 | Siemens Aktiengesellschaft | Circuit arrangement to supply electrical loads with a constant voltage |
| US5592075A (en) * | 1993-09-21 | 1997-01-07 | Siemens Aktiengesellschaft | Circuit configuration for supplying electrical consumers with a constant voltage |
| WO1999024789A1 (en) * | 1997-11-12 | 1999-05-20 | Robert Bosch Gmbh | Sensor arrangement comprising a sensor and an evaluation circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| ATA190390A (en) | 1994-06-15 |
| EP0477165A3 (en) | 1993-08-25 |
| AT398865B (en) | 1995-02-27 |
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