EP0470508A3 - Method and arrngement for the automatic control of transistors - Google Patents
Method and arrngement for the automatic control of transistors Download PDFInfo
- Publication number
- EP0470508A3 EP0470508A3 EP19910112965 EP91112965A EP0470508A3 EP 0470508 A3 EP0470508 A3 EP 0470508A3 EP 19910112965 EP19910112965 EP 19910112965 EP 91112965 A EP91112965 A EP 91112965A EP 0470508 A3 EP0470508 A3 EP 0470508A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- arrngement
- transistors
- automatic control
- automatic
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/563—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including two stages of regulation at least one of which is output level responsive, e.g. coarse and fine regulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4025428 | 1990-08-10 | ||
DE19904025428 DE4025428C2 (en) | 1990-08-10 | 1990-08-10 | Circuit arrangement for generating control voltages |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0470508A2 EP0470508A2 (en) | 1992-02-12 |
EP0470508A3 true EP0470508A3 (en) | 1993-12-29 |
Family
ID=6412041
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP19910112965 Withdrawn EP0470508A3 (en) | 1990-08-10 | 1991-08-01 | Method and arrngement for the automatic control of transistors |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0470508A3 (en) |
DE (1) | DE4025428C2 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2027957A (en) * | 1978-08-16 | 1980-02-27 | Lucas Industries Ltd | Power supply circuits |
JPS60136409A (en) * | 1983-12-24 | 1985-07-19 | Sony Corp | Non-adjusting ic filter circuit |
EP0158231A2 (en) * | 1984-04-11 | 1985-10-16 | Hitachi, Ltd. | Filter integrated circuit |
US4818903A (en) * | 1986-07-18 | 1989-04-04 | Kabushiki Kaisha Toshiba | Time constant automatic adjustment circuit for a filter circuit |
-
1990
- 1990-08-10 DE DE19904025428 patent/DE4025428C2/en not_active Expired - Fee Related
-
1991
- 1991-08-01 EP EP19910112965 patent/EP0470508A3/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2027957A (en) * | 1978-08-16 | 1980-02-27 | Lucas Industries Ltd | Power supply circuits |
JPS60136409A (en) * | 1983-12-24 | 1985-07-19 | Sony Corp | Non-adjusting ic filter circuit |
EP0158231A2 (en) * | 1984-04-11 | 1985-10-16 | Hitachi, Ltd. | Filter integrated circuit |
US4818903A (en) * | 1986-07-18 | 1989-04-04 | Kabushiki Kaisha Toshiba | Time constant automatic adjustment circuit for a filter circuit |
Non-Patent Citations (3)
Title |
---|
IEEE JOURNAL OF SOLID-STATE CIRCUITS. Bd. SC-20, Nr. 6, Dezember 1985, NEW YORK US Seiten 1114 - 1121 BANU & TSIVIDIS 'An Elliptic Continuous-Time CMOS Filter with On-Chip Automatic Tuning' * |
IEEE JOURNAL OF SOLID-STATE CIRCUITS. Bd. SC-21, Nr. 1, Februar 1986, NEW YORK US Seiten 15 - 30 TSIVIDIS,BANU & KHOURY 'Continuous-Time MOSFET-C Filters in VLSI' * |
PATENT ABSTRACTS OF JAPAN vol. 9, no. 298 (E-361)(2021) 26. November 1985 & JP-A-60 136 409 ( SONY K.K. ) 19. Juli 1985 * |
Also Published As
Publication number | Publication date |
---|---|
DE4025428A1 (en) | 1992-02-13 |
EP0470508A2 (en) | 1992-02-12 |
DE4025428C2 (en) | 1994-03-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): DE FR GB IT NL |
|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
RHK1 | Main classification (correction) |
Ipc: H03H 11/04 |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): DE FR GB IT NL |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 19940630 |