EP0434627A2 - Diodenmuster mit balancierter symmetrischer Ansteuerung für Flüssigkristallanzeigen und Steuerverfahren dafür - Google Patents

Diodenmuster mit balancierter symmetrischer Ansteuerung für Flüssigkristallanzeigen und Steuerverfahren dafür Download PDF

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Publication number
EP0434627A2
EP0434627A2 EP90810989A EP90810989A EP0434627A2 EP 0434627 A2 EP0434627 A2 EP 0434627A2 EP 90810989 A EP90810989 A EP 90810989A EP 90810989 A EP90810989 A EP 90810989A EP 0434627 A2 EP0434627 A2 EP 0434627A2
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European Patent Office
Prior art keywords
address line
line pairs
mim
devices
charge
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EP90810989A
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English (en)
French (fr)
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EP0434627A3 (en
Inventor
Willem Den Boer
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OIS Optical Imaging Systems Inc
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OIS Optical Imaging Systems Inc
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/367—Control of matrices with row and column drivers with a nonlinear element in series with the liquid crystal cell, e.g. a diode, or M.I.M. element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0823—Several active elements per pixel in active matrix panels used to establish symmetry in driving, e.g. with polarity inversion
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/088—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements using a non-linear two-terminal element
    • G09G2300/0895—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements using a non-linear two-terminal element having more than one selection line for a two-terminal active matrix LCD, e.g. Lechner and D2R circuits

Definitions

  • the present invention generally relates to an electronic matrix system and method of operating the same.
  • the present invention more particularly relates to a matrix system including storage elements, and employing MIM diode blocking elements; and a drive method for rapidly storing electric charge in selected storage elements and efficiently retaining the charge stored therein the present invention is particularly useful in active matrix liquid crystal displays wherein the storage elements take the form of display picture elements.
  • an array of storage elements are utilized in storing electric charge and can include for example, memory arrays and light influencing displays.
  • the storage elements take the form of picture elements.
  • the picture elements or pixels generally include a pair of spaced apart and facing electrodes having light influencing material disposed therebetween.
  • each pixel constitutes a capacitor in which electric charge can be stored.
  • the charge stored in a pixel results in a voltage potential across the electrodes and an electric field across the light influencing material.
  • liquid crystal displays When the light influencing material is liquid crystal material, alignment of the liquid crystal material molecules can be obtained when the field applied to the material is above a certain threshold value.
  • liquid crystal displays generally include polarizes disposed on both sides of the display and alignment layers disposed on both side of the liquid crystal display material.
  • a pixel When the field across the liquid crystal display material is above the threshold value, a pixel can be made light transmissive or light absorptive depending on the relative alignment of the polarizes and alignment layers; when the field is below the threshold value, an opposite light influencing effect can be obtained.
  • a display generally includes many pixels, an image can be formed by selectively controlling which pixels are transmissive to light and which pixels are absorptive to light.
  • liquid crystal displays In liquid crystal displays, (LCD′s) it is necessary to update the condition of each pixel at regular intervals, for example, at a frame rate of thirty frames per second. This is required because the pixels can retain or store the applied potentials for a finite time. Updating is also required when nematic liquid crystal display material is employed because the applied potential must be reversed during alternate frames to avoid degradation of such liquid crystal display material. Updating is further required when the displayed images are intended to change regularly, such as when the displayed images are constantly moving. Hence, the ability to rapidly transfer to and store electric charge in the pixels and to efficiently retain the stored charge for at least one frame period is essential.
  • each pixel is associated with one or more threshold devices through which the potential to be stored in the pixel is applied to the pixel.
  • the threshold devices have taken the form of field effect transistors or p-i-n diodes, for example various active matrixes employing differing configuration of threshold devices are disclosed in a number of references including for example: U.S. patent NO. 3,654,606 to Marlowe, et al , disclosing discrete, crystalline silicon diodes in an anode-to-cathode diode configuration; U.S. patent No. 4,251,136 to Miner, et al teaching ring diode structures; and a publication entitled Active Addressing for Flat Panel Display, 62 Japan Display 1986.
  • each pixel includes a pair of p-i-n diodes coupled in non-opposing, anode-to-cathode relation between an address line pair and a common node.
  • One electrode of the pixel is coupled to the common node and the other electrode is coupled to another address line or data line to which the pixel charging potential is applied.
  • a nematic liquid crystal display material is disposed between the electrodes.
  • the state of the diodes is reversed to accommodate the reversal in the charge potential polarity. This can cause the voltage at the common node to vary. Such variance in the potential at the common node presents difficulties in controlling the ultimate voltage to which the pixel is to be charged and can adversely affect gray scale operation of the display.
  • a p-i-n diode has a characteristic capacitance associated therewith, which capacitance can degrade the operation of the pixel.
  • a charge of opposite polarity to the charge stored in the capacitance of the liquid crystal pixel may decrease the sensitivity of the pixel to charges being applied thereto.
  • This effect has been found in virtually every scheme heretofore utilized for addressing (i.e. applying a series of electrical pulses to the liquid crystal matrix array so as to charge and discharge individual picture elements within the active matrix liquid crystal display), and is commonly known as the "capacitive kick" effect.
  • a similar and possibly more serious problem, known as “capacitive kickback" occurs at the end of the charging period, at which point in time the p-i-n diode is switched from its on or conductive condition to its off or blocking condition.
  • the p-i-n diode at this point in time has a significant voltage drop impressed across the current carrying electrodes thereof, which voltage drop could cause a significant transfer of charge from the capacitance of the liquid crystal element of the pixel to the capacitance of the isolation devices. This transfer of charge disturbs the voltage being maintained across the liquid crystal elements, and is not readily distinguishable from the current which is being stored upon said element, thereby adversely effecting the accuracy of the information stored thereupon.
  • the "capacitive kick” becomes a significant problem and severely limits the performance of high resolution liquid crystal displays which include a relatively small area liquid crystal elements.
  • the reason for the increase in the "capacitive kick" problem in such array, is that the ratio of the area of the liquid crystal elements to the areas of the blocking elements is significantly decreased.
  • the desired larger ratios cannot be maintained because of physical constraints upon lithography and processing which set a lower limit on blocking element size, particularly in large area displays where yield problems become much more severe as minimum lithography feature sizes decrease.
  • the absolute sensitivity and speed of operation have heretofore decreased as the resolution of the liquid crystal displays has increased.
  • FET's and p-i-n diodes when employed in LCD's, require up to 7 or 4 mask steps respectively for fabrication, and require critical alignments of down to 1 micrometer. Accordingly, these complex structures reduce the yield of usable components per fabrication run and hence increase production costs. Additionally, FET's require the presence of crossing address lines on a common substrate, leading to short circuits, and hence further decreased yield.
  • the LCD device disclosed and claimed herein is equipped with metal-insulator-metal (MIM) type blocking elements which can be fabricated by as few as two mask steps, thus making fabrication easier and hence yield greater.
  • MIM metal-insulator-metal
  • the invention provides an active matrix liquid crystal display system for rapidly storing and efficiently retaining electric charge in selected ones of a plurality of liquid crystal pixels.
  • the system includes a plurality of substantially parallel address line pairs, a plurality of substantially parallel additional address lines crossing the address line pairs at an angle and bering spaced from the address line pairs to form a plurality of crossover points therewith, and a pair of threshold devices coupled together at a common node and in series relation between the address line pairs associated with the crossover points.
  • the threshold devices employed herein are limited exclusively to MIM type devices which block current at low bias (i.e., I ⁇ 10-11 A at V ⁇ 5 v) and conduct current at high bias i.e., (I ⁇ 10-6 A at V ⁇ 15 v) independent of the polarity, since the MIM device is bidirectional and therefore the IV curve thereof is symmetric with respect to polarity.
  • Each of the liquid crystal pixels is coupled between a respective one of the common nodes and one of the additional address lines.
  • the system further includes first means for applying first operating potentials which are substantially equal in magnitude and opposite in polarity between the address line pairs to bias the threshold devices into a conducting condition for facilitating the storage of charge in the storage elements coupled thereto and second means for applying charging potential to selected ones of the additional address lines for providing electric charge to be stored in the selected storage elements during the application of the first operating potentials to the address line pairs.
  • said first potential applying means applies second operating potentials which are substantially equal, and below the MIM devices conducting voltage, between the address line pairs to facilitate the retention of the charge stored in the pixels coupled thereto.
  • the invention further provides a method of operating an active matrix LCD including MIM devices, to rapidly store and efficiently retain electric charge in selected ones of the plurality of pixels of the display.
  • the method includes the steps of providing a plurality of substantially parallel address line pairs, providing a plurality of substantially parallel additional address lines crossing the address line pairs at an angle and being spaced from the address line pairs to form a plurality of crossover points therewith, and coupling a pair of MIM devices together at a common node between the address line pairs associated with the crossover points.
  • the MIM devices are of the type which block current at low bias and conduct current at high bias, irrespective of polarity, since MIM devices are bidirectional, and therefore the IV characteristics thereof are symmetric with respect to polarity.
  • the method further includes the steps of coupling each of the pixels between a respective one of the common nodes and one of the additional address lines, applying first operating potentials (which are substantially equal in magnitude and opposite in polarity) between the address line facilitate the storage of charge in the storage elements coupled thereto, and applying charging potential to selected ones of the additional address lines during the application of the first operating potentials to the address line pairs to store electric charge in the selected pixels.
  • first operating potentials which are substantially equal in magnitude and opposite in polarity
  • the method further includes the step of applying second operating potentials which are substantially equal in magnitude between the address line pairs to bias the MIM devices into a second condition to facilitate the retention of the charge stored in the pixels coupled thereto.
  • Fig. 1 it illustrates in schematic circuit diagram form an active matrix liquid crystal display 10 embodying the present invention.
  • the system 10 includes a plurality of substantially parallel address line pairs 12, 12′, 14, 14′, and 16, 16′ which are row select lines, and a plurality of substantially parallel additional or column address lines 18 and 20.
  • the column address lines 18 and 20 cross the row select address line pairs at an angle and are spaced from the row select address line pairs to form a plurality of crossover points therewith.
  • the column address lines 18 an 20 cross the row select address line pairs substantially perpendicularly thereto.
  • the system further includes a pixel at each of the crossovers defined by the crossing row select lines and the column address lines.
  • the system includes pixels 22, 24, 26, 28, 30 and 32. Although just six pixels are illustrated, it is of course to be understood that the system 10 includes additional row select line pairs and column address lines with a corresponding additional number of pixels arranged in rows and columns to provide a display having a sufficient number of pixels so as to form a usable image.
  • Pixel 22 includes a pair of threshold devices 34 and 36 which are coupled together at a common node 38.
  • the threshold devices 34 and 36 are metal-insulator-metal (MIM) devices and are coupled together between the row select address line pair 12 and 12′.
  • the MIM devices are of the type which provide a high impedance to current flow when a low bias, i.e., I ⁇ 10-11 A at V ⁇ 5 V (or no bias) is applied thereto, and a low impedance to current flow at high bias, i.e., I ⁇ 10-6 A at V ⁇ 15 v.
  • this characteristic is independent of the polarity of the applied bias since MIM devices are bidirectional, and accordingly the IV characteristic is symmetric with respect to polarity.
  • the symmetric MIM configuration of two MIM devices disposed about a common node in electrical communication with the first electrode of the pixel, provides significant operational advantages over prior art, single MIM display pixels. These advantages will be discussed in detail hereinbelow.
  • the pixel 22 further includes a pair of electrodes 40 and 41 which are spaced apart and facing one another. Between the electrodes 40 and 42 is a light influencing material 44.
  • the term "light influencing material” is meant to include any material which emits light or can be used to selectively vary the intensity, phase, or polarization of light either being reflected from or transmitted through the material.
  • the light influencing material 44 is liquid crystal display material, such as a nematic liquid crystal material.
  • the electrodes 40 and 42 with the liquid crystal display material 44 disposed therebetween form a storage element 46 or capacitor in which electric charge can be stored.
  • the storage element 46 is coupled between the common node 38 formed by the MIM devices 34 and 36 and to the column address line 18.
  • the MIM devices 34 and 36 are preferably formed from layers of deposited metallic or metal and insulating material. More specifically, the MIM′s employed herein typically include a first metallic layer of a transparent conductive oxide material such as indium tin oxide (ITO). Deposited thereover is a layer of an insulating material such as SiN x or Ta205 and preferably SiN x ; and disposed thereover is the second layer of metal, in a preferred embodiment, a layer of chromium. The deposited layer of chromium must typically be etched in order to form for example, address lines, electrical interconnects, business, etc.. However, in a preferred embodiment, the SiN x layer can be made substantially transparent (i.e.
  • said SiN x layer does not require etching, as opposed to displays employing, for example, p-i-n diodes, wherein the amorphous semiconductor layers are not transparent and hence require additional mask and etch steps.
  • the SIN x layer be high in Si content, the layer will appear yellow and requires etching.
  • said Si-rich layer will be more light sensitive and hence requires a separator mask step for the fabrication of a light shield.
  • the system 10 further includes a row select driver 50 having outputs R1, R11, R2, R3, and R31 coupled to the row select address line pairs 12, 121, 14, 141, 16, and 161 respectively.
  • the row select driver 50 provides drive signals at its outputs to apply first operating potentials of high bias between the row select address line pairs to render the MIM devices conducting which facilitates the storage of charge in the storage elements coupled thereto.
  • the row select driver also applies second operating potentials of low bias between the row select address line pairs to render the MIM devices non-conducting, to facilitate the retention of the charge stored in the storage elements coupled thereto.
  • the system 10 includes a column driver 52.
  • the column driver 52 includes a plurality of outputs, C1 and C2, which are coupled to the column address lines 18 and 20 respectively.
  • the column driver applies charging potential to selected ones of the column address lines for providing electric charge to be stored in selected storage elements during the application of the first operating potentials to the row select address line pairs by the row select driver 50.
  • SMIM symmetric MIM
  • the voltage across the MIM device decreases while the pixel is charged up, i.e., while a charging potential is being applied thereto. This reduces the MIM current and the charging will therefore slow down and not reach saturation.
  • the final voltage at the end of the scan time ius then critically dependent on the MIM IV characteristic.
  • the final voltage across the LC at the end of the scan time is thus much less dependent of the MIM IV curve (see Figure 4).
  • the image retention in Sin x displays is caused by a decrease in K, the charging characteristic, for devices at pixels which have been ON for an extended period of time as compared to surrounding OFF pixels.
  • Device non-uniformity (for instance due to a lack of accurate control of the SiN x layer thickness across the display area) also causes a variation in K. Since in the SMIM configuration holding voltage does not depend on K, this approach is insensitive to device degradation and device non-uniformity.
  • the capacitance kickback discussed hereinabove, (and in more detail hereinbelow) is also eliminated in an SMIM pixels, because the kickbacks for the two diodes have opposite polarity in the simultaneous scan mode and compensate each other.
  • Figs. 2A, 2B and 2C they collectively illustrate a first set of waveforms which demonstrate how charge is stored in the storage element 46 of pixel 22 and thereafter retained therein. More specifically, Fig. 2A illustrates the waveform of the signal provided at output C1 of the column drive 52, Fig. 2B illustrates the waveform of the signal provided at output R1 of the row select driver 50, and Fig. 2C illustrates the waveform of the signal provided at output R1, of the row select driver 50.
  • the row select driver 50 applies -15 volts to the row select address line 12 and +15 volts to row select line 121 to bias the MIM devices 34 and 36 into a conducting condition. With the MIM devices 34 and 36 thus biased, any charge previously stored in the storage element 46 is retained therein. In the immediately succeeding frame, if charge is to be once again stored in the storage element 46, the column driver 52 provides at its output C1 which is coupled to the column address line 18 a + 3 volts at t1.
  • the row select driver 50 provides at t2 a 0 volts to row select line 12 and a 0 volts to row select line 121, Hence, the row select driver has provided at t2 operating potentials to the address line pair formed by lines 12 and 121 which are substantially equal in magnitude and opposite in polarity to bias the MIM devices 34 and 36 into a non-conducting condition. With the MIM devices 34 and 36 thus biased, the +3 volts applied to electrode 42 of the storage element 46 will charge the storage element 46 through a current path which extends from the column address line 18, through the storage element 46, and through MIM device 36.
  • the storage element 46 is charged to an extent sufficient to exceed the threshold voltage of the liquid crystal display material 44 and the row select driver 50 returns the row select line 12 to a -15volts and the row select line 121 to a 15 volts to bias the diodes 34 and 36 to their conducting condition.
  • the column driver 52 terminates the charging potential of +3 volts and the column address line 18 applied to -3 volts. It is preferred that all of the storage elements within the row defined by the row select address line pairs 12 and 121 are charged in parallel so that once these storage elements are charged, the next row defined by the row address lines 14 and 141 can be selected by the row select driver 50 to bias the MIM devices coupled therebetween.
  • the other row select lines are provided with operating potentials from the row select driver 50 to bias the MIM devices coupled therebetween.
  • the row select address lines 14 and 16 receive from the row select driver a -15 volts and the row select lines 141 and 161 receive a +15 volts.
  • the liquid crystal display material 44 is a nematic liquid crystal display material and thus the sense of the potential applied thereto is preferably reversed during the next succeeding frame.
  • the MIM device pairs associated with the storage elements need only be biased sufficiently to allow for current flow, and establish a common node voltage which remains at approximately 0 volts as the individual storage elements are being charged to achieve the basic benefits of the present invention.
  • FIGs. 3A, 3B, 3C, 3D and 3E they collectively illustrate a second set of waveforms which demonstrate how charge is stored in the storage element 46 of pixel 22, and thereafter retained therein. More specifically, Figure 3E illustrates the waveform of the signal provided at output C1 of the column driver 52, Figure 3A illustrates the waveform of the signal provided at output R1 of row select driver 50, Figure 3B illustrates the waveform of the signal provided at output R11 of row select driver 50, Figure 3C illustrates the waveform of the signal provided at output R2 of row select driver 50 and Figure 3D illustrates the waveform of the signal provided at output R21 of row select driver 50.
  • Significant characteristics of this driving scheme include a holding voltage to keep leakage minimal during frame time and the voltage change at the end of the scan time are equal for both MIM devices in a display so that voltage kickback from the devices cancel out.
  • the row select driver 50 has been holding row select address line 12 and 121 at their respective holding voltages of -2 volts each. From time t0, to time t1, row select pair 12, 121, i.e., that row addressed by outputs R1 and R11, is selected by applying a select voltage to said outputs R1 and R11. At output R1, at time t0 the voltage applied thereto by the row select driver is 17 volts. At output R11, the voltage applied thereto at time t0 is -13 volts. The effect of applying voltages as described hereinabove is to bias the MIM devices 34 and 36 into their conductive condition. With the MIM devices 34 and 36 thus biased, any charge stored in the storage element 46 is retained therein.
  • a voltage from +2 volts to -2 volts is applied along column address line 18 at output C1.
  • storage element 46 is selected during the time period from time t1, it is not desired to select storage element 46, thus in order to retain the charge stored or applied thereto, it is necessary to remove the voltages at outputs R1 and R11. This is accomplished at output R1 by reducing the applied voltage thereto +17 volts to +2 volts; at the same time the voltage at output R11 is reduced from -13 volts to +2 volts.
  • the holding voltages of output R1 and R11 are such that the voltage change for output R1 and R11 at the end of said scan time are equal (i.e. 15 volts) so that the capacitance kickback from MIN device 34 and 36 are equal and thus cancel out thereby eliminating the kickback phenomena.
  • outputs R1 and R11 are maintained at their holding voltage of 2 volts.
  • the use of a holding voltage is employed on both scan lines to keep the voltage across the two MIM devices and therefore their leakage, minimal during the frame time.
  • outputs R1 and R11 have been returned to their holding voltage thus "turning off" storage device 46 so that the charge applied thereto is retained until such time as that row is next selected.
  • the storage element of pixel 26 is addressed so as to store a charge applied by column address line 18 from output C1 of the column driver.
  • the voltage at output R2 and R21 at the start of time t1 is the holding voltage of 2 volts.
  • the voltage applied to output R2 is -17 volts while the voltage applied to output′ is +13 volts.
  • the driving scheme illustrated in Figs. 3A-3E has several advantages over prior art driving schemes. These include: 1. A holding voltage employed on both scan lines to keep the voltage across the two MIM devices and therefore their leakage minimal during the frame time; 2) the video and LC polarity are alternated every row to eliminate flicker and grey scale non-uniformity; 3) the amplitude of the video signal is kept small to reduce cross-talk from the columns; 4) the voltage change for output 1 output 2 of a given row pair at the end of the scan time are equal so that voltage kickbacks from the MIM devices in that pixel cancel out; 5) the driving levels for output 1 and output 2 of a given row pair are exactly the same so that the MIM devices degrade exactly the same so that the MIM devices degrade exactly the same and the center point voltage is not affected; 6) the driving method and pixel configuration are insensitive to small residual asymmetry in the IV characteristics of the MIM devices, which is difficult to eliminate; and 7) no DC component averaged in time appears on either column or row address lines, so
  • Curve 66 is the current versus voltage characteristic of, for example, MIM devices 34 when line 12 is held at -10 volts and impedance of storage element 46 is assumed to be 0 ohms.
  • V v is more positive than -10 volts on line 23
  • the current through the diode 34 is represented 2by only leakage current, which typically is very low (e.g., orders of magnitude lower than the diodes conducting current).
  • 66 further illustrates the current versus voltage characteristic of diode 34 when line 12 is held at +10 volts and the impedance of element 46 is assumed to be 0 ohms.
  • the current through the diode 36 is also represented by leakage current which is similarly very low. The characterize is substantially uniform from one MIM device to the next; As a result, as long as the voltage across storage element 46 remains between +10 volts and -10 volts (or another suitable voltages) very little current will flow from the charge storage element 46, and thus, the system will efficiently retain the charge stored within the charge storage element 46.

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  • Engineering & Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
EP19900810989 1989-12-18 1990-12-14 Balanced drive symmetric mim diode configuration for liquid crystal displays and method of operating same Withdrawn EP0434627A3 (en)

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US45182789A 1989-12-18 1989-12-18
US451827 1989-12-18

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EP0434627A3 EP0434627A3 (en) 1991-10-23

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US5926236A (en) * 1998-03-13 1999-07-20 Ois Optical Imaging Systems, Inc. High aperture liquid crystal display including thin film diodes, and method of making same
EP0951008A2 (de) * 1998-03-06 1999-10-20 OIS Optical Imaging Systems, Inc. Verfahren und Einrichtung zur Adressierung von Flüssigkristall-Anzeigetafeln mit Dünnfilm-Dioden
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US6225968B1 (en) 1997-09-23 2001-05-01 Ois Optical Imagaing Systems, Inc. Method and system for addressing LCD including diodes
US6738035B1 (en) 1997-09-22 2004-05-18 Nongqiang Fan Active matrix LCD based on diode switches and methods of improving display uniformity of same
US11069799B2 (en) 2016-07-07 2021-07-20 Amorphyx, Incorporated Amorphous metal hot electron transistor
US11183585B2 (en) 2018-03-30 2021-11-23 Amorphyx, Incorporated Amorphous metal thin film transistors
US11610809B2 (en) 2015-10-13 2023-03-21 Amorphyx, Incorporated Amorphous metal thin film nonlinear resistor
US12075656B2 (en) 2020-06-12 2024-08-27 Amorphyx, Incorporated Circuits including non-linear components for electronic devices

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FR2605778A1 (fr) * 1986-10-24 1988-04-29 Thomson Csf Panneau de visualisation a cristaux liquides et procede d'inscription des donnees sur ce panneau
GB2217891A (en) * 1988-04-29 1989-11-01 Philips Electronic Associated Matrix display device

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EP0475770A2 (de) * 1990-09-13 1992-03-18 Seiko Instruments Inc. Steuerverfahren für eine elektrooptische Vorrichtung
EP0475770A3 (en) * 1990-09-13 1992-09-30 Seiko Instruments Inc. Electro-optical device and method for driving the same
US5576728A (en) * 1990-09-13 1996-11-19 Seiko Instruments Inc. Driving method for an electrooptical device
WO1995026544A1 (en) * 1994-03-23 1995-10-05 Philips Electronics N.V. Display device
WO1996000479A2 (en) * 1994-06-23 1996-01-04 Philips Electronics N.V. Display device
WO1996000479A3 (en) * 1994-06-23 1996-02-22 Philips Electronics Nv Display device
WO1999005644A2 (de) * 1997-07-25 1999-02-04 Aventis Research & Technologies Gmbh & Co Kg Chipkarte mit temporär speicherfähiger anzeige auf der basis von aktivmatrixdisplays
WO1999005644A3 (de) * 1997-07-25 1999-04-08 Aventis Res & Tech Gmbh & Co Chipkarte mit temporär speicherfähiger anzeige auf der basis von aktivmatrixdisplays
US6738035B1 (en) 1997-09-22 2004-05-18 Nongqiang Fan Active matrix LCD based on diode switches and methods of improving display uniformity of same
US6243062B1 (en) 1997-09-23 2001-06-05 Ois Optical Imaging Systems, Inc. Method and system for addressing LCD including thin film diodes
EP0910062A3 (de) * 1997-09-23 1999-10-06 OIS Optical Imaging Systems, Inc. Verfahren und Einrichtung zur Adressierung von Flüssigkristall-Anzeigetafeln mit Dünnfilm-Dioden
EP0910062A2 (de) * 1997-09-23 1999-04-21 OIS Optical Imaging Systems, Inc. Verfahren und Einrichtung zur Adressierung von Flüssigkristall-Anzeigetafeln mit Dünnfilm-Dioden
US6225968B1 (en) 1997-09-23 2001-05-01 Ois Optical Imagaing Systems, Inc. Method and system for addressing LCD including diodes
US6222596B1 (en) 1998-03-06 2001-04-24 Ois Optical Imaging Systems, Inc. Thin film diode including carbon nitride alloy semi-insulator and method of making same
EP0951008A2 (de) * 1998-03-06 1999-10-20 OIS Optical Imaging Systems, Inc. Verfahren und Einrichtung zur Adressierung von Flüssigkristall-Anzeigetafeln mit Dünnfilm-Dioden
EP0951008A3 (de) * 1998-03-06 2000-01-05 OIS Optical Imaging Systems, Inc. Verfahren und Einrichtung zur Adressierung von Flüssigkristall-Anzeigetafeln mit Dünnfilm-Dioden
US5926236A (en) * 1998-03-13 1999-07-20 Ois Optical Imaging Systems, Inc. High aperture liquid crystal display including thin film diodes, and method of making same
EP0942315A2 (de) * 1998-03-13 1999-09-15 OIS Optical Imaging Systems, Inc. Dünnschichtdioden enthaltende Flüssigkristallanzeige mit grossem Öffnungsverhältnis sowie deren Herstellungsverfahren
US6008872A (en) * 1998-03-13 1999-12-28 Ois Optical Imaging Systems, Inc. High aperture liquid crystal display including thin film diodes, and method of making same
EP1898256A2 (de) * 1998-03-13 2008-03-12 Lg.Philips Lcd Co., Ltd Dünnschichtdioden enthaltende Flüssigkristallanzeige mit grossem Öffnungsverhältnis sowie deren Herstellungsverfahren
EP1898256A3 (de) * 1998-03-13 2008-04-23 Lg.Philips Lcd Co., Ltd Dünnschichtdioden enthaltende Flüssigkristallanzeige mit grossem Öffnungsverhältnis sowie deren Herstellungsverfahren
EP0942315B1 (de) * 1998-03-13 2008-11-05 LG Display Co., Ltd. Dünnschichtdioden enthaltende Flüssigkristallanzeige mit grossem Öffnungsverhältnis sowie deren Herstellungsverfahren
WO2000028516A1 (en) * 1998-11-08 2000-05-18 Nongqiang Fan Active matrix lcd based on diode switches and methods of improving display uniformity of same
US11610809B2 (en) 2015-10-13 2023-03-21 Amorphyx, Incorporated Amorphous metal thin film nonlinear resistor
US11069799B2 (en) 2016-07-07 2021-07-20 Amorphyx, Incorporated Amorphous metal hot electron transistor
US11183585B2 (en) 2018-03-30 2021-11-23 Amorphyx, Incorporated Amorphous metal thin film transistors
US12075656B2 (en) 2020-06-12 2024-08-27 Amorphyx, Incorporated Circuits including non-linear components for electronic devices

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