EP0414319B1 - Circuit for supplying a reference voltage - Google Patents

Description

The invention relates to a circuit for supplying a reference voltage, comprising a voltage generator having a supply terminal and an output for delivering a voltage of given nominal value and comprising a differential amplifier presenting a supply terminal for a source. supply voltage, a non-inverting input connected to the output of the voltage generator, an inverting input and an output as well as a first output follower stage, the output of which delivers said reference voltage is retro-coupled to the inverting input of the amplifier via a divider bridge.

Such a circuit is known from "Analysis and Design of Analog Integrated Circuits" by Paul R. GRAY and ROBERT G. MEYER (John Wiley and Sons - New-York 1977) fig.d.37 p.516 Voltage regulator.

The voltage generator is liable, when it is switched on, to give rise to instabilities.

The invention relates to a circuit making it possible to avoid this drawback.

The basic idea of the invention consists in transmitting the voltage generator signal only when the supply voltage is sufficient for the region of possible instabilities to be exceeded.

The circuit according to the invention is for this purpose characterized in that the output of the differential amplifier is connected to the input of the first follower stage through a controlled switching device, the first follower stage having its input connected to terminal d power supply through a first resistor, and having its output connected to the supply terminal of the voltage generator and in that it comprises a circuit for controlling the switching device arranged to receive at least the supply voltage so that the switching device is closed when the first supply voltage reaches a threshold for which both the voltage generator and the differential amplifier are in a nominal operating zone .

The voltage generator is supplied by the reference voltage produced by the circuit, and the reference voltage, once the switching device is closed, is 1 / k times higher than the voltage produced by the voltage generator, k being the division ratio of the first divider bridge. When the first supply voltage has a low value, insufficient for the switching device to be closed, the voltage at the output of the circuit, which also supplies the voltage generator, varies with the same slope as the first supply voltage, at a constant close. The output voltage curve as a function of the first supply voltage therefore no longer presents a risk of instability.

It is particularly advantageous that the control circuit and the controlled switching circuit cooperate directly with the differential amplifier. This makes it possible to simplify the electronic diagram.

For this purpose, the differential amplifier may include a first branch, the input of which is said non-inverting input and a second branch, the input of which is said inverting input, the control circuit may be arranged to inhibit the passage of current through the second branch when the supply voltage is lower than said threshold, and the controlled switching circuit may include a second follower stage which is arranged to be conductive only when current flows through the second branch.

The first branch may include the emitter-collector path of a first transistor of a first type, the base and the collector of which are connected respectively to the emitter and to the base of a second transistor of the first type whose collector is connected to a second supply voltage source, the collector of the first transistor being connected to that of a third transistor of the second type opposite to the first, the emitter of which is connected to the second voltage source d 'power supply through a second resistor and whose base constitutes the non-inverting input of the differential amplifier. Such a branch has a structure such that it derives from the current from low levels of the first supply voltage.

The second branch may include the emitter-collector path of a fourth transistor of the first type, the base of which is connected to that of the first transistor, the collector of the fourth transistor being connected to that of a fifth transistor of the second type, the emitter of which is connected to that of the third transistor and whose base constitutes the inverting input of the differential amplifier. Such a branch has a structure such that it derives from the current only from a relatively high significant level of the first supply voltage.

The fourth transistor can have its emitter connected to that of the first transistor.

The control circuit is advantageously common to the two branches. For this purpose, the control circuit may include a sixth transistor of the second type, the collector of which is connected to the first supply voltage source, the emitter of which is connected to the emitters of the first and fourth transistors, and the base of which is connected to the terminal of the first resistor which is not connected to the first source of supply voltage. The voltage on the basis of the sixth transistor determines the threshold from which the differential amplifier produces an output signal.

The second follower stage may include a seventh transistor whose base is connected to the collector of the fifth transistor, whose collector is connected to the second supply voltage source and whose emitter is connected to the input of the first follower stage, possibly via a live diode.

The value of said threshold can be chosen more precisely by having a second resistance between the first resistance and the input of the first follower stage.

The first follower stage advantageously comprises an eighth transistor with two emitters, the base of which constitutes the input, the collector of which is connected to the first supply voltage source, the first emitter of which is connected to one end of the bridge and the second of which transmitter constitutes the output of the first follower stage.

• la figure 1, un circuit régulateur du type série selon l'art antérieur précité.
• la figure 2, un circuit selon l'invention.
• la figure 3, un mode préféré de réalisation de l'invention.
• la figure 4, une variante de la figure 3.
• et la figure 5, des courbes de tension en fonction de la tension d'alimentation selon la figure 3 ou 4.

The invention will be better understood on reading the description which follows, given by way of nonlimiting example, in conjunction with the drawings which represent:

• Figure 1, a series type regulator circuit according to the aforementioned prior art.
• Figure 2, a circuit according to the invention.
• Figure 3, a preferred embodiment of the invention.
• FIG. 4, a variant of FIG. 3.
• and FIG. 5, voltage curves as a function of the supply voltage according to FIG. 3 or 4.

According to FIG. 1, a voltage generator REF delivers a voltage V _R which is applied to the non-inverting input of a differential amplifier A supplied with a supply voltage V _cc . The output S of the amplifier A drives a follower circuit T whose output, which delivers a regulated reference voltage V _O is retro-coupled to the inverting input of the amplifier A via a resistive divider bridge R₃, R₄. The REF voltage generator is supplied by the supply voltage V _cc . When powering up, any instability of the voltage V _R of the voltage generator REF has a direct impact on the voltage V _O.

qui est appliquée à l'entrée non inverseuse de l'amplificateur différentiel A alimenté à une tension d'alimentation V_cc. La sortie S de l'amplificateur A est reliée par l'intermédiaire d'un dispositif de commutation commandé 1 à l'entrée S' du circuit suiveur. Une résistance R₁ est disposée entre l'entrée S' et la source de tension d'alimentation V_cc. La sortie du circuit suiveur délivre la tension de référence régulée V_O. Cette sortie est bouclée sur l'entrée inverseuse de l'amplificateur A (signal V $\genfrac{}{}{0ex}{}{\text{-}}{\text{i}}$

) à l'aide d'un pont diviseur comportant des résistances R₃ et R₄. Le signal V $\genfrac{}{}{0ex}{}{\text{-}}{\text{i}}$

est présent au point commun (ou point milieu) du pont diviseur. L'autre extrémité du point diviseur est connectée à une deuxième source de tension d'alimentation (ici le pôle de mode commun). Le circuit suiveur est représenté comme un transistor T dont la base est le point S', dont l'émetteur délivre le signal V_O et dont le collecteur est connecté à la source de tension d'alimentation V_cc. Le signal V_O est appliqué à la borne d'alimentation du générateur de tension REF. Un circuit de commande C qui reçoit la tension d'alimentation V_cc (et éventuellement la tension V_O) est agencée de manière à fermer le dispositif de commutation 1 lorsque la tension d'alimentation V_cc dépasse un seuil donné pour lequel la tension V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

délivrée par le générateur de tension REF a dépassé la portion de sa caractéristique dans laquelle peuvent se produire des instabilités. De ce fait, lorsque le circuit est mis sous tension, la tension d'alimentation V_cc part de la valeur 0 et augmente pour atteindre sa valeur nominale. Lorsque sa valeur est inférieure au seuil donné, le courant de commutation 1 est ouvert et la tension V_O évolue proportionnellement à la valeur instantanée de la tension V_cc et indépendamment de la tension V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

. En effet, l'entrée S' de l'étage suiveur est référencée au potentiel V_cc à travers la résistance R₁. Par contre lorsque la valeur instantanée de la tension V_cc atteint le seuil donné, le circuit de commutation 1 est fermé, et la tension V_O a alors pour valeur :

Pour une certaine valeur de V_cc, V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

atteint sa valeur nominale V_REF.According to FIG. 2, the voltage generator REF delivers a voltage V at the output $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

which is applied to the non-inverting input of the differential amplifier A supplied with a supply voltage V _cc . The output S of the amplifier A is connected via a controlled switching device 1 to the input S 'of the follower circuit. A resistance R₁ is arranged between the input S 'and the supply voltage source V _cc . The output of the follower circuit delivers the regulated reference voltage V _O. This output is looped over the inverting input of amplifier A (signal V $\genfrac{}{}{0ex}{}{\text{-}}{\text{i}}$

) using a divider bridge comprising resistors R₃ and R₄. The signal V $\genfrac{}{}{0ex}{}{\text{-}}{\text{i}}$

is present at the common point (or mid point) of the divider bridge. The other end of the divider point is connected to a second source of supply voltage (here the common mode pole). The follower circuit is represented as a transistor T whose base is the point S ', whose emitter delivers the signal V _O and whose collector is connected to the supply voltage source V _cc . The signal V _O is applied to the supply terminal of the voltage generator REF. A control circuit C which receives the supply voltage V _cc (and optionally the voltage V _O ) is arranged so as to close the switching device 1 when the supply voltage V _cc exceeds a given threshold for which the voltage V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

delivered by the REF voltage generator has exceeded the portion of its characteristic in which instabilities may occur. Therefore, when the circuit is energized, the supply voltage V _cc starts from the value 0 and increases to reach its nominal value. When its value is lower than the given threshold, the switching current 1 is open and the voltage V _O changes in proportion to the instantaneous value of the voltage V _cc and independently of the voltage V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

. Indeed, the input S 'of the follower stage is referenced to the potential V _cc through the resistor R₁. On the other hand, when the instantaneous value of the voltage V _cc reaches the given threshold, the switching circuit 1 is closed, and the voltage V _O then has the value:

For a certain value of V _cc , V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

reaches its nominal value V _REF .

est reliée à une diode (transistor npn T₁₂ monté en diode par court-circuit base-collecteur) à travers une résistance R₁₁. L'émetteur du transistor T₁₂ est connecté au pôle de mode commun, et sa base à celle d'un transistor T₁₄ dont l'émetteur est relié au pôle de mode commun à travers une résistance R₁₄ et dont le collecteur est d'une part relié à l'émetteur de transistor T₁₁ à travers une résistance R₁₆ et d'autre part connecté à la base d'un transistor npn T₁₅ dont l'émetteur est connecté au pôle de mode commun, et dont le collecteur est connecté à la base de transistor T₁₁.According to FIG. 3, a voltage generator (said to be of the "band gap" type) described in the aforementioned work p.295, comprises a transistor T₁₁ of the npn type whose collector is connected to the aforementioned point B and which has a resistance R₁₅, acting as a current source, between its collector and its base. The emitter of the transistor T₁₁ which delivers the voltage V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

is connected to a diode (npn transistor T₁₂ mounted as a diode by base-collector short-circuit) through a resistor R₁₁. The emitter of transistor T₁₂ is connected to the common mode pole, and its base to that of a transistor T₁₄ whose emitter is connected to the common mode pole through a resistor R₁₄ and whose collector is firstly connected to the transistor emitter T₁₁ through a resistor R₁₆ and on the other hand connected to the base of an npn transistor T₁₅ whose emitter is connected to the common mode pole, and whose collector is connected to the transistor base T₁₁.

disponible sur l'émetteur du transistor T₁₁, et dont l'émetteur est relié au pôle de mode commun à travers une résistance R₈. Les transistors T₅ et T₇ présentent deux jonctions émetteur-base en série ce qui fait qu'un courant est susceptible de circuler dans la première branche même pour une faible valeur de potentiel au point F. La deuxième branche présente un transistor pnp T₆ dont l'émetteur est connecté au point F, dont la base est connectée à celle du transistor T₅ et dont le collecteur (point S) est connecté à celui d'un transistor npn T₉ dont l'émetteur est relié au pôle de mode commun à travers la résistance R₈. Le circuit de commande comporte un transistor npn T₃ dont le collecteur est connecté à la source de tension d'alimentation V_cc, dont l'émetteur est connecté audit point F et dont la base est connectée de préférence au point milieu H d'un pont diviseur R₁,R₂ présentant deux résistances R₁ et R₂ en série entre la source de tension d'alimentation V_cc et le point S′, ou bien directement au point S′, la résistance R₂ étant omise. Le circuit de commutation comporte un transistor pnp T₁₀ dont la base est connectée au point S (sortie de l'amplificateur A), dont le collecteur est connecté au pôle de mode commun et dont l'émetteur est relié au point S′ à travers une diode en direct D.Amplifier A comprises a first branch having a transistor T type of the pnp type whose emitter is connected to a point F, whose base is connected to the emitter of a transistor T transistor of the pnp type, whose collector is connected to the common mode pole and whose base is connected to the transistor collector T₅. The collector of transistor T₅ is connected to that of a transistor T₈ of the npn type, the base of which is attacked by the voltage V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

available on the emitter of transistor T₁₁, and whose emitter is connected to the common mode pole through a resistor R₈. The transistors T₅ and T₇ have two emitter-base junctions in series, which means that a current is likely to flow in the first branch even for a low potential value at point F. The second branch has a pnp transistor T₆ whose emitter is connected to point F, whose base is connected to that of transistor T du and whose collector (point S) is connected to that of an npn transistor T₉ whose emitter is connected to the common mode pole through the resistor R₈. The control circuit comprises an npn transistor T₃ whose collector is connected to the supply voltage source V _cc , whose emitter is connected to said point F and whose base is preferably connected to the mid point H of a bridge divider R₁, R₂ having two resistors R₁ and R₂ in series between the supply voltage source V _cc and the point S ′, or else directly at the point S ′, the resistance R₂ being omitted. The switching circuit comprises a pnp transistor T₁₀ whose base is connected to point S (output of amplifier A), whose collector is connected to the common mode pole and whose emitter is connected to point S ′ through a live diode D.

The output follower stage comprises a transistor (T₁, T₂) with two emitters (or two transistors T₁ and T₂ mounted as a follower emitter), the emitter of T₁ connected to the divider bridge (R₃, R₄) and that of T₂ delivering the voltage V _o at point B. The presence of this double transmitter (or of the two transistors) conventionally allows better decoupling with respect to the load impedance.

When V _cc has a value below the given threshold, the first branch of the amplifier is likely to be crossed by a current, but the second branch is not crossed by any current. The transistor T₁₀ is then blocked. The base of the transistors T₁ and T₂ is then at a potential very close to the instantaneous value of V _cc .

et

avec V_D = tension base-émetteur d'un transistor (environ 0,7V).We then have ${\text{V}}_{\text{o}}{\text{= (V}}_{\text{CC}}{\text{- V}}_{\text{D}}\text{)}$

and

with V _D = base-emitter voltage of a transistor (approximately 0.7V).

V_S′ désignant la tension au point S′.When V _cc reaches the given threshold, the second branch of the amplifier is crossed by a current sufficient for the transistor T₁₀ to be in conduction state. The amplifier is in its operating region and we have:

V _{S ′} denoting the voltage at point S ′.

≃ V_REF c'est-à-dire que pour le calcul, on considère que le seuil de tension correspond pratiquement au seuil de fonctionnement correct du générateur de tension.
Il vient :

Pour l'amplificateur décrit, un fonctionnement correct impose que V_H soit au moins égal à 5V_D (en fait il faut que V_H soit sensiblement supérieur à cette valeur). On a alors :

Le rapport

Permet donc de déterminer le seuil V_ccO de V_cc à partir duquel le circuit de commutation est fermé. Si on omet la résistance R₂, les points H et S' sont confondus, et

et la résistance R₁ n'intervient plus dans la détermination du seuil.
Il faut alors :

   Suivant la figure 4, la base du transistor T₃ est connectée au point milieu H' d'un pont diviseur R'₁ et R'₂ disposé entre la source de tension V_cc et le pôle de mode commun. La base du transistor T₁ est reliée à la source de tension V_cc à travers la résistance R₁. L'émetteur du transistor T₃ est connecté au point C, celui du transistor T₁ est relié au point A à travers la résistance R₃, et celui du transistor T₂ est connecté au point B. Le reste du circuit est comme à la figure 3.
On a

La condition de seuil est alors :
${\text{V}}_{\text{H'}}{\text{> 5V}}_{\text{D}}$

Le rapport

détermine le seuil V_cco de V_cc à partir duquel le circuit de commutation est fermé.Consider V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

≃ V _REF, that is to say that for the calculation, it is considered that the voltage threshold corresponds practically to the correct operating threshold of the voltage generator.
He comes :

For the amplifier described, correct operation requires that V _H is at least equal to 5V _D (in fact it is necessary that V _H is significantly greater than this value). We then have:

The report

It therefore makes it possible to determine the threshold V _ccO of V _cc from which the switching circuit is closed. If the resistance R₂ is omitted, the points H and S 'are merged, and

and the resistance R₁ is no longer involved in determining the threshold.
It is then necessary:

According to Figure 4, the base of transistor T₃ is connected to the midpoint H 'of a divider bridge R'₁ and R'₂ disposed between the voltage source V _cc and the common mode pole. The base of the transistor T₁ is connected to the voltage source V _cc through the resistor R₁. The emitter of transistor T₃ is connected to point C, that of transistor T₁ is connected to point A through resistor R₃, and that of transistor T₂ is connected to point B. The rest of the circuit is as in Figure 3.
We have

The threshold condition is then:
${\text{V}}_{\text{H '}}{\text{> 5V}}_{\text{D}}$

The report

determines the threshold V _cco of V _cc from which the switching circuit is closed.

, V $\genfrac{}{}{0ex}{}{\text{-}}{\text{i}}$

et V₀ croissent dès que V_cc atteint V_D (0,7 V), la régulation étant obtenue à partir de 6 V_D (environ 4,2 V).According to FIG. 5, the voltages V $\genfrac{}{}{0ex}{}{\text{+}}{\text{i}}$

, V $\genfrac{}{}{0ex}{}{\text{-}}{\text{i}}$

and V₀ increase as soon as V _cc reaches V _D (0.7 V), the regulation being obtained from 6 V _D (approximately 4.2 V).

Claims (11)

1. A circuit for supplying a reference voltage, comprising a voltage generator having a supply terminal and an output for supplying a voltage of given nominal value, a differential amplifier having a supply terminal for a first supply voltage source, a non-inverting input connected to the output of the voltage generator, an inverting input and an output, and a first output follower stage whose output, which supplies said reference voltage, provides feedback to the inverting input of the differential amplifier via a divider bridge, characterised in that the output of the differential amplifier (A) is coupled to the input of the first follower stage (T) via a controlled switching device (1), the first follower stage (T) having its input coupled to the supply terminal via a first resistor (R₁) and having its output, which supplies said reference voltage (V_o), coupled to the supply terminal of the voltage generator (REF), and in that it comprises a control circuit (C) for controlling the switching device (1), which control circuit is adapted to receive at least the supply voltage in such a manner that the switching device is closed when the supply voltage reaches a threshold for which both the voltage generator (REF) and the differential amplifier (A) are in a nominal operating range.
2. A circuit as claimed in Claim 1, characterised in that the differential amplifier comprises a first branch, whose input constitutes said non-inverting input, and a second branch, whose input constitutes said inverting input, in that the control circuit is adapted to inhibit the flow of current in the second branch when the supply voltage is lower than said threshold, and in that the controlled switching circuit comprises a second follower stage, which is adapted to conduct only when current flows through the second branch.
3. A circuit as claimed in Claim 2, characterised in that the first branch comprises an emitter-collector path of a first transistor (T₅) of a first type, whose base and collector are connected, respectively, to the emitter and the base of a second transistor (T₇) of the first type, whose collector is connected to a second supply voltage source, the collector of the first transistor (T₅) being connected to that of a third transistor (T₈) of the second type opposite to the first type, whose emitter is coupled to the second supply voltage source via a second resistor (R₈) and whose base constitutes the non-inverting input of the differential amplifier.
4. A circuit as claimed in Claim 3, characterised in that the second branch comprises the emitter-collector path of a fourth transistor (T₆) of the first type, whose base is connected to that of the first transistor (T₅), the collector of the fourth transistor (T₆) being connected to that of a fifth transistor (T₉) of the second type, whose emitter is connected to that of the third transistor (T₈) and whose base constitutes the inverting input of the differential amplifier.
5. A circuit as claimed in Claim 4, characterised in that the emitter of the fourth transistor (T₆) is connected to that of the first transistor (T₅).
6. A circuit as claimed in Claim 5, characterised in that the control circuit comprises a sixth transistor (T₃) of the second type, whose collector is connected to the first supply voltage source, whose emitter is connected to the emitters of the first (T₅) and the fourth (T₆) transistor, and whose base is connected to that terminal of the first resistor (R₀) which is not coupled to the first supply voltage source (V_cc).
7. A circuit as claimed in Claim 6, characterised in that the second follower stage comprises a seventh transistor (T₁₀), whose base is connected to the collector of the fifth transistor (T₉), whose collector is connected to the second supply voltage source and whose emitter is coupled to the input of the first follower stage.
8. A circuit as claimed in Claim 7, characterised in that the emitter of the seventh transistor (T₁₀) is coupled to the input of the first follower stage via a diode poled in the forward direction.
9. A circuit as claimed in Claim 7 or 8, characterised in that a second resistor (R₂) is disposed between the first resistor (R₁) and the input of the first follower stage.
10. A circuit as claimed in any one of the Claims 7 to 9, characterised in that the first follower stage comprises an eighth transistor (T₁,T₂) having two emitters, whose base constitutes the input, whose collector is connected to the first supply voltage source, whose first emitter is connected to one end of the divider bridge and whose second emitter constitutes the output of the first follower stage.
11. A circuit as claimed in any one of the Claims 7 to 10, characterised in that the divider bridge comprises a third (R₃) and a fourth (R₄) resistor.

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