EP0410157A2

EP0410157A2 - Signal processing system for use with an audio reproduction system

Info

Publication number: EP0410157A2
Application number: EP90112338A
Authority: EP
Inventors: Mark F. Davis
Original assignee: THAT Corp
Current assignee: THAT Corp
Priority date: 1983-06-03
Filing date: 1984-05-30
Publication date: 1991-01-30
Also published as: EP0410157A3

Abstract

A signal processing system for use with an audio reproduction system comprises a pair of input terminals for respectively receiving a pair of stereophonic audio input signals, a pair of output terminals for respectively providing a pair of stereophonic audio output signals and a pair of signals paths for respectively transmitting said two input signals between said input and output terminals. Means (408A, 408B) are coupled to each of said input terminals (250A, 250B) for detecting the signal energy levels of each of the corresponding input signals. The detected signal energy levels of said audio input signals are compared in means (428) for generating a difference signal in response to and as a function of said comparison. Means (270A, 270B) responsive to said difference signal are coupled between the system input and output terminals (250A, 250B, 278A, 278B) of at least one of said signal paths for varying the signal gain impressed on the input signal transmitted over said at least one path as a function of said difference signal so that said signal energy levels of said output signals are substantially balanced over relatively long periods of time.

Description

The present invention relates to a signal processing system for use with an audio reproduction system, said signal processing system comprising a pair of input terminals for respectively receiving a pair of stereophonic audio input signals, a pair of output terminals for respectively providing a pair of stereo phonic audio output signals and a pair of signal paths for respectively transmitting said two input signals between said input and output terminals.
A problem associated with stereophonic system relates to the long term power balance between stereophonic signals transmitted over two stereophonic channels. For example, differential gain between the two channels may vary from recording to recording, or along the length of an audio recording tape. This can be particularly critical when one considers that a precondition of producing a stereophonic image is that two loudspeakers or other electo-acoustical transducers of a stereophonic system should produce substantially balanced power outputs, i.e. the power responses of the loudspeakers should be substantially the same.
The object of the present invention is to provide a signal processing system as mentioned above for use with a loudspeaker system for creating stereophonic sound in which the signal energy transmitted over the two stereophonic channels is substantially balanced over relatively long periods of time.
This object is achieved by a signal processing system as set out in claim 1.
The signal processing system according to the present invention compares the average power levels in each of two stereophonic channels of a stereophonic audio reproduction system and adjusts the power levels so that they are balanced over long periods of time.
The signal processing system is intended for use with an audio reproduction system including at least two transducers for creating stereophonic sound in response to two audio input signals. The signal processing system comprises a pair of signal paths for respectively transmitting the two audio input signals to the corresponding transducers, each of the signal paths including an input terminal for receiving a respective one of the audio input signals and an output terminal for coupling the signal path to a corresponding one of the transducer. Means are coupled to each of the input terminals for detecting the signal energy level of the corresponding audio input signal. Means are provided for comparing the detected signal energy levels of the audio input signals and for generating a difference signal in response to and as a function of the comparison. The signal processing system also comprises means responsive to the difference signal and coupled between the input and output terminals of at least one of the signal paths for varying the signal gain impressed on the audio input signal transmitted over the one path as a function of the difference signal so that the signal energy levels of the audio input signals for the paths are substantially balanced over relatively long periods of time.
The signal processing system is especially suited for use in connection with a loudspeaker system as set out in the copending European Patent 0 127 886.
In the drawings, the same numerals are used to refer to like parts.

Fig. 1 shows a block diagram of the preferred embodiment of the signal processing system,
Fig. 2A - 2I are schematic diagrams of the preferred embodiment of the system shown in Fig. 1.

The embodiment of the signal processing system shown in Fig. 1 is adapted to be utilized with a cross-over network described and shown in the copending EP 0 127 886 together with the loudspeakers shown therein The system shown in Fig. 1 is preferably contained in a separate unit from the cross-over network and speakers. For convenience, all components which are dupli cated for each channel are shown in the drawings with a suffix A for one audio channel and the suffix B for the other audio channel. For convenience and ease of exposition however, some of the components shown will be described generally without the suffix A or B where the context makes it preferable, it being understood that the description applies for both channels.
Referring specifically to FIG. 1, the system shown is adapted to receive the right and left channel signal inputs at 250A and 250B typically from the output of a preamplifier of a receiver, tape system or a turntable (none being shown). These inputs 250A and 250B are the inputs to the main signal paths of the system. Signal inputs 252A and 252B are provided to the control signal paths of the system and receive the power signals present at the inputs of the each of the loudspeakers 28A and 28B, respectively. The right channel input 250A and left channel input 250B are respectively coupled to input buffers 254A and 254B. The output of the buffers are respectively connected to low pass filters 256A and 256B and over the corresponding by- pass signal paths 257A and 257B to the respective output and auto by- pass switch circuits 276A and 276B, the latter being described hereinafter. The low pass filters 256A and 256B are respectively connected to the two input terminals of the auto-balance circuit 258 and to the respective inputs of equalizer circuits 260A and 260B. The auto-balance circuit 258 is adapted to measure the power level of the signals transmitted in each of the channels, and to determine the relative power levels of the two and provide output signals as a function of the power levels measured. These two output signals are in turn applied to the control input terminals of the gain control circuits 270A and 270B (described hereinafter) respectively, for impressing a signal gain on the signal transmitted in each channel so that the long term signal energy levels in the two channels will remain substantially balanced.
As described in copending U.S. Application Serial No. , filed simulataneously herewith by Leslie B. Tyler and assigned to the present assignee, (herewith referred to as the "Copending application") the outputs of equalizer circuits 260A and 260B are connected to input matrix 262, the latter being adapted to receive the right and left channel inputs and provide an L + R output and an L - R output. As is well-known, the L + R output will contain the horizontal components of vinyl record modulation of the stereophonic signal, typically in the low frequency range of the audio signal, while the L - R signal will contain the vertical components such as ambience information. The L + R output is connected to the low frequency equalization control circuit 264, while the L - R output is connected to the ambience control circuit 266. The low frequency equalization control 264 is adapted to boost low frequency energy transmitted at the output of the L + R output of the input matrix 262. Since the signal input to the low frequency equalization circuit 264 is the L + R component it will not contain any out-of-phase vertical components of the audio signal, such as turntable rumble, since the latter are cancelled when the two signals L and R are added together by the matrix 262. The control 264 therefore will not boost these vertical noise components. The ambience control circuit 266 is adapted adapted to provide more meaningful ambient information. In particular, the mid frequency information, approximately that information between 400Hz and 2.6KHz is extracted by filtering. It is within this frequency range that more meaningful ambient information is contained. The ambience control circuit 266 is also adapted to include a potentiometer 267 to allow the listener to adjust the ambient information processed. The respective outputs of control circuits 264 and 266 are applied to the output matrix 268.
Matrix 268 is adapted to provide the left channel signal L, as modified by the control circuits 264 and 266, to the input of the gain control circuit 270A. In a similar manner, matrix 268 provides the right channel signal R, as modified by the control circuits 264 and 266, to the input of the gain control circuit 270B.
Gain control circuits 270A and 270B are adapted to vary the gain impressed on the respective input signals R and L in response to and in accordance with either one or both of two control signals, one provided from the auto-balance circuit 258, and the other provided from the control signal paths, described hereinafter. Gain control circuits can be any type of circuit for controlling signal gain in response to one or more control signals, and preferably is a signal multiplier, such as the voltage control amplifier of the type described in U.S. Patent No. 3,714,462, issued to David E. Blackmer on January 30, 1973. Preferably, the gain control circuits are set to provide gain in a signal compression sense so that the amount that the output signal of each channel is reduced is a function of the control signals applied to the control input terminals from the auto-balance circuit 258 and the power monitor circuit 280, the latter being described hereinafter. The output of the gain control circuits 270A and 270B are connected to the respective inputs of the high frequency tone control circuits 272A and 272B. The latter, in turn, have their outputs connected to the corresponding high pass filters 274A and 274B. The high pass filters have their outputs connected to the respective inputs of the output and auto by- pass switch circuits 276A and 276B. Circuits 276A and 276B are adapted to provide the two outputs 278A and 278B as the right and left channel outputs, which are adapted to be connected to a stereophonic preamplifier. Circuits 276A and 276B are also adapted switch between (1) the bypass signal path 257A and 257B when the power sensed at both of the inputs 252A and 252B of the control signal paths drops below a minimum level as described in greater detail hereinafter, and (2) the signal path defined by the components 256 - 276 when the power sensed at inputs 252A and 252B is above the minimum level.
The inputs 252A and 252B are connected to the respective inputs of the balanced to single-ended converters 279A and 279B for transmitting single ended signals (ie. signals having a reference to system ground) and for converting any differential signals (eg, a positive signal with respect to ground is applied to the positive terminal of an input 252, and a negative signal with respect ot ground is applied to the negative terminal of that input) to single ended signals. The outputs of the converters 279A and 279B are connected to the inputs of each of the power monitor 280 and the auto by-pass circuit 282. Monitor 280 is provided for preventing the loudspeaker drivers from being overdriven while auto by-pass circuit 282 is provided for sensing the power applied to the loudspeakers 28A and 28B, and for controlling the signal paths of signals applied to inputs 250A and 250B.
More particularly, the outputs of converters 279A and 279B are each connected to the respective frequency weighting filters 284A and 284B of the power monitor 280. Filters 284A and 284B are adapted to transmit the medium and high frequency portions of the signals received from the converters 279A and 279B for reasons which will be more evident hereinafter. The output of each of the filters 284A and 284B are connected to the respective signal level detectors 286A and 286B. The latter are each adapted to provide a control signal output, typically a DC signal, as a function of the amplitude level of the signal at its input. The output, for example, can be a function of the instantaneous peak amplitude levels of the input signal, the average amplitude levels of the input signal or preferably the RMS level of the input signal. Such RMS level detectors are well-known in the art, such as the RMS level detector shown and described in U.S. Patent No. 3,681,618, issued to David E. Blackmer on August 1, 1972. The two DC outputs of detectors 286A and 286B are compared by the greater of the two circuit 288, the latter providing an output signal as a function of the greater of the two input signals from detectors 286A and 286B. The output signal of circuit 288 is provided to the power threshhold detector 290 which compares the output of circuit 288 with a predetermined reference level. The latter reference level is a function of the maximum power input to the speaker drivers, and preferably the mid-range drivers and tweeters, above which the speaker drivers will be overdriven or otherwise damaged. The output of detector 290 accordingly is connected to a control input of each of the gain control circuits 270A and 270B.
The outputs of the converters 279A and 279B are also respectively connected to the inputs of the auto by-pass circuit 282. The latter includes gain stages 294A and 294B for amplifying the outputs of converters 279A and 279B. The outputs of gain stages 294A and 294B are applied to the respective inputs of bandpass filters 296A and 296B, respectively. The latter are adapted to pass signal energy between about 20Hz and 8KHz. The output of filters 296A and 296B are respectively connected to level detectors 298A and 298B. The latter also can be peak, average, or RMS detectors and are preferably of the averaging type for averaging the signals for relatively long periods of time. The output of each detector 298 therefore provides a DC signal as a function of the long-term average of the power level in each of the channels between about 20Hz and 8KHz. The output of each detector 298 is applied to the comparators 300A and 300B, respectively. The latter compare the output of each detector 298 with a reference signal and provide an output so long as the signal level output of each detector is above the predetermined level, and is adapted to provide a zero output when this level drops below the predetermined set level. The output of each comparator is thus applied to the input of a switch driver 302, the latter being adapted to provide an output to each of the auto by-pass switches of circuits 276A and 276B.
In operation, the system shown in FIG. 1 substantially balances the signal energy level between the two audio channels over a long period of time. This is achieved by the utilization of the auto-balance circuit 258 which compares the two power levels in each of the channels provided from the filters 256A and 258B. The auto-balance circuit 260 provides two control signals to the respective gain control circuits 270A and 270B so as to vary the gain impressed on each of the signals in the channels so that the signal levels at the outputs 278A and 278B are substantially the same over long periods of time. Since the gain control circuits are set for both negative and positive gain, the channel transmitting greater signal energy over a relatively long period of time will be reduced in gain and the other channel will be increased in gain so that the total signal energy level in both channels will be substantially the same.
The system shown in FIG. 1 also prevents the loudspeakers from being overdriven. This is accomplished by monitor 280. More particularly, the two power inputs provided at 252A and 252B are transmitted and/or converted by converters 279A and 279B. The output signals of converters 279A and 279B are filtered by the frequency weighting filters 284A and 284B. The latter essentially transmit the signal energy in the middle and high frequency ranges which are applied to the midrange and tweeter speaker drivers since the midrange and tweeter drivers are more sensitive to excess power than the corresponding woofer speakers. The output of filters 284A and 284B are applied to the RMS level detectors 286A and 286B which provide DC output signals as a function of the RMS value of the respective input signals to the detectors. The DC control output signal of each detector is compared with one another by the greater of the two circuit 288, the latter providing an output signal as a function of the greater of the two signals. This larger signal is compared with the reference level determined by the power threshhold detector and should the power exceed a preset predetermined level a DC output signal is provided to the control inputs of each of the gain control circuits 270A and 270B. As well known in the art, the gain control circuits vary the signal gain impressed on the signals transmitted over each of the main signal paths of each channel in response to and as a function of the amplitude of the DC control signal output of the power threshold detector 290. Generally, the greater the level of the DC control signal output the greater the reduction in gain impressed on the main signals by the gain control circuits. Thus, in this way, gain control circuits 270A and 270B function as signal compressors.
In addition, the system senses the power applied to the audio signals applied to inputs 250 to be transmitted over the signal paths defined by the components 256-276 when the power sensed at inputs 252 is at least at a predetermined minimum level. The system also allows any signals applied to inputs 250A and 250B to be transmitted over the signal paths 257, preventing the audio signals from being modified by equalizers 260A and 260B, when, for example, it is desirable to listen to the program on earphones. The foregoing is achieved by virtue of the auto by-pass circuit 282. More particularly, the latter senses the right and left power signals applied to the loudspeakers at inputs 252A and 252B. Each of these signals are transmitted and/or converted by the con verters 279A and 279B, and subsequently amplified by the gain stages 294A and 294B. The amplified signals are filtered by the bandpass filters 296A and 296B and applied to the level detectors 298A and 298B. Since detectors provide an output of the average power level applied to its input over a long period of time, fast changing signals will not substantially affect the output of the detectors 298A and 298B. So long as the output signals of detectors 298 are above the reference levels set by comparators 300A and 300B, the latter will provide outputs to the switch driver 302, which in turn provides signals to the auto by-pass switches of circuits 276A and 276B so that the latter remain conductive to transmit the signals through the system components 256 - 276 to the right and left channel outputs 278A and 278B.
However, should the power level drop below a minimum level as determined by comparators 300A and 300B, the output of level detectors 298A and 298B will fall below the reference levels set for each of the comparators 300A and 300B so that the switch driver 302 no longer provides an output signal to the auto by-pass switches of circuits 276A and 276B. This in turn results in the circuits 276A and 276B to become nonconductive and therefore no output is provided to the right and left channel outputs 278A and 278B. This has the advantage of preventing microphone action in the speakers when the speakers are not in use.
The preferred embodiment of the system illustrated in FIG. 1 is shown in schematic form in FIGS. 2A-2I.
More particularly, referring to FIG. 2A, since the system is adapted to be connected to receive any input from a tape recorder, turntable or receiver preamplifier, each input 250A and 250B of the input buffers includes three plug receptacles 320, 322, and 324 connected together and to system ground, for connecting the system to any type of source of an audio program. Plug receptacle 320 is connected through resistor 326 to the inverting input of operational amplifier 328. The latter has its output connected through feedback capacitor 330 and through feedback resistor 332 to its inverting input. The plug receptacle 322 is connected through resistor 334 to the capacitor 336. The latter in turn is connected to the noninverting input of operational amplifier 328 and through resistor 338 to system ground. The junction formed by resistor 334 and capacitor 336 is connected to one contact 340 of the switch 346. The latter has second and third contacts 342 and 344 and is movable between a first position wherein contacts 340 and 342 are connected together and a second position wherein contacts 342 and 344 are connected together, depending upon the source of the audio program. The junction formed by resistor 334 and capacitor 336 is connected through capacitor 348 to system ground and through resistor 350 to system ground.
The plug receptacle 324 is also connected through resistor 352 to the contact 344 of switch 346. The resitor 352 is also connected through each of resistor 353 and capacitor 354 to system ground. The contact 342 of switch 346 is connected through resistor 356 to system ground and through capacitor 358 to the noninverting input of amplifier 360. The latter input is also connected through resistor 362 to system ground. Amplifier 360 has its output connected to its inverting input. The output of amplifier 360 forms the output of input buffer 254 and is connected to the port C (in the case of buffer 254A) and port D (in the case of buffer 254B) so that the signal can be transmitted along a bypass signal path 257 to the corresponding ports of the output circuits 276A and 276B, bypassing the system path shown. The output of input buffer 254 is connected to the input of low pass filter 256.
Specifically, the output of amplifier 360 is connected through resistor 366 to the contact 370 of a switch 374, and through resistor 376 to the contact 372 of the switch 374. Contact 368 of switch 374 is not connected, while the contact 372 of the switch is connected through capacitor 378 to the inverting input of amplifier 380. Contact 372 is also connected to the contact 382 of a switch 388. Switch 388 has contact 384 unconnected and contact 386 connected through resistor 390 to capacitor 392, which in turn is connected to system ground. Resistor 390 is also connected to the noninverting input of amplifier 380. Switches 376 and 388 are ganged together so that in one position of the switch 374 and 388 the contacts 370 and 372 of switch 374 amd the contacts 382 and 384 of switch 388 are connected disconnecting resistors. 366 and 390 from the circuit shown, and in a second position the contacts 370 and 372 of switch 374 and contacts 382 and 386 of switch 388 are connected together so as to connect resistors 366 and 390 into the circuit.
The output of amplifier 380 of filter 256 is connected through capacitor 394, which in turn is connected to system ground through resistor 396. Capacitor 394 is also connected through capacitor 398 to resistor 406, which in turn is connected to the inverting input of amplifier 404. Capacitor 398 is also connected to capacitor 400. Capacitor 400 is in turn connected through resistor 402 to system ground and to the noninverting input of amplifier 404. Amplifier 404 has its output connected directly to its inverting input. The output of amplifier 404 forms the output of filter 256 which is connected to the input of the auto-balance circuit circuit 258, shown in detail in FIG. 2C.
More particularly, referring to FIG. 2C, the output of amplifier 404 of low pass filter 256 is connected to the input of an average signal detector 408 of the circuit 258. More specifically, the input to the detector includes capacitor 410 which is connected to the resistor 412. Resistor 412 in turn is connected to the inverting input of amplifier 414, the latter having its noninverting input connected to system ground. The output of amplifier 414 is connected to the cathode of a diode 416, which in turn has its anode connected to the inverting of amplifier 414. The output of amplifier 414 is also connected to the emitter of transistor 418, which in turn has its collector and base connected together and to the inverting input of amplifier 414. The output of amplifier 414 is also connected to the emitter of transistor 420, which in turn has its base and collector connected together through capacitor 422 to system ground. The base and collector of transistor 420 are also connected through resistor 424 to system ground. The base and collector of transistor 420 are also connected through resistor 426 to the output of the detector. The resistors 426A and 426B of both channels are connected respectively to the inverting and noninverting inputs of amplifier 428. The noninverting input of amplifier 428 is connected through resistor 430 and through capacitor 432 to system ground. The output of amplifier 428 is connected through each of the feedback resistor 434 and feedback capacitor 436 to its inverting input. The output of amplifier 428 is also connected through resistor 438 to the inverting input of a amplifier 440. The latter has its noninverting input connected to system ground and its output connected through feedback capacitor 442 to its inverting input. The output of amplifier 440 is also connected to the cathode of a diode 444 and the anode of a diode 446. The anode of diode 444 and the cathode of diode 446 are each connected to the inverting input of amplifier 440. The output of the amplifier 440 is also connected to resistor 448, which in turn is connected to resistor 450. Resistor 450 in turn is connected to the inverting input of amplifier 440 and to the resistor 452. Resistor 452 in turn is connected to the wiper arm of potentiometer 454. The junction between resistors 448 and 450 is connected to the contact 456 of the switch 462. The contact 458 of switch 462 is connected through capacitor 464 to system ground and through resistor 466 to the inverting input of amplifier 468. The inverting input of amplifier 468 is connected through resistor 470 to the wiper arm of potentiometer 472. The noninverting input of amplifier 468 is connected to system ground while its output is connected through resistor 474 to its inverting input. The output of amplifier 468 is connected to the port H, which in turn is connected to control input 788A of the gain control circuit 270A in the right channel signal path, as shown in FIG. 2E and described hereinafter. The contact 458 of switch 462 is also connected directly to port G, which in turn is connected to the control input terminal 788B of the gain control circuit 270B in the left channel signal path, also shown in FIG. 2E and described hereinafter. The contact 460 of switch 462 is connected through resistor 476 to system ground.
A second switch 478 has one contact 480 disconnected and its second contact 482 connected to port B, which in turn is connected through a light-emitting diode (not shown) to system ground. The third contact 484 is connected directly to port A, the latter being connected to the low frequency equalizer control cir cuit 264, (shown in FIGS. 2D and 2E and described in greater detail hereinafter) and to the anode of a light-emitting diode 486. The latter has its cathode connected to port B, which in turn is connected through a light-emitting diode (not shown) to system ground.
Switches 462 and 478 are ganged together so that in one position the contacts 456 and 458 of switch 462 and contacts 480 and 482 of switch 478 are closed and the auto-balanced circuit is connected into the circuit and in a second position the contacts 458 and 460 of switch 462 and contacts 482 and 484 of switch 478 are closed and the auto-balanced circuit is disconnected from the system.
The output of each filter 256 is also connected to the input of the corresponding equalizer circuit 260, as shown in FIGS. 2B and 2D. More particularly, the output of amplifier 404 of the filter 256 is connected through resistor 508 to resistor 510, which in turn is connected to system ground. Resistor 508 is also connected through capacitor 512 to the noninverting input of amplifier 514. The input of the equalizer circuit is also connected through resistor 516 to resistor 518. The latter, in turn, is connected also to the noninverting input of amplifier 514. The output of amplifier 514 is connected through feedback resistor 520 to its inverting input and to resistor 522. Resistor 522 in turn is connected through resistor 524 to system ground. The junction of resistors 522 and 524 is connected through capaci tor 526 to the junction formed by resistors 516 and 518. The output of amplifier 514 is connected through capacitor 528 to resistor 530, which in turn is connected to system ground. The output of amplifier 514 is also connected to resistor 532, which in turn is connected through resistor 534 to the junction of capacitor 528 and resistor 530, and to the noninverting input of amplifier 536. The output of the latter is connected through feedback capacitor 538 to the junction formed by resistors 532 and 534. The output of amplifier 536 is also connected through feedback resistor 540 to the inverting input of amplifier 536, the inverting input being connected through resistor 542 to system ground. The output of amplifier 536 is connected through capacitor 544 to resistor 546, which in turn is connected to system ground. The junction of capacitor 544 and resistor 546 is connected through resistor 548 to the noninverting input of amplifier 550. The output of amplifier 536 is also connected through resistor 552 to resistor 554 which in turn is connected to the noninverting input of amplifier 550. The output of amplifier 550 is connected through capacitor 556 to the junction formed by resistors 552 and 554. The output of amplifier 550 is also connected through feedback resistor 560 to its inverting input and to the resistor 562. The latter is in turn connected to system ground.
Referring to FIG. 2D, the output of amplifier 550 is connected to capacitor 564, which in turn is connected to the noninverting input of amplifier 566. The output of amplifier 550 is also connected through resistor 568 to resistor 570, which in turn is connected to the noninverting input of amplifier 566. The output of amplifier 566 is connected directly to its inverting input and to resistor 572. Resistor 572 is in turn connected through capacitor 574 to the junction formed by resistors 568 and 570 and through resistor 576 to system ground. The output of amplifier 566 is also connected to resistor 578 to the resistor 580, which in turn is connected to system ground. Resistor 578 is also connected through capacitor 582 to the noninverting input of amplifier 584. The output of amplifier 566 is also connected through resistor 586 to capacitor 588, which in turn is connected to the noninverting input of amplifier 584. The output of amplifier 584 is connected through feedback capacitor 590 to the junction formed by resistors 586 and 588. The output of amplifier 584 is also connected through feedback resistor 592 to its inverting input, the inverting input being connected through resistor 594 to system ground. The output of amplifier 584 forms the output of the equalizer circuits 260. The output of each of the equalizer circuits 260A and 260B are connected to the input matrix 262, also shown in FIG. 2D. The output of amplifier 584A forms the right channel input of the matrix while the output of amplifier 584B forms the left channel input to the matrix.
The right channel output provided by amplifier 584A is connected through resistor 600 to the junction 602. The left channel input from amplifier 584B is also connected through resistor 604 to the junction 602. By making resistors 600 and 604 of equal value, the left and right signals will be summed at junction 602 so as to represent the L + R signal output of the matrix.
In order to form the L - R signal the left channel signal at the output of amplifier 584A is connected through resistor 606 to the inverting input of amplifier 608. The left channel input from amplifier 584B is connected through resistor 610 to the noninverting input of amplifier 608, the latter input being connected through resistor 612 to system ground. The output of amplifier 608 is connected through feedback resistor 614 to its inverting input. Resistors 606 and 610 are made equal so that the output of amplifier 608 functions as a subtractor and the output of amplifier 608 provides an L - R signal.
The L + R signal provided at junction 602 is applied to the low frequency equalizer control circuit 264, shown in FIGS. 2D and 2E. More particularly, junction 602 is connected to the inverting input of an amplifier 616, the latter having its output connected through feedback resistor 618 through junction 602 to its inverting input. The noninverting input of amplifier 616 is connected through resistor 620 to system ground. The output of amplifier 616 is also connected through resistor 622 to the inverting input of amplifier 624. The latter has its noninverting input connected to system ground and its output connected through resistor 626 to the noninverting input of amplifier 616. The output of amplifier 624 is also connected through feedback capacitor 628 to the inverting input of the amplifier. The output of amplifier 624 is also connected through resistor 630 to the inverting input of amplifier 632. The latter has its noninverting input connected to system ground and its output connected through feedback capacitor 634 to its inverting input. The output of amplifier 632 is connected through feedback resistor 636 to the inverting input of amplifier 616. The output of amplifier 632 is also connected through capacitor 638 to the resistor of potentiometer 640, which in turn is connected to system ground. The output of amplifier 632 is also connected through capacitor 642 to the resistor of potentiometer 644, which in turn is connected to system ground. The junction formed between capacitor 638 and potentiometer 640 is connected to the junction formed by capacitor 642 and potentiometer 644, the two junctions being connected through resistor 646 to the inverting input of amplifier 648 shown in FIG. 2E. The inverting input of amplifier 648 is connected through feedback resistor 650 to the junction formed by resistor 618, shown in FIG. 2D the output of amplifier 616, and resistor 622. The inverting input of amplifier 648 is also connected through resistor 652 to the wiper arm of potentiometer 644 and through resistor 654 to the wiper arm of potentiometer 640. The noninverting input of amplifier 648 is connected through resistor 656 to the junction formed by the output of amplifier 624 and the resistor 626. The junction formed between resistors 626 and 656 is connected through the resistor of potentiometer 660 to system ground, and through resistor 662 to the wiper arm of the potentiometer 660. The noninverting input of amplifier 648 is connected through resistor 664 to the wiper arm of potentiometer 660 and through resistor 666 to system ground. The wiper arms of potentiometers 644 and 660 are ganged together so as to control the amount of low frequency boost provided by control circuit 264. The output of amplifier 648 is connected through feedback resistor 668 and forms the output of low frequency equalizer control circuit 264. The output of amplifier 648 is therefore connected to the input of the output matrix 268 described hereinafter.
The L - R output of input matrix 262 provided at the output of amplifier 608 is connected to the high frequency, equalization control circuit 266, shown in FIG. 2D. The L - R output is applied to a bandpass filter 700. More particularly, the output of amplifier 608 is connected to resistor 702 of filter 700, which in turn is disconnected through capacitor 704 to system ground and through capacitor 706 to the input of the ambience adder/substractor circuit 708, of the high frequency equalization control circuit 266, as shown in FIG. 2E. Capacitor 706 of filter 700 is connected to the resistor of potentiometer 267 of circuit 266, the resistor in turn being connected to system ground. Capacitor 706 is also connected through resistor 710 to the inverting input of amplifier 712. The noninverting input of amplifier 712 is connected to the wiper arm of potentiometer 267. The output of amplifier 712 is connected through feedback resistor 714 to its inverting input. The output of amplifier 712 is connected to the input of the output matrix 268, also shown in FIG. 2E. The L - R output of input matrix 262 shown in FIG. 2D is connected to the input of a low frequency blend circuit 716, shown in FIG. 2D. More particularly, the output of amplifier 608 of matrix 262 is connected through capacitor 718 to the noninverting input of amplifier 720, the latter having its output connected to its inverting input. Capacitor 718 is also connected through resistor 722 to system ground. The low frequency blend circuit 716 is connected to suitable visual display means, wherein the L - R output of matrix 262 is connected to the contact 726 of a switch 730. The junction formed by capacitor 718 and resistor 722 is connected to contact 728 of switch 730, the remaining contact 724 being disconnected. The second switch 732 has one contact 734 disconnected, the second contact 738 connected to port A, and a third contact 736 connected through resistor 740 to a positive voltage supply. A light-emitting diode 742 is connected between the two contacts 736 and 738. The light-emitting diode 742 indicates that low frequency blend circuit is working. Switches 732 and 724 are ganged. together so that in one position a short circuit through contacts 726 and 728 around capacitor 718 is provided and the light-emitting diode 742 is disconnected, and in a second position the two components are connected as shown. The output of the low frequency blend circuit 716 formed by the amplifier 720 is connected to output matrix 268, shown in FIG. 2E.
Specifically, in order to form the left channel output signal L, from matrix 268 the output of amplifier 648 is connected through resistor 750 to a second resistor 752, which in turn is connected to the left channel output of the matrix, indicated at junction 754. The output of amplifier 712 of circuit 708 is connected through resistor 756 to the inverting input of amplifier 758, the inverting input of the amplifier also being connected to the junction of resitors 750 and 752. Finally, the output of amplifier 720 of FIG. 2D is connected through resistor 760 to the noninverting input of amplifier 758 and through resistor 762 to system ground. The output of amplifier 758 is connected to the junction 754 to provide the L signal output of the output matrix 268. In order to form the right channel signal R, the output of amplifier 648 is connected through resistor 764 to the inverting input of amplifier 766, the inverting input having its output connected to junction 769 for providing the right channel signal output of matrix 268. The output of amplifier 766 is connected through feedback resistor 768 to its inverting input. The output of amplifier 720 of the low frequency blend circuit 716 shown in FIG. 2D is connected through resistor 770 to the inverting input of amplifier 766. Finally, the output of amplifier 712 of circuit 708 is connected through resistor 772 to the noninverting input of amplifier 766 and through resistor 774 to system ground. Each of the junctions 754 and 770 forming the two outputs of output matrix 268 is connected to each of the parallel connected capacitors 780 and 782, the capacitors being connected together to resistor 784. Resistor 784 in turn is connected to the signal input of a voltage control amplifier 270. The latter is preferably any one of the type manufactured and sold by DBX, INC., of the Newton, Massachusetts and those described in U.S. Patent No. 3,714,462, issued to David E. Blackmer on January 30, 1973. Generally, the voltage control amplifier provides an output signal as a logarithmic function of either one of two control signals provided at its two control input terminals 786 and 788. Control terminal 786 is connected to receive a control signal from the power monitor circuit 280, shown in detail in FIG. 2H, while control input terminal 788 is adapted to receive a control signal from the respective ports G and H from the autobalance circuit 258, shown in detail in FIG. 2C. Referring to FIG. 2E, the output of voltage control amplifier 270 is connected to the inverting input of the amplifier 790. The latter has its noninverting input connected to system ground and its output connected through capacitor 792 and through resistor 794 to its inverting input.
The output of amplifier 790 is connected to the input of the high frequency tone control circuit 272, shown in detail in FIG. 2F. In particular, the output of amplifier 790 is connected to resistor 796, which in turn is connected to the inverting input of amplifier 798. The output of amplifier 790 is also connected to capacitor 800, which in turn is connected through resistor 802 to the resistor of potentiometer 804. The opposite side of the resistor of potentiometer 804 is connected through the feedback capacitor 806 to the output of amplifier 798 and through the capacitor 808 to resistor 810, which in turn is connected to the output of amplifier 798. The noninverting input of amplifier 798 is connected to system ground, while the inverting input of the amplifier is connected to the wiper arm of potentiometer 804. The output of amplifier 798 is connected through feedback capacitor to its inverting input. The output of amplifier 798 is also connected to feedback resistor 814 to capacitor 816, which in turn is connected to the inverting input. The output of amplifier 798 forms the output of the circuit 272 and is connected to the input of the high-pass filter 274, also shown in detail in FIG. 2E
More particularly, the output of amplifier 798 of the circuit 272 is connected to capacitor 820, wh;ch in turn is connected to capacitor 822. The latter is connected to the noninverting input of amplifier 824 and to resistor 826. Resistor 826 in turn is con nected to system ground. The junction of capacitor 822 and resistor 826 is connected to contact 830 of switch 834. The contact 828 of switch 834 remains unconnected while the contact 832 is connected through resistor 836 to system ground. Capacitor 820 at the input of filter 274 is also connected through resistor 838 to the inverting input of amplifier 824 and through resistor 840 to contact 842 of switch 848. Contact 846 of switch 848 remains disconnected, while contact 844 is connected to the output of amplifier 824. The output of amplifier 824 is connected to its inverting input. Switches 834 and 848 are ganged together for both channels, wherein in one position of the switches resistor 840 is connected in the circuit 274 and resistor 836 is disconnected from the circuit, and in the other position resistor 840 is disconnected and resistor is connected. The output of amplifier 824 forms the output of the filter 274. The output of the filter and amplifier 824 is connected to the input of the output and auto by-pass switch circuit 276, shown in detail in FIG. 2F.
More particularly, the output of amplifier 824 of filter 274 is connected to the collector of transistor 850 of the circuit 276 and to resistor 852, which in turn is connected through capacitor 854 to system ground. The junction of resistor 852 and capacitor 854 is connected through resistor 856 to the emitter of transistor 850. The base of transistor 850 is connected to the cathode of diode 858, which in turn has its anode connected through resistor 860 to the port E, the latter being provided with a signal from the auto by-pass circuit 282, shown in detail in FIGS. 2G and 2I. In this regard, resistors 860A and 860B are tied together to port E. The emitter of transistor 850 is also connected through each of the capacitors 862 and 864 to the noninverting input of amplifier 866. The latter in turn is connected through resistor 868 to the capacitor 870, the latter being connected to port C for the right channel path 257A and port D for the left channel path 257B, for receiving the respective outputs from the input buffers 254, shown in FIG. 2A. The junction of resistor 868 and capacitor 870 is connected through resistor 872 to system ground. The noninverting input of amplifier 866 is also connected to one electrode of an FET transistor 874 which has its other electrode connected to system ground. The gate of transistors 874A and 874B of both channels are connected each through the resistor 876 to a common junction 878 to the port F, the latter being connected to a suitable power source. Finally, the output of amplifier 866 is connected through each of a resistor 878 and a capacitor 880 to resistor 882. The respective resistors 882A and 882B are in turn connected respectively to the right channel output terminal 278A, which in turn is connected to the right channel of a system preamplifier (not shown), and the left channel output terminal 278B, which in turn is connected to the left channel of the system preamplifier.
The preferred embodiment of the control path of the system of FIG. 1 will now be described in detail. Referring to FIG. 2G each channel input 252 has a pair of input terminals, the negative input terminal 900 and the positive input terminal 902. The two input terminals form the input of the balance to single-ended converter 279. Terminal 900 is connected through parallel resistor 904 to the positive input terminal 902. Terminal 900 is also connected through resistor 906 to the capacitor 908, which in turn is connected to system ground. Resistor 906 is also connected through resistor 910 to the inverting input of amplifier 912. The terminal 902 is connected through resistor 914 to the capacitor 916, which in turn is connected to system ground. Resistor 914 is also connected through resistor 918 to the noninverting input of amplifier 912. The noninverting input of amplifier 912 is also connected through resistor 920 to system ground. The output of amplifier 912 is connected through feedback resistor 922 to its inverting input. The output of amplifier 912 forms the output of the converter and is connected to the input of the power monitor circuit 280 (shown in detail in FIG. 2H) and to the input of the auto by-pass circuit 282 (shown in detail in FIGS. 2G and 2I).
More particularly, referring to FIG. 2H, the output of amplifier 912 of each converter 279 (shown in FIG. 2G) is connected to the input of power monitor circuit 280 by connecting the output of the amplifier to the input of frequency weighting filter 284. The input of filter 284 includes capacitor 924, which in turn is connected to each of the resistor 926 and capacitor 928. The resistor 926 and capacitor 928 are in turn connected together to the resistor 930. The resistor 930 in turn forms the output of filter 284 and is connected to the input of the level detector 286. As previously described, detector 286 is preferably an RMS detector for providing a DC output signal as a function of the RMS value of the input signal. The resistor 932 is preferably connected between the input and output of each detector while the output of the detector 286 is connected through resistor 934 to the input of the greater of the two circuit 288. Resistor 934 is in turn connected to the noninverting input amplifier 936, which has its inverting input connected through resistor 938 to the junction 940. Junction 940 is common for both channels. The inverting input of amplifier 936 is connected to the anode of diode 942, the latter having its cathode connected to the output of the amplifier. Amplifier 936 has its output also connected to the anode of diode 944 which in turn has its cathode connected to the junction 946 common to both channels. The junctions 940 and 946 are respectively connected to the power threshhold detector 290 and the display 950. More particularly, junction 940 is connected to resistor 952 of the detector 290. Resistor 952 in turn is connected to the inverting input of amplifier 954. Amplifier 954 has its inverting input also connected through resistor 956 to a voltage source and through resistor 958 to the wiper arm of potentiometer 960. The noninverting input of amplifier 954 is connected to system ground, while its output is connected to the anode of a diode 962. The cathode of diode 962 is connected to the inverting input of amplifier 954. The output of amplifier 954 is also connected to the cathode of diode 964, which in turn has its anode connected through resistor 966 to the inverting input of the amplifier. The anode of diode 964 is connected to the noninverting input of amplifier 968, the latter having its output connected to its inverting input. The inverting input and output of amplifier 968 is connected to the control input 786 of each of the ain control circuits 270A and 270B, as shown in FIG. 2E.
The junction 946 of the greater of the two circuit 288 is connected to the input resistor 976 of the display 950, shown in FIG. 2H. Resistor 976 is in turn connected through resistor 978 to the wiper arm of potentiometer 960 of the threshhold detector 290. Resistor 976 is also connected to the noninverting input of each of the amplifiers 980, 982, and 984. The latter are for driving the light-emitting diodes 986, 988, and 990. Accordingly, a negative voltage source is connected through resistor 992 to the inverting input of amplifier 980. The resistor 992 in turn is connected through resistor 994 to the inverting input of amplifier 982. Resistor 994 in turn is connected through resistor 996 to the inverting input of amplifier 984. The inverting input of amplifier 984 is in turn connected to system ground. The output of amplifier 980 is connected to the anode of diode 986, which in turn has its cathode connected to the output of amplifier 982. The output of amplifier 982 has its output connected to the anode of diode 988, which in turn has its cathode connected to the output of amplifier 984. Finally, the output of amplifier 984 is connected to the cathode of diode 990 which in turn has its cathode connected to a suitable voltage source. The output of amplifier 980 is also connected to the collector of transistor 998 which has its emitter connected to resistor 1000, the latter being biased by a voltage source. The base of transistor 998 is in turn connected through resistor 1002 to system ground, and to the cathode of diode 1004. The anode of diode 1004 is connected through resistor 1006 to a voltage source.
Referring again to FIG. 2G, the output of each double to single ended converter 279 is also connected to the input of the auto by-pass circuit 282. More particularly, the output of amplifier 912 is connected to the input capacitor 1010 of gain stage 294 of circuit 282. Capacitor 1010 is in turn connected through resistor 1012 to system ground. Capacitor 1010 is also connected to the noninverting input of amplifier 1014. The output of amplifier 1014 is connected through resistor 1016 to the inverting input of the amplifier, the inverting input being connected through resistor 1018 to system ground. The output of amplifier 1014 is connected through capacitor 1020 of the filter 296 to resistor 1022, which in turn is connected to capacitor 1024. The latter is connected to system ground. Resistor 1022 is also connected through resistor 1026 to the inverting input of amplifier 1028 of signal averaging detector 298. The noninverting input of amplifier 1028 is connected to system ground, while its inverting input is connected to the anode of diode 1030. The cathode of diode 1030 is connected to the output of the amplifier. The output of amplifier 1028 is in turn connected to the emitter of transistor 1032, which in turn has its collector and base connected together and to the inverting input of amplifier 1028. The emitter of transistor 1032 is connected to the emitter of transistor 1034. The collector and base of transistor 1034 are connected together and connected through the capacitor 1036 to system ground and through resistor 1038 to a voltage source. The base and collector of transistor 1034 are connected to the resistor 1040, which in turn is connected through capacitor 1042 to system ground. The base and collector of transistor 1034 are also connected through capacitor 1044 to resistor 1046. The latter in turn is connected to the junction formed by capacitor 1042 and resistor 1048. Resistor 1048 in turn is connected to system ground. The junction of resistors 1046 and 1048 are connected to the inverting input of amplifier 1050, shown in FIG. 2I.
Referring still to FIG. 2G, the output of averaging detector 298A at the base collector connection of transistor 1034A is connected through resistor 1052 to the resistor 1054. The latter in turn is con nected to system ground. The base and collector of transistor 1034A is also connected through capacitor 1056 to the resistor 1058. The latter in turn is connected to resistor 1054 to system ground and through capacitor 1060 to system ground. The junction of resistor 152, resistor 1058, resistor 1054, and capacitor 1060 is connected to the inverting input of a second amplifier 1062, shown in FIG. 2I.
Referring to FIG. 2I, the noninverting input of amplifier 1050 is connected through resistor 1064 to system ground, and through resistor 1066 to junction 1068. The noninverting input of amplifier 1062 is connected through resistor 1070 to system ground, and through resistor 1072 to junction 1068. The output of amplifier 1050 is connected through each of the feedback capacitor 1074 and feedback resistor 1076 to its noninverting input. In a similar manner, amplifier 1062 has its output connected through each of a feedback capacitor 1078 and feedback resistor 1080 to its noninverting input. Junction 1068 is connected to one contact 1082 of the switch 1088. Contact 1084 of switch 1088 is connected through resistor 1090 to a voltage source and to a wiper arm of potentiometer 1092. The contact 1086 of switch 1088 is connected through resistor 1094 to a voltage source and to the wiper arm of potentiometer 1096. Contact 1086 of switch 1088 is also connected through resistor 1098 to one side of the resistor of potentiometer 1096, the other side being connected to a voltage source. Resistor 1098 is also connected through resistor 1100 to the wiper arm of potentiometer 1092. Resistor 1098 is also connected to one system ground. The switch 1088 is thus movable between one position wherein the resistors 1094 and 1098 and potentiometer 1096 are connected in the circuit and a second position wherein the resistors 1090 and 1100 and potentiometer 1092 are connected in the circuit.
The outputs of the two amplifiers 1050 and 1062 are connected together and to resistor 1102 which in turn is connected to a voltage source. The output of the comparator 300, formed by the connection of the common connection of the outputs of amplifiers 1050 and 1062, is connected to the noninverting input of amplifier 1104 and the inverting input of amplifier 1106. The inverting input of amplifier 1104 and the noninverting input of amplifier 1106 are connected to system ground. The output of the comparator 300 is also connected to the contact 1108 of switch 1114. Contact 1110 of the switch is disconnected, while contact 1112 of the switch is connected to a suitable voltage source. A second switch 1116 has its contact 1118 disconnected and its contact 1120 connected through resistor 1122 to a suitable voltage source. The third contact 1124 is connected to the cathode of a light-emitting diode 1126, the latter having its cathode connected to the output of amplifier 1104. The contact 1124 of switch 1116 also is connected to the cathode of a diode 1128, which in turn has its cathode connected to the anode of a light-emitting diode 1130. Diode 1130 in turn has its cathode con nected to the output of amplifier 1106 and to the resistor 1132 to a suitable voltage source. The output of amplifier 1106 is connected directly to port E, the latter being connected to the resistors 860A and 860B of the output circuit 276.
In the preferred embodiment of the system shown in FIGS. 2A - 2I, the resistors and capacitors have the values shown in the following TABLE B, with resistors being indicated by the prefix R and their values in ohms and the capacitors being indicated by the prefix C and their values in farads. The letter "K" indicates kilohms, "M" indicates megaohms, uf indicates microfarads, "nf" indicates nanofarads and "pf" indicates picofarads.
In operation, the system shown in FIGS. 2A - 2I substantially balances the signal energy level between the two audio channels over a long period of time. This is achieved by the utilization of the auto-balance circuit 258 with the switches 456 and 478 in the position shown. Circuit 258 compares the signal energy levels in each of the channels provided from the filters 256A and 256B. The latter are designed to pass the signal energy within the audio range between about 20Hz and 20Khz, while eliminating undesirable noise outside this range. Each of the signal averaging detectors 408A and 408B provide output signals which are a function of the average power detected in each of the respective channels over a relatively long period of time. The two outputs of the detectors 408 are compared by the operational amplifier 428 and a difference signal is provided. If the output of amplifier 428 is positive then the average signal energy is greater in the left channnel than the right channel, and if negative then the average signal energy is greater in the right channel. This differential signal is modified by the operational amplifier 440 and added at port G to control input 788B of gain control circuit 270B, and inverted by the amplifier 468 and added at port H to control input 788A of gain control circuit 270A. The two signals provided at ports G and H are thus approximately equal and opposite in polarity to one another so that the control signals provided at the control inputs 788 of the circuits 270 provide greater atte nuation in one channel and less attenuation in the other channel. Adjustment of the potentiometer 472 varies the relative values of the two signals applied to ports G and H so that proper balancing occurs. Where the autotomatic balancing feature is not desired, for example when playing a particular recording, the switches 462 and 478 need only be switch to its other position than the one shown in FIG. 2C.
The system shown in FIGS. 2A - 2I also prevents the loudspeakers from being overdriven. This is accomplished by the power monitor 280. More particularly, the two power inputs provided at inputs 252A and 252B in FIG. 2G are transmitted and/or converted by converters 279A and 279B. The output signals of converters 279A and 279B are filtered by the frequency weighting filters 284A and 284B, shown in FIG. 2H. The frequency weighting filters 284 preferentially transmit the signal energy in the middle and high frequency ranges applied to the midrange and tweeter speaker drivers, respectively, since these speaker drivers are more sensitive to excess power than the corresponding woofers. The output of filters 284A and 284B are applied to the RMS level detectors 286A and 286B which provide DC output signals as a function of the RMS value of the respective input signals to the detectors. The DC control output signal of each detector is compared with one another by the greater of the two circuit 288. The latter provide an output signal as a function of the greater of the two signals. This larger signal is compared. with the reference level set by potentiometer 960 of the power threshold detector 290. Should the power exceed the level determined by the potentiometer 960, a DC output signal is provided to the buffer amplifier 968, which in turn applies a signal (having a DC value as a function of the signal applied to its noninverting input) to the control inputs 788 of each of the gain control circuits 270A and 270B. As well known in the art, the gain control circuits vary the signal gain impressed on the signals transmitted over each of the main signal paths of each channel in response to and as a function of the amplitude of the DC control signal output of the amplifier 968 of power threshold detector 290. Generally, the greater the level of the DC control signal output the greater the reduction in gain impressed on the main signals by the gain control circuits.
Finally, the system of FIGS. 2A - 2I senses the power applied to each of the inputs of the speakers of the stereophonic system and connects the signal paths defined by each set of components 256 - 276 to the respective outputs 278 when the power applied to at least one of the speakers is at least a predetermined minimum level, and connects the paths 257A and 257B through the respective ports C and D to the outputs 278A and 278B when the power sensed falls below the minimum level. The foregoing is achieved by virtue of the auto by-pass circuit 282, shown in FIGS. 2G and 2I. The circuit 282 senses at inputs 252A and 252B the right and left power signals applied to the respective right and left channel speakers. After the sensed power signals are transmitted and/or converted by the converters 279A and 279B, they are subsequently amplified by the gain stages 294A and 294B. The amplified signals are filtered by the bandpass filters 296A and 296B and applied to the signal averaging level detectors 298A and 298B. Since detectors provide an output of the average power level applied to its input over a long period of time, fast changing signals will not substantially affect the output of the detectors 298A and 298B. So long as the output signals of detectors 298 are above the reference levels set by potentiometer 1092 or potentiometer 1096 of comparators 300 (depending upon the setting of the switch 1088), the latter will provide outputs to the switch driver 302, which in turn increases the signal level applied to port E. As shown in Fig. 2F the signal at port E is applied to the bases of transistors 850A and 850B so that when the signal at port E is at a large enough level the transistors will remain conductive and allow the signal outputs from filters 274A and 274B to be transmitted to the outputs 278A and 278B, while preventing signal paths 257A and 257B from conducting.
However, should the power level drop below a minimum level as determined by potentiometer 1092 or 1096 of the comparators 300A and 300B, the output of level detectors 298A and 298B will fall below the reference levels set for each of the comparators 300A and 300B so that the level of the signal applied to port E falls below the level to maintain transistors 850A and 850B nonconductive. This, however, will connect the signal paths 257A and 257B to the respective outputs 278A and 278B as, for example, when it is desirable to listen to the program on earphones only.

Claims

1. A signal processing system for use with an audio reproduction system, said signal processing system comprising a pair of input terminals for respectively receiving a pair of stereophonic audio input signals, a pair of output terminals for respectively providing a pair of stereophonic audio output signals and a pair of signal paths for respectively transmitting said two input signals between said input and output terminals, characterized by means (408A, 408B) coupled to each of said input terminals (250A, 250B) for detecting the signal energy levels of each of the corresponding input signals, means (428) for comparing the detected signal energy levels of said audio input signals and for generating a difference signal in response to and as a function of said comparison, and means (270A, 270B) responsive to said difference signal and coupled between the system input and output terminals (250A, 250B, 278A, 278B) of at least one of said signal paths for varying the signal gain impressed on the input signal transmitted over said at least one path as a function of said difference signal so that said signal energy levels of said output signals are substantially balanced over relatively long periods of time.

2. A system according to claim 1, wherein said means (408A, 408B) for detecting the signal energy level includes signal averaging detectors.