EP0357366A1 - Improved current mirror circuit - Google Patents
Improved current mirror circuit Download PDFInfo
- Publication number
- EP0357366A1 EP0357366A1 EP89308704A EP89308704A EP0357366A1 EP 0357366 A1 EP0357366 A1 EP 0357366A1 EP 89308704 A EP89308704 A EP 89308704A EP 89308704 A EP89308704 A EP 89308704A EP 0357366 A1 EP0357366 A1 EP 0357366A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor
- mirroring
- drain
- current
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/06—Modifications for ensuring a fully conducting state
- H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Definitions
- the present invention relates to an improved driver circuit for electronic circuitry. More particularly the invention concerns a switched current mode driver designed for use in input-output channel selection functions associated with an IBM (Registered Trade Mark) 360/370 channel, capable of interconnection with a plurality of peripheral devices for receiving selection signals from the channel and redriving the signals to the next control unit.
- IBM Registered Trade Mark
- IBM 360/370 channel systems where a plurality of peripheral devices must be connected to one or more central processing units (CPU's) it is common to use a control unit associated with each peripheral device being attached to the 360/370 channel.
- control units use a module that performs power supply, logic and switching functions with respect to the connection lines that are required to initiate and terminate operations between the 360/370 channel interface and the respective control units.
- an integrated select-out bypass chip that performs select-out and select-in control for a single IBM system 360 and system 370 1/O interface.
- the control unit attached to the 360/370 channel interface uses a select-out signal to detect the start of a selection sequence from the channel.
- the select-out signal not only is received by each control unit, but also passes through logic and is redriven to the next control unit attached to the channel.
- the integrated select-out bypass function provides an electrical bypass for the select-out/select-in signal when the control unit is powered off.
- the internal select-out bypass design contains the driver and receiver used when the control unit is powered up to receive and redrive the select-out signal to the next control unit.
- the object of the present invention is to provide an improved driver circuit for electronic circuitry.
- the invention relates to a switched current mode driver comprising an MOS reference transistor and control element connected between a reference voltage source and a current source; an MOS mirroring transistor connected between the reference voltage source and load means in mirrored configuration to the reference transistor; and signal means connected between the control element and the mirroring transistor for controlling drain potential of the reference transistor whereby it follows the drain potential of the mirroring transistor.
- Figure 1 shows a typical known type of line driver implementation. This basic circuit has been used extensively in bipolar versions of I/O drivers of the type generally described herein.
- a +6 volt supply voltage is provided through a current limiting resistor 11 to the collector of an NPN transistor 12 having its emitter connected to a 95 ohm load resistor at the output.
- the driver input is connected to the base of the transistor and a 750 ohm resistor 14 is provided between the input and supply voltage terminals.
- a basic Switched Current Mode Driver (SCMD) configuration shown in Figure 2a, would partially overcome these problems.
- SCMD Switched Current Mode Driver
- the SCMD dissipates about one-fifth the power of a conventional bipolar driver under short circuit conditions.
- the SCMD requires no complicated protection circuit to shut it down during short circuits.
- the SCMD returns to normal operation as soon as a short circuit is removed, without requiring a reactivation sequence such as cycling its input.
- a SCMD may be provided by a current mirroring device and a switch.
- Figure 2b shows such a driver configuration implemented in MOS technology.
- the Switched Current Mode Driver utilises a supply voltage V DD connected to the source of a P channel reference device 22, having its gate and drain connected to a current reference 23 and a switch 24 respectively.
- a current mirroring device, typically another P channel device 26, is provided, again having its source connected to the supply voltage V DD , its gate connected to the drain of device 22, and its drain connected to an output or load impedance 27.
- the switch 24 When the switch 24 is open, the reference current flows through device 22 and is mirrored in device 26 forcing the output high. When the switch 24 is closed, it bypasses device 22 so no current is reflected in device 26. With no current in device 26, the load resistor 27 pulls the output low. Choice of appropriate sizes for device 22 and device 26 allows them to remain saturated while the source-to-drain voltage of device 26 is made arbitrarily small. Theoretically, any supply voltage greater than the required output voltage across resistor 27 is sufficient to power the circuit. This allows the switched current mode driver to operate from a typical 5 volt, 10% supply and meet the 3.9 volt logic one level.
- FIG. 3a a current mirroring circuit is illustrated wherein device 32 serves as a reference, device 34 is a control element and device 36 is the mirroring device. As shown, all devices 32, 34, 36 are P channel MOSFETS. V DD is connected to the source of device 32, and its drain is connected to the source of device 34. The drain of device 34 is connected to a current reference 33, and to the gate of device 32. The gate of device 32 is also connected to the gate of device 36, with the source of device 36 being connected to V DD and its drain being connected to load impedance 37, as illustrated.
- the circuit otherwise includes a conventional operational amplifier 38 having its output connected to the gate of device 34. An inverting input of the OP AMP 38 is connected to the drain of device 32 and the non-inverting input is connected to the drain of mirroring device 36.
- V GATE must adjust itself so that the reference current flows through device 32. Since device 36 sees the same terminal voltages as device 32 does, it mirrors the reference current "perfectly", whether or not the devices are operating in saturation. As V OUT approaches V DD , the source-to-drain voltage of the mirroring devices becomes very small, forcing the devices out of saturation and into the linear region.
- the mirroring devices continue to operate with the devices in the linear region by lowering the potential at the gates of devices 32 and 36. This, in turn, increases the gate drive of the mirroring devices, thereby maintaining constant current. This range of ideal operation is shown in Figure 3b as region "B".
- V GATE would continue dropping as V OUT were brought arbitrarily close to V DD .
- a limit to how low V GATE can drop and still sustain current through the non-ideal device 33 current source typically 1 volt, is reached, a further increase in V OUT will not produce a corresponding drop in V GATE .
- the reference current begins to decrease, which in turn decreases the mirrored output current, I OUT .
- region "A" in Figure 3b can be made arbitrarily small by making device 33 a more perfect current source (e.g. connect it to a negative power supply instead of ground). Even without a perfect I REF source, this improved mirroring device allows operation much closer to the V DD rail than the other circuits.
- Device 34 cannot force the drain of device 32 to drop below the potential of V GATE . If V OUT falls below V GATE the feed back circuit effectively short circuits the gates of the mirroring devices to the drain of device 32 through device 34.
- This mode of operation is shown as region "C" in Figure 3b. The characteristics of the mirroring device in this region are nearly identical to those of a simple mirroring device built with equivalent device sizes.
- region "B" The normal mode of operation for this improved current mirroring device, when implementing a SCMD is in region "B". Because the near ideal characteristics of region "B" extend very close to V DD and allow devices forming the SCMD to operate in the linear region. Lower power supply voltages and much smaller devices may be used in this configuration than in previous configurations.
- a “battery” that drops the same voltage as the gate-to-source voltage, V GS , of device 34 may replace the operational amplifier of Figure 3a as shown in Figure 4a where like elements are represented by like primed numerals.
- This "battery” is easily implemented as a scaled device biased by a small constant current source as shown in Figure 4b.
- the V GS voltage of device 42 is equal to that of device 34 ⁇ , the mirror devices 32 ⁇ and 36 ⁇ will see the same potential at all nodes and the circuit will behave just like the one in Figure 3a.
- the advantages of this circuit are its smaller area, reduced complexity and wider bandwidth due to the removal of the operational amplifier.
Abstract
an MOS mirroring transistor (26; 36) connected between the reference voltage source and load means in mirrored configuration to the reference transistor; and
signal means connected between the control element and the mirroring transistor for controlling drain potential of the reference transistor whereby it follows the drain potential of the mirroring transistor.
Description
- The present invention relates to an improved driver circuit for electronic circuitry. More particularly the invention concerns a switched current mode driver designed for use in input-output channel selection functions associated with an IBM (Registered Trade Mark) 360/370 channel, capable of interconnection with a plurality of peripheral devices for receiving selection signals from the channel and redriving the signals to the next control unit.
- In the use of IBM 360/370 channel systems where a plurality of peripheral devices must be connected to one or more central processing units (CPU's) it is common to use a control unit associated with each peripheral device being attached to the 360/370 channel. Such control units use a module that performs power supply, logic and switching functions with respect to the connection lines that are required to initiate and terminate operations between the 360/370 channel interface and the respective control units. In such systems it is usual to provide an integrated select-out bypass chip that performs select-out and select-in control for a single IBM system 360 and system 370 1/O interface. The control unit attached to the 360/370 channel interface uses a select-out signal to detect the start of a selection sequence from the channel. Unlike the other interface lines, the select-out signal not only is received by each control unit, but also passes through logic and is redriven to the next control unit attached to the channel. The integrated select-out bypass function provides an electrical bypass for the select-out/select-in signal when the control unit is powered off. Besides the select out bypass function, the internal select-out bypass design contains the driver and receiver used when the control unit is powered up to receive and redrive the select-out signal to the next control unit.
- Driver requirements for use in IBM 360/370 channels to drive the select-in and select-out lines require capability to drive 3.9 volts into a 95-ohm cable and be short circuit protected. Modern systems also require short circuit detection (RAS) and a high impedance mode for testing purposes. Bipolar driver circuits have been used in the past in typical line driver implementations. However the usual 6-volt power supply requirement for bipolar circuits is undesirable. Moreover, the large current limiting resistors associated with such circuits result in excessive power dissipation. Consequently, a need exists to utilise MOS (metal oxide silicon) circuitry for such line driver implementations in order to operate at the lower power supply voltages, typically 5 volts, available with more recently designed systems, and to reduce power dissipation.
- The object of the present invention is to provide an improved driver circuit for electronic circuitry.
- The invention relates to a switched current mode driver comprising an MOS reference transistor and control element connected between a reference voltage source and a current source; an MOS mirroring transistor connected between the reference voltage source and load means in mirrored configuration to the reference transistor; and signal means connected between the control element and the mirroring transistor for controlling drain potential of the reference transistor whereby it follows the drain potential of the mirroring transistor.
- In order that the invention may be more readily understood, an embodiment will now be described with reference to the accompanying drawings in which:
- Figure 1 represents a typical known type of non-current mode line driver designed in bipolar technology,
- Figure 2a represents a switched current mode driver in accordance with the invention,
- Figure 2b represents an MOS technology realisation of a switched current mode driver such as illustrated in Figure 2a,
- Figure 3a represents an improved output resistance current mirror driver circuit in accordance with the invention,
- Figure 3b is a graph of the electrical output characteristics of the circuit of Figure 3a,
- Figure 4a is a schematic of another improved current mirror driver circuit, and
- Figure 4b is yet another improved driver circuit similar to that illustrated in Figure 4a.
- Figure 1 shows a typical known type of line driver implementation. This basic circuit has been used extensively in bipolar versions of I/O drivers of the type generally described herein.
- In the driver circuit illustrated in Figure 1, a +6 volt supply voltage is provided through a current limiting resistor 11 to the collector of an
NPN transistor 12 having its emitter connected to a 95 ohm load resistor at the output. The driver input is connected to the base of the transistor and a 750ohm resistor 14 is provided between the input and supply voltage terminals. - The configuration may be implemented in MOS technology simply by replacing the NPN device with a MOSFET (MOS Field Effect Transistor). However the large current limiting resistor and the 6 volt power supply requirements are very undesirable. Many newer technologies do not allow operation of drivers at 6 volts, and systems are less expensive if all circuits use a single power supply, typically 5 volts with a 10% tolerance. The 35 ohm current limiting resistor dissipates a significant amount of power, especially when the driver is short circuited. It is often added as an external resistor, increasing both the module pin count and the production costs.
- A basic Switched Current Mode Driver (SCMD) configuration, shown in Figure 2a, would partially overcome these problems. When switched ON, a current ION from a current source is forced through the load. The voltage developed at the output is then
VOUT = ION X RLOAD. - For ION > 42.2 ma and RLOAD > 92.6 ohms, the voltage developed exceeds the required 3.9 volts. When the SCMD is switched OFF, the load pulls the line to a logic zero level, as does the classic driver of Figure 1.
- The power dissipated by a SCMD under short circuit conditions is only
Power = ION X VDD. - For ION = 42 ma and VDD = 5.0 volts, the power dissipated is 0.21 watts. Under similar conditions, the circuit of Figure 1, dissipates
Power = VDD²/35 = 1.02 Watts - Thus, the SCMD dissipates about one-fifth the power of a conventional bipolar driver under short circuit conditions. The SCMD requires no complicated protection circuit to shut it down during short circuits. Unlike many other drivers, the SCMD returns to normal operation as soon as a short circuit is removed, without requiring a reactivation sequence such as cycling its input.
- A SCMD may be provided by a current mirroring device and a switch. Figure 2b shows such a driver configuration implemented in MOS technology. In Figure 2b, the Switched Current Mode Driver utilises a supply voltage VDD connected to the source of a P
channel reference device 22, having its gate and drain connected to acurrent reference 23 and a switch 24 respectively. A current mirroring device, typically anotherP channel device 26, is provided, again having its source connected to the supply voltage VDD, its gate connected to the drain ofdevice 22, and its drain connected to an output orload impedance 27. - When the switch 24 is open, the reference current flows through
device 22 and is mirrored indevice 26 forcing the output high. When the switch 24 is closed, it bypassesdevice 22 so no current is reflected indevice 26. With no current indevice 26, theload resistor 27 pulls the output low. Choice of appropriate sizes fordevice 22 anddevice 26 allows them to remain saturated while the source-to-drain voltage ofdevice 26 is made arbitrarily small. Theoretically, any supply voltage greater than the required output voltage acrossresistor 27 is sufficient to power the circuit. This allows the switched current mode driver to operate from a typical 5 volt, 10% supply and meet the 3.9 volt logic one level. - The precision of current mirroring devices in any integrated circuit technology can be high, due to good tracking of parameters across carefully designed devices. It depends primarily on parameter matching rather than on the absolute values. MOS technology is especially well suited for current mirroring device designs because of extremely low gate current. The only parameter of concern not cancelled by tracking is the output conductance, GDS, which may, however, be reduced to an arbitrarily small value by device design. Therefore, the theoretical accuracy of a SCMD implemented in MOS technology is limited only by the accuracy of the reference current and the degree of matching of the devices.
- In MOS technology, the output impedance of a SCMD is increased as device lengths are increased. Unfortunately, area and capacitance considerations limit the length that may be used in practice. Current errors may be eliminated, even in short devices, by forcing all nodes of the mirroring devices to the same potential. This is commonly done by "stacking" mirroring devices. Stacked mirroring devices, however, require higher power supply voltages to bias the additional devices. Thus, prior art stacked mirroring devices only improve the output impedance when the output potential is significantly lower than VDD and it has been found that the 3.9 volt requirement of the typical SCMD cannot be met with this type of current mirroring device.
- A solution to the problem is to add a feedback circuit that controls the drain of the reference device, as illustrated in Figure 3a. In Figure 3a a current mirroring circuit is illustrated wherein
device 32 serves as a reference,device 34 is a control element anddevice 36 is the mirroring device. As shown, alldevices device 32, and its drain is connected to the source ofdevice 34. The drain ofdevice 34 is connected to acurrent reference 33, and to the gate ofdevice 32. The gate ofdevice 32 is also connected to the gate ofdevice 36, with the source ofdevice 36 being connected to VDD and its drain being connected to loadimpedance 37, as illustrated. The circuit otherwise includes a conventionaloperational amplifier 38 having its output connected to the gate ofdevice 34. An inverting input of theOP AMP 38 is connected to the drain ofdevice 32 and the non-inverting input is connected to the drain of mirroringdevice 36. - The gates as well as the sources of the two mirroring devices (32 and 36) are tied together, forcing their VGS potentials to track each other. The
OP AMP 38 and thedevice 34 force the drain ofdevice 32 to follow the potential at VOUT which is also the drain voltage ofdevice 36. Therefore, the gates, sources, and drains of the twomirroring devices device 32. Sincedevice 36 sees the same terminal voltages asdevice 32 does, it mirrors the reference current "perfectly", whether or not the devices are operating in saturation. As VOUT approaches VDD, the source-to-drain voltage of the mirroring devices becomes very small, forcing the devices out of saturation and into the linear region. The mirroring devices continue to operate with the devices in the linear region by lowering the potential at the gates ofdevices - If
device 33 were an ideal current source, VGATE would continue dropping as VOUT were brought arbitrarily close to VDD. There is, of course, a limit to how low VGATE can drop and still sustain current through thenon-ideal device 33 current source. When this limit, typically 1 volt, is reached, a further increase in VOUT will not produce a corresponding drop in VGATE. Instead, the reference current begins to decrease, which in turn decreases the mirrored output current, IOUT. This is shown as region "A" in Figure 3b and can be made arbitrarily small by making device 33 a more perfect current source (e.g. connect it to a negative power supply instead of ground). Even without a perfect IREF source, this improved mirroring device allows operation much closer to the VDD rail than the other circuits. -
Device 34 cannot force the drain ofdevice 32 to drop below the potential of VGATE. If VOUT falls below VGATEthe feed back circuit effectively short circuits the gates of the mirroring devices to the drain ofdevice 32 throughdevice 34. This mode of operation is shown as region "C" in Figure 3b. The characteristics of the mirroring device in this region are nearly identical to those of a simple mirroring device built with equivalent device sizes. - The normal mode of operation for this improved current mirroring device, when implementing a SCMD is in region "B". Because the near ideal characteristics of region "B" extend very close to VDD and allow devices forming the SCMD to operate in the linear region. Lower power supply voltages and much smaller devices may be used in this configuration than in previous configurations.
- A "battery" that drops the same voltage as the gate-to-source voltage, VGS, of
device 34 may replace the operational amplifier of Figure 3a as shown in Figure 4a where like elements are represented by like primed numerals. This "battery" is easily implemented as a scaled device biased by a small constant current source as shown in Figure 4b. As long as the VGS voltage ofdevice 42 is equal to that ofdevice 34˝, themirror devices 32˝ and 36˝ will see the same potential at all nodes and the circuit will behave just like the one in Figure 3a. The advantages of this circuit are its smaller area, reduced complexity and wider bandwidth due to the removal of the operational amplifier.
Claims (4)
an MOS reference transistor (22; 32) and control element (24; 34) connected between a reference voltage source and a current source;
an MOS mirroring transistor (26; 36) connected between the reference voltage source and load means in mirrored configuration to said reference transistor; and
signal means connected between said control element and said mirroring transistor for controlling drain potential of said reference transistor whereby it follows the drain potential of said mirroring transistor.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/238,090 US4937469A (en) | 1988-08-30 | 1988-08-30 | Switched current mode driver in CMOS with short circuit protection |
US238090 | 1994-05-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0357366A1 true EP0357366A1 (en) | 1990-03-07 |
EP0357366B1 EP0357366B1 (en) | 1993-12-08 |
Family
ID=22896452
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP89308704A Expired - Lifetime EP0357366B1 (en) | 1988-08-30 | 1989-08-29 | Improved current mirror circuit |
Country Status (4)
Country | Link |
---|---|
US (1) | US4937469A (en) |
EP (1) | EP0357366B1 (en) |
JP (1) | JPH07105706B2 (en) |
DE (1) | DE68911234T2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991018338A1 (en) * | 1990-05-17 | 1991-11-28 | International Business Machines Corporation | Switchable current source |
CN100514250C (en) * | 2000-07-05 | 2009-07-15 | 盛群半导体股份有限公司 | Current output circuit with high current ratio |
EP3961345A1 (en) * | 2020-08-25 | 2022-03-02 | STMicroelectronics (Rousset) SAS | Power supply for electronic circuit |
US11768512B2 (en) | 2019-12-12 | 2023-09-26 | Stmicroelectronics (Rousset) Sas | Method of smoothing a current consumed by an integrated circuit, and corresponding device |
US11829178B2 (en) | 2020-08-25 | 2023-11-28 | Stmicroelectronics (Rousset) Sas | Device and method for protecting confidential data in an electronic circuit powered by a power supply |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2883625B2 (en) * | 1989-03-30 | 1999-04-19 | 株式会社東芝 | MOS type charging circuit |
GB8913439D0 (en) * | 1989-06-12 | 1989-08-02 | Inmos Ltd | Current mirror circuit |
JP2531818B2 (en) * | 1990-02-21 | 1996-09-04 | 株式会社東芝 | Semiconductor integrated circuit |
US5374857A (en) * | 1992-05-29 | 1994-12-20 | Sgs-Thomson Microelectronics, Inc. | Circuit for providing drive current to a motor using a sensefet current sensing device and a fast amplifier |
US5504444A (en) * | 1994-01-24 | 1996-04-02 | Arithmos, Inc. | Driver circuits with extended voltage range |
US5783952A (en) * | 1996-09-16 | 1998-07-21 | Atmel Corporation | Clock feedthrough reduction system for switched current memory cells |
US6466081B1 (en) * | 2000-11-08 | 2002-10-15 | Applied Micro Circuits Corporation | Temperature stable CMOS device |
US6597553B2 (en) | 2001-12-18 | 2003-07-22 | Honeywell International Inc. | Short circuit protection for a high or low side driver with low impact to driver performance |
US20060055465A1 (en) * | 2004-09-15 | 2006-03-16 | Shui-Mu Lin | Low voltage output current mirror method and apparatus thereof |
FR3000576B1 (en) * | 2012-12-27 | 2016-05-06 | Dolphin Integration Sa | POWER CIRCUIT |
JP6453553B2 (en) * | 2014-03-26 | 2019-01-16 | 株式会社メガチップス | Current mirror circuit and receiver using the same |
US10186942B2 (en) * | 2015-01-14 | 2019-01-22 | Dialog Semiconductor (Uk) Limited | Methods and apparatus for discharging a node of an electrical circuit |
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US4532481A (en) * | 1983-06-14 | 1985-07-30 | Harris Corporation | High voltage current mirror |
EP0189894A2 (en) * | 1985-01-29 | 1986-08-06 | Omron Tateisi Electronics Co. | Basic circuitry particularly for construction of multivalued logic systems |
WO1989007792A1 (en) * | 1988-02-16 | 1989-08-24 | Analog Devices, Inc. | Mos current mirror with high output impedance and compliance |
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JPS59221014A (en) * | 1983-05-30 | 1984-12-12 | Sony Corp | Voltage/current converting circuit |
US4694201A (en) * | 1985-04-30 | 1987-09-15 | Motorola, Inc. | Current-saving CMOS input buffer |
JPH0763140B2 (en) * | 1985-11-13 | 1995-07-05 | 松下電器産業株式会社 | Gate circuit |
NL8503394A (en) * | 1985-12-10 | 1987-07-01 | Philips Nv | CURRENT SCREENING FOR A POWER SEMICONDUCTOR DEVICE, PARTICULARLY INTEGRATED INTELLIGENT POWER SEMICONDUCTOR SWITCH FOR PARTICULAR AUTOMOTIVE APPLICATIONS. |
-
1988
- 1988-08-30 US US07/238,090 patent/US4937469A/en not_active Expired - Fee Related
-
1989
- 1989-08-29 EP EP89308704A patent/EP0357366B1/en not_active Expired - Lifetime
- 1989-08-29 DE DE68911234T patent/DE68911234T2/en not_active Expired - Fee Related
- 1989-08-30 JP JP1221891A patent/JPH07105706B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US4532481A (en) * | 1983-06-14 | 1985-07-30 | Harris Corporation | High voltage current mirror |
EP0189894A2 (en) * | 1985-01-29 | 1986-08-06 | Omron Tateisi Electronics Co. | Basic circuitry particularly for construction of multivalued logic systems |
WO1989007792A1 (en) * | 1988-02-16 | 1989-08-24 | Analog Devices, Inc. | Mos current mirror with high output impedance and compliance |
Non-Patent Citations (1)
Title |
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PATENT ABSTRACTS OF JAPAN, vol. 3, no. 155 (E-160), 19th December 1979, page 128 E 160; & JP-A-54 136 261 (NIPPON DENKI K.K.) 23-10-1979 * |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991018338A1 (en) * | 1990-05-17 | 1991-11-28 | International Business Machines Corporation | Switchable current source |
CN100514250C (en) * | 2000-07-05 | 2009-07-15 | 盛群半导体股份有限公司 | Current output circuit with high current ratio |
US11768512B2 (en) | 2019-12-12 | 2023-09-26 | Stmicroelectronics (Rousset) Sas | Method of smoothing a current consumed by an integrated circuit, and corresponding device |
EP3961345A1 (en) * | 2020-08-25 | 2022-03-02 | STMicroelectronics (Rousset) SAS | Power supply for electronic circuit |
FR3113777A1 (en) * | 2020-08-25 | 2022-03-04 | Stmicroelectronics (Rousset) Sas | Electronic circuit power supply |
US11829178B2 (en) | 2020-08-25 | 2023-11-28 | Stmicroelectronics (Rousset) Sas | Device and method for protecting confidential data in an electronic circuit powered by a power supply |
Also Published As
Publication number | Publication date |
---|---|
DE68911234T2 (en) | 1994-05-19 |
US4937469A (en) | 1990-06-26 |
EP0357366B1 (en) | 1993-12-08 |
JPH02105722A (en) | 1990-04-18 |
JPH07105706B2 (en) | 1995-11-13 |
DE68911234D1 (en) | 1994-01-20 |
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