EP0290829B1 - Arrangement for decoding signals - Google Patents

Abstract

In an arrangement for decoding signals which are received in addition to other signals as a modulation of radio waves and whose respective frequency constitutes a specific item of information, a time basis signal of constant frequency is generated from which a reference signal with a controllable frequency position and phase position is derived with the aid of a microprocessor. An output signal is derived if there is a coincidence of the reference signal with the received signal with respect to phase and frequency. The time basis signal can preferably be derived from the instruction frequency of the microprocessor by running through program loops of identical length at least in the timing means. A register which is incremented by changeable values serves for deriving the reference frequency. In the case of two superimposed signals, the one is evaluated with respect to frequency and the other with respect to the pulse duty factor of a binary signal. <IMAGE>

Description

The invention relates to an arrangement according to the preamble of the main claim.

In particular for controlling radio receivers for receiving traffic information, it is known to evaluate a subcarrier modulated with additional signals. For example, a first signal is present, which consists of a predetermined frequency between 20 and 60 Hz and is used to identify the geographic area to which the expected information applies. In addition to this so-called area identifier, from time to time another signal can be received as a so-called announcement identifier, e.g. B. a frequency of 125 Hz. This announcement identifier is used to switch on the playback device of the announcement of the traffic information via a receiving device in the operational state for the modulated subcarrier. Systems of this type and associated transmitting and receiving devices, in particular arrangements for decoding the signals are described in detail in the literature.

The arrangement according to the invention has the task of recognizing as quickly as possible whether and which of the area or announcement characteristic frequencies is present or whether a certain previously entered area characteristic frequency is being received. In addition, the area identifier should also be able to be recognized while an announcement identifier is present. In this context, recognizing means generating corresponding switching signals, which are forwarded to other groups of a radio and trigger functions there, such as: search start, LF volume control, display of the area and the announcement with the aid of indicator lamps or alphanumeric display devices.

To identify which of the specified values the low-frequency amplitude information currently has, DE 32 33 829 shows a method in which a digital signal is generated in the receiver in the frequency position of the subcarrier, from which an analog signal is then derived and with which Input signal is compared. If necessary, the digital signal is corrected until it matches the input signal. The digital value of the generated signal is then further processed as digital amplitude information of the input signal. The circuit for carrying out this method comprises a digital time base generator of constant frequency, from which a reference signal is derived by a controlled frequency divider. The readjustment of the frequency divider follows the output signal of a comparison stage in which the input signal is compared with the reference signal.

In contrast, the arrangement according to the invention is characterized by the features of the main claim.

With a practical arrangement according to the invention, a detection of a range characteristic frequency can be achieved within less than 200 ms, while an announcement identification takes place within 800 ms. Even during an announcement, an area identifier can be recognized within less than 500 ms.

Fig. 1

ein stark vereinfachtes Blockschaltbild einer Anordnung zur Demodulation, Selektion und Decodierung von Verkehrsfunkkennsignalen gemäß der Erfindung,

Fig. 2

ein Signalflußdiagramm einer erfindungsgemäßen Anordnung,

Fig. 3

Tabellen zur Darstellung einzelner Signalverarbeitungsabläufe,

Fig. 4

eine schematische Darstellung eines für den Mikroprozessor vorgesehenen Programms und

Fig. 5

ein Signalflußdiagramm einer erfindungsgemäßen Anordnung, bei welcher zunächst eine Erkennung des Durchsagekennsignals und dann eine Erkennung des Bereichskennsignals erfolgt.

Exemplary embodiments of the invention are shown in the drawing using several figures and are explained in more detail in the following description. It shows:

Fig. 1

2 shows a greatly simplified block diagram of an arrangement for demodulation, selection and decoding of traffic information signals according to the invention,

Fig. 2

1 shows a signal flow diagram of an arrangement according to the invention,

Fig. 3

Tables for displaying individual signal processing processes,

Fig. 4

a schematic representation of a program provided for the microprocessor and

Fig. 5

a signal flow diagram of an arrangement according to the invention, in which the announcement identification signal is first recognized and then the area identification signal is recognized.

The arrangement according to FIG. 1 is supplied at 1 with the multiplex signal MPX generated by the demodulator of a receiver, not shown, which comprises the audio signals and the amplitude-modulated subcarrier with a frequency of 57 kHz. The subcarrier is demodulated in a circuit 2 with the aid of a bandpass, a control circuit known per se and an amplitude demodulator. The output of circuit 2 is connected to a filter and limiter circuit 3, 4. The filter and limiter circuit 3 is used to calculate and select the area identification signal BK, while the filter and limiter circuit 4 limits and selects the announcement identification signal DK. Both filter and limiter circuits 3, 4 emit a signal BF or DF with the corresponding frequency when a range identification or announcement identification signal occurs. A switching signal BK or DK is generated from these signals in a decoder 5 when the identification signals are present.

According to one embodiment of the invention, the signals BF or DF can be processed without prior frequency selection. In addition, in known circuits, 4-bit quantization of the characteristic signals transmitted as a sine wave is required, while in the arrangement according to the invention, binaryization with a switching threshold is possible.

In the arrangement according to the invention, the announcement identification signal is decoded in a manner similar to that of the area identification signal. The explanations referring to the signal flow diagram according to FIG. 2 therefore largely also apply to the decoding of the announcement identification signal. It follows first a general description of the arrangement according to FIG. 2; Details are explained in connection with Figures 3 to 5.

At 11, the input signal X, which is the binarized output signal of the circuit 2 (FIG. 1), is made available, while at 12 a time base frequency F0 is generated. An 8-bit register 13 is incremented in time with the time base frequency F0 by a number dP, which is a function of K.

The value 0 is applied to the maximum value in a manner known per se. No precautions have been taken for special treatment of the overflow. From the content P of the register 13, the two most significant digits P2 are forwarded via 14 and processed at 15 with the input signal X. A signal H is formed which consists of the remainder of a division of the sum of P2 + 2 * X by four. At 16, two successive values of the signal H, namely the signal values H0 and H1, are stored. Signals E and I are obtained from these. E is proportional to the integral over the phase error, while I is a measure of the reliability of the detection.

The signals E and I are evaluated at 17, after which a phase variation 18 for controlling the reference signal is controlled.

A distinction is made between an active and a passive area identifier. In the active area identifier, a value K is specified, which is assigned to one of the area identifier frequencies. It will then only area identification signals with this frequency are evaluated and, for example, a search is stopped only for transmitters which transmit this area identification signal.

In the case of the passive area identifier, it is only ascertained whether the currently received transmitter is transmitting an area identifier signal and what frequency this area identifier signal has. Correspondingly, the signal flow diagram according to FIG. 2 provides that either the selection of the value K at 19 by the operator or that at 20 a variation of the value K controlled by the evaluation 17 can take place. The value K is stored at 21, from which the number dP is formed at 22, which is added to the register content in register 13 in time with the frequency F0. Since the content of register 13 has the meaning of a phase, the value dP is also to be understood as a phase increment.

Because of the system-related quantization, the phase and thus the signal E carry out control oscillations even when the control loop is engaged. Function 23, explained later, serves for damping.

Sampling of the input signals with a frequency of at least 1.3 kHz is required for fast and reliable detection. This frequency is generated by periodically running through program parts with a defined number of instructions. However, since the individual functions (see signal flow diagram FIG. 2) have to be carried out at different times, a first program part R1 is run through with each program run, while further program parts are run through alternately.

Such a sequence of program runs is shown in a table in FIG. 3a. In the first program run the program parts R1 and R2 are run through in succession, in the second program run the program parts R1 and R4, in the third program run again the program parts R1 and R2, in the fourth program run the program parts R1 and R8 etc. The various program parts may be in to a certain extent be of different lengths. It is important that everyone is always the same length. This results in a constant repetition frequency of all program parts on average over time. B. for the program part R1 2.7 kHz, for R2 1.35 kHz, for R4 0.67 kHz etc.

The register 13 (FIG. 2) is now incremented for the announcement identifier in the program part R1, that is to say at a frequency of 2.7 kHz. A corresponding register in program part R2 is incremented for the area identifier. In order to save computing time in the frequently occurring program parts R1 and R2, these program parts are incremented with low accuracy - for example 4 bits - (dP2), while in less frequent program parts a fine correction is carried out with dP16.

This means that reference frequencies are available for the area identifier and for the announcement identifier with the aid of a phase locked loop, which are constant over time and can be set to an accuracy of 1/10000 without great effort. They can also be easily changed by changing the increments or by directly varying the register content P.

The two most significant bits P2 of P periodically run through the number range 0, 1, 2, 3 and thus mark a four-phase template in the time range. This is applied to the input signal X by forming a signal H = P2 + 2X mod 4. This is shown in Fig. 3b for a sample of X that matches the target value. In this case, H takes the values 1 or 2. A deviation from the target value results in H 0 or 3. For an input signal X that is leading by 90 ° and lagging by 90 °, the formation of H is shown in FIGS. 3c and 3d.

For the sake of clarity, a sampling frequency was chosen in FIGS. 3b to 3d which is lower than the frequency of 2.7 kHz mentioned. With a real relationship between the frequency of the input signal X and the sampling frequency, the relationships shown in FIG. 3e result. An input signal X leading by 18 ° is assumed as an example.

In a part of the program that is run half as often as the derivation of H, the values E and I are obtained from two successive values H0 and H1 by integration. E can take values between 0 and 15, which is sufficient for a 4-bit register, while I is greater than 0 and can take larger values than E. However, due to the required speed, I is also handled in a 4-bit register and in a less frequent part of the program supplemented by further register offices.

I contains information about the security of the detection. After two samples with the correct phase position (H = 1 or 2), I is incremented by 1. After two samples with wrong phase position (H = 0 or 3), I is decremented by 2, whereby I cannot become less than 0. I can therefore only run up from 0 if the phase is predominantly correct.

E contains the information about the direction of any necessary frequency or phase correction. This information is contained in the most significant bit (MSB) of E. E also provides a statement about the need for such a correction, which is given if the absolute value of (E - 7.5) is greater than a function of I (e.g. 1 + I / 4). 3f shows the formation of E and I from the two successive values H0 and H1.

The phase correction of P2 is carried out in a program section that runs less frequently, the most significant bit of E or the sign of (E-7.5) determining the direction of the correction and the amount of the correction depending on I. With a large I, the phase is only slightly varied, since in this case the phase-locked loop is already well engaged. With a small I, however, there is a strong phase variation, which results in the large catch width of the phase-locked circuit required for rapid engagement.

This strong variation with a small I also solves the problem of the unstable equilibrium in the opposite phase, in which H supplies the values 0 and 3 and E initially contains no useful directional information.

However, I quickly runs to 0 and the resulting large variation in the phase, which is random in its direction, cancels this state.

The phase, and thus also E, always carry out control oscillations even when the phase-locked loop is engaged, which never completely subside due to the system-related quantization. E swings around its "mean" of 7.5. To dampen these control vibrations, E is periodically pulled towards the center by setting E = E - SGN (E - 7.5) (SGN = sign). This takes place at 23 in the signal flow diagram according to FIG. 2.

Locking the phase-locked loop means that there is an announcement identifier or an area identifier corresponding to the preselected frequency (active area identifier). In the active area identifier, a number K (K = 0 ... 5 corresponding to areas A to F in the method introduced in Europe or K = 0 to 9 corresponding to areas 0 to 9 in a method used in the USA) is selected. This can be done via a data bus or by entering a key. For the preselected K, a corresponding set of increments dP1 and dP16 is kept ready for the variation of the phase.

The task of passive range identification is to find a corresponding value for K for the frequency of the input signal. The phase or frequency correction required for snapping in is not carried out here - as described above - by changing the phase as a function of I. This mechanism is used for passive area identification only - weakly dosed - for fine correction of the phase. Rather, the number K is varied when E, the integral over the phase error, exceeds a certain measure dependent on I. The following applies:
if ABS (E - 7.5) greater than or equal to 1 + INT (I / 4), then K = K + SGN (E - 7.5) where K = 0 ... 5.

Due to the associated frequency change, K quickly (especially with a small I) comes close to the correct value. Nevertheless, this operation is not sufficient to snap the phase locked loop into place quickly. Since this operation takes place in program part R4, K takes a certain time to pass through its range of numbers. The phase error would initially increase until the correct value was reached, and would then have to be reduced again by overshooting K beyond the correct value, which would lead to non-ending control oscillations or even to non-engagement if the phase error exceeded 180 °.

A damping of these control vibrations is necessary so that the settling takes place in the shortest possible time. For this purpose, an additional control of the phase proportional to E or to change K or the frequency is introduced. Each time KE is changed, it is initially set to an average. The integrator is thus largely switched off. In addition, the phase is changed by a certain value so that the desired damping is achieved. However, resetting E to center when K changes does not cancel the phase error. With the following K, this phase error E would drive in the same direction again. For this reason, K also becomes the phase changed by an empirically determined value, so that the phase error disappears approximately when the new K corresponds to the correct value.

This direct phase change, on the one hand, delays the change in K, on the other hand, it enables the phase-locked loop to snap into place even when the K is completely wrong, since the strong phase change required then takes place almost exclusively via this mechanism.

When the correct value of K is reached, this phase change is a kind of "phase credit". At the new frequency, the phase locked loop should be given a chance to snap in and should not be too heavily loaded with phase errors from the past.

If the phase is largely correct, the value I increases and thus increases the threshold that must be exceeded for K to be changed again by E. In this way, the correct value K is very likely to be retained after it has been found.

As already mentioned, I represents a measure of the detection reliability, its two most significant bits are therefore output via a data bus, the number 0 representing no detection, the number 3 representing reliable detection and the numbers 1 and 2 corresponding mean values.

Without further measures, however, the value 3 is reached more quickly for the low-frequency range characteristic signals A, B than for the higher-frequency D, F. This has various reasons, for example in that the starting conditions for the lower ranges are better, that due to the phase errors initially present, a ripple is superimposed on the ramp-up of I, which is more noticeable in the area identification signal A and by phase errors, which are also more significant at higher area identification frequencies.

In order to make the recognition time approximately the same for all areas, the two most significant bits of I are not used directly, but for K greater than or equal to 1, the value K - 1 is first added to the four most significant bits of I before the two most significant bits as area recognition security be issued. As a result, the state "no detection" is assigned to "1" at F. The same applies to the ranges 0 to 9 in the method used in the USA.

4 shows a flowchart of a program provided for operating an arrangement according to the invention. For the sake of clarity, functions performed in the individual program parts are only given insofar as is necessary to explain the invention. The values relating to the announcement identifier are supplemented by a "D", while "B" means area identifier.

The program part R1 is run through with each program run and contains an 8-bit wide program counter, in which a count variable n is increased by 1 with each program run. In the program part R1, the phase register for the announcement identifier is incremented and the phase comparison for the announcement identifier is carried out in that the values HD1 and HD0 can be derived, as has already been described in connection with Figures 2 and 3.

The program part R1 is followed by a branch 41, in which it is checked whether n is odd. If this is the case, the program runs through program part R2, in which the phase register for the area identifier is incremented and the phase comparison for the area identifier is carried out.

If n is an even number, it is checked at branch 42 whether n = 4 m + 2. As with branch 41 and the following branches, m is any whole positive number including 0. The program part R4 is connected to the yes output of branch 42, in which the evaluation of H as in connection with FIG. in particular the table according to FIG. 3f. If necessary, K is varied and E is placed in the middle. Depending on K, a new set of increments is retrieved.

Following the no output of branch 42, another branch 43 follows, in which it is checked whether n = 8m + 4. If applicable, a program part from R8 is run through, in which, on the one hand, the incrementation is fine-tuned for the announcement identifier and, on the other hand, is set to an average value for the area identifier E.

In a similar way branches of the program occur at 44 to 48, so that program parts R16, R32, R64, R128, R256 and R256 'are run through in less frequent order.

After demodulating the 57 kHz subcarrier - as explained at the beginning - a binaryization is carried out. The square-wave signal thus obtained has the frequency of the respective identifier, that is to say that of the area identifier or that of the announcement identifier. If both an area identifier and an announcement identifier are transmitted, the binary signal has the frequency of the announcement identifier in the method used in the USA because of the reduction in amplitude of the area identifier, while the area identifier is noticeable as duty cycle modulation. With the arrangement described in connection with FIGS. 2 to 4, however, only the frequency of the binary signal is evaluated, so that if the area identifier and the announcement identifier are present at the same time, only the announcement identifier is initially recognized.

The system shown in FIG. 5 enables the detection of an area identifier received in addition to the announcement identifier. Two function blocks 51, 52 are assumed, each of which enables the announcement identifier and the area identifier to be recognized in the manner described so far. The binary input signal is supplied to two function blocks 51, 52 via an input 53. A signal DK can be taken from the function block 51 at the output 54, which indicates the presence of an announcement identifier, while a signal BK is present at the output 55 if an area identifier is present.

A signal D0 is also taken from the function block 51, which controls a changeover switch 56 in such a way that, in the absence of an announcement identifier, the input of the function block 52 is connected directly to the input 53. However, if there is an announcement identifier, the internally generated input signal is used to recognize the area identifier with the help of the switch 56 instead of the binary input signal. The switchover does not take place until the announcement identifier is recognized with certainty, that is to say when the signal DK is emitted via the output 54, but rather already at a lower value D0 of the integrator I for the announcement identifier.

If there is therefore already a certain probability of an announcement identifier being present, the internally generated signal for area identification is fed to the function block 52. This is derived by comparing the reference signal for the announcement identifier or a signal derived therefrom with the duty cycle modulated input signal. Various methods are possible for this, one of which is shown in FIG. 5. It assumes that the binary input signal is sampled at a sufficiently high frequency. This is the case with the arrangement explained in connection with FIGS. 2 to 4 with a frequency of 2.7 kHz. The weak phase shift of the edges of the announcement identification signal is then detected with sufficient probability, namely at least once in every half-wave.

For this purpose, the binary input signal in an exclusive-OR link 57 with a rectangular sequence derived from the two most significant bits of P (namely the content of the phase register 13 (FIG. 2)), which serves here as a setpoint for the phase of the announcement identifier Frequency of the most significant bit compared. If they do not match, it is assumed that it is an edge shift caused by an area identifier. The then present value of the input signal is transferred to a memory 59 via a gate circuit 58. Since the said phase shift takes place in time with the area characteristic signal, a signal with the area characteristic frequency is present at the output of the memory 59, which signal can be evaluated in function block 52 as already explained.

Claims (4)

1. Arrangement for the detection of one of a number of given code frequencies, which are received together with radiowaves as modulation of an auxiliary carrier, having a time-base signal generator (12), from which a reference signal is derived which is brought into coincidence with the modulated auxiliary carrier in terms of frequency and phase position, characterised in that, for generation of the reference signal, a microprocessor changes the content (B) of an L-bit wide accumulator (13) by a number (dP) which is substantially less than 2^L and can assume given values assigned to the detectable frequencies, in that the most significant bit (MSB) of the accumulator is fed as reference signal to a phase and/or frequency comparison stage (15) and in that the values of the number (dP) are automatically varied (from 19 to 22) until the value which is assigned to the received code frequency is reached.
2. Arrangement according to Claim 1, characterised in that the number (dP1D, dP2B) is added to the accumulator content within a frequently repeated program part and a further number (dP8D, dP16B) is added within program parts run through less frequently.
3. Arrangement according to Claim 1 or 2, characterised in that a reference signal phase-shifted by 90° is derived by combining the most significant bit and the second most significant bit of the accumulator by an exclusive-OR operation.
4. Arrangement according to Claim 3, characterised in that the reference signal and a reference signal phase-shifted by 90° with respect to the latter is in each case combined with the signal to be decoded by an exclusive-OR operation and in that the results of the exclusive-OR operations are in each case fed to an integrator.

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