EP0197044A1 - Process for etching polysilicon with freon 11 and another gas - Google Patents

Process for etching polysilicon with freon 11 and another gas

Info

Publication number
EP0197044A1
EP0197044A1 EP19850904367 EP85904367A EP0197044A1 EP 0197044 A1 EP0197044 A1 EP 0197044A1 EP 19850904367 EP19850904367 EP 19850904367 EP 85904367 A EP85904367 A EP 85904367A EP 0197044 A1 EP0197044 A1 EP 0197044A1
Authority
EP
European Patent Office
Prior art keywords
freon
gas
chamber
etching
mixture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19850904367
Other languages
German (de)
French (fr)
Inventor
Jack Wayne Scannell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CollabRx Inc
Original Assignee
CollabRx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CollabRx Inc filed Critical CollabRx Inc
Publication of EP0197044A1 publication Critical patent/EP0197044A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Definitions

  • This invention relates generally to an improved process for etching polysilicon and, more particularly, to a process of pre-mixing CFCI3 (Freon 11) and SF5 for etching polysilicon.
  • the manufacturing of semiconductor chips and related thin film circuitry involves the etching of different layers such as polysilicon and silicon.
  • the area to be etched is masked by material such as photoresist with the mask forming a pattern of lines and areas exposing the layer to be etched.
  • etching by a wet chemical process using large amounts of various acids, alkalis, organic solvents and the like which contacted the exposed surface.
  • contamination by impurities contained in the chemicals and swelling of the resist film used as a mask causing an irregular shape and occurrences of undercut. Undercutting occurs when the et ⁇ hant acts horizontally as well as vertically, thereby removing material below the photoresist.
  • gas plasmas particularly fluorine based gases selected from the saturated halocarbon series such as CF4, CCI4, and BCI3. These gases are mixed with inert gases such as O2, N2, or Ar in a chamber in which the etching is to be accomplished.
  • One particular known process comprises the mixing of CFCI3 (Freon 11) and SFg in the etching chamber which results in etched geometries with less than 0.3 micron total resist mask undercut.
  • Freon 11 is stored in a tank in liquid form and remains a liquid at ambient temperatures, approximately 20°C, because its boiling point is 23.7°C at one atmosphere pressure. As Freon 11 boils off creating a vapor, the vapor is removed along a line to a mass flow controller (MFC) .
  • MFC mass flow controller
  • the SFg is stored in a second tank in gas form and is also transported along a line to another MFC, wherein a predetermined flow is provided to the etching chamber.
  • a temperature or pressure gradient along the line transporting the Freon vapor may cause the vapor to condense into a liquid.
  • This condensed liquid may enter the MFC, causing temporary or permanent failure due to liquid ingestion.
  • MFC replacement if damage is permanent. Attempts to eliminate the occurrence of this condensation by controlling the temperature of the line have not always been successful. Furthermore, the accuracy of the mix is dependent upon the correction operation of the two MFCs.
  • Still another object of the present invention is to provide an improved process for etching semiconductor materials with a mixture of Freon 11 and another gas wherein the accuracy of the percent mix of the gases is independent of MFCs.
  • a process for etching semiconductor material comprising the steps of mixing Freon 11 gas with a second gas and routing the mixed gases into an etching chamber.
  • the single figure is a block diagram illustrating an apparatus suitable for use in carrying out the inventive process.
  • SFg as well as other fluorine based gases selected from the saturated halocarbon series, provides for a fast etch rate of semiconductor materials and provides for excellent selectivity of oxides (better etch rate of the primary material, i.e., polysilicon, to the secondary material, i.e., silicon dioxide).
  • SFg when used alone, causes unacceptable undercut of the photoresist mask.
  • Freon 11 has a slow etch rate but causes little undercut.
  • a mixture of 12.0% of Freon 11 and 88.0% SFg provides good results; however, it is expected that a ' percent range for Freon 11 from 8.0% to 17.0% would provide beneficial results.
  • This mixture precludes the condensation of the Freon 11 and the resultant failure of the MFC. Since the gases are pre-mixed, only one line and one MFC are required for supplying the mixture to the etch chamber. Therefore, the MFC has no bearing on the accuracy of the percent mix of the Freon 11 and SFg.
  • storage chamber 1 is substantially evacuated and then filled with Freon 11 to a vapor pressure of 75.0%. At approximately 20° C, the absolute pressure of this Freon 11 is approximately 62 kPa. The remainder of storage chamber 1 is then filled with SFg to approximately 414 kPa. Once mixed, Freon 11 will not condense at room temperature.
  • the gas mixture flows through a line 2 to a single MFC 3 and then through line 4 to etching chamber 5.
  • the gas mixture will not condense in the line or the MFC; therefore, there is no blockage of the line or failure of the MFC.
  • the accuracy of the percent mix of gases is independent of the MFCs.
  • Another embodiment comprises a two step etch process in which Freon 11 and SFg, mixed as described above, is used first to etch the material. This mixture is then removed from the etching chamber and a mixture of Freon 11 and Argon is used for "overetching" the material.
  • Storage chamber 1 is again filled with Freon 11 to a vapor pressure of 75.0%.. The remainder of storage chamber 1 is then filled with Argon to approximately 138 kPa.
  • argon is desirable since it inhibits Freon 11 polymerization effects.
  • a 39.0% mixture of Freon 11 in argon has proven satisfactory, although other percentages would work as well.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Dans un procédé de gravure de polysilicones, du CFCl3 (fréon 11) et un autre gaz, typiquement du SF6, sont mélangés au préalable dans une chambre de stockage (11) avant d'être amenés dans une chambre de gravure (5). Ce procédé empêche la condensation du fréon 11 dans la conduite d'amenée et la défaillance résultante du dispositif de commande (3) du débit-masse due à l'ingestion de liquide. En outre, comme les gaz sont mélangés au préalable et comme on utilise un seul dispositif de commande du débit-masse, la justesse du mélange ne dépend pas de la précision du dispositif de commande du débit-masse.In a polysilicon etching process, CFCl3 (freon 11) and another gas, typically SF6, are mixed beforehand in a storage chamber (11) before being brought into an etching chamber (5). This process prevents condensation of the freon 11 in the supply line and the resulting failure of the mass flow control device (3) due to ingestion of liquid. In addition, since the gases are mixed beforehand and as a single mass flow control device is used, the accuracy of the mixture does not depend on the precision of the mass flow control device.

Description

PROCESS FOR ETCHING POLYSILICON WITH FREON 11 AND ANOTHER GAS
Background of the Invention
Field of the Invention
This invention relates generally to an improved process for etching polysilicon and, more particularly, to a process of pre-mixing CFCI3 (Freon 11) and SF5 for etching polysilicon.
Background Art
The manufacturing of semiconductor chips and related thin film circuitry involves the etching of different layers such as polysilicon and silicon. Typically, the area to be etched is masked by material such as photoresist with the mask forming a pattern of lines and areas exposing the layer to be etched. Earlier methods accomplished this etching by a wet chemical process using large amounts of various acids, alkalis, organic solvents and the like which contacted the exposed surface. However, many times this wet process resulted in contamination by impurities contained in the chemicals and swelling of the resist film used as a mask causing an irregular shape and occurrences of undercut. Undercutting occurs when the etσhant acts horizontally as well as vertically, thereby removing material below the photoresist.
As technology advances and the trend toward miniaturization continues, an increased degree of integration requires more precise etching processes. More recent processes employ gas plasmas, particularly fluorine based gases selected from the saturated halocarbon series such as CF4, CCI4, and BCI3. These gases are mixed with inert gases such as O2, N2, or Ar in a chamber in which the etching is to be accomplished.
One particular known process comprises the mixing of CFCI3 (Freon 11) and SFg in the etching chamber which results in etched geometries with less than 0.3 micron total resist mask undercut. Freon 11 is stored in a tank in liquid form and remains a liquid at ambient temperatures, approximately 20°C, because its boiling point is 23.7°C at one atmosphere pressure. As Freon 11 boils off creating a vapor, the vapor is removed along a line to a mass flow controller (MFC) . The MFC precisely measures and provides for a predetermined flow of Freon 11 vapor to the etching chamber. The SFg is stored in a second tank in gas form and is also transported along a line to another MFC, wherein a predetermined flow is provided to the etching chamber. However, a temperature or pressure gradient along the line transporting the Freon vapor may cause the vapor to condense into a liquid. This condensed liquid may enter the MFC, causing temporary or permanent failure due to liquid ingestion. Furthermore, it is possible for the liquid to accumulate causing a blockage in the line, thereby preventing any Freon 11 vapor from reaching the MFC. In either case, the end result is production yield loss, costly system downtime, and costly
MFC replacement if damage is permanent. Attempts to eliminate the occurrence of this condensation by controlling the temperature of the line have not always been successful. Furthermore, the accuracy of the mix is dependent upon the correction operation of the two MFCs.
Thus, what is needed is an improved process for mixing Freon 11 and SFg that prevents failure of the process due to liquid forming in the vapor transportation lines, and where the accuracy of the percent mix of gases is independent of the MFCs.
Summary of the Invention
Accordingly, it is an object of the present invention to provide an improved process for etching semiconductor materials. mixture of Freon 11 and another gas wherein the Freon 11 vapor does not condense in the lines supplying the Freon 11 to the etching chamber.
Still another object of the present invention is to provide an improved process for etching semiconductor materials with a mixture of Freon 11 and another gas wherein the accuracy of the percent mix of the gases is independent of MFCs.
In carrying out the above and other objects of the invention in one form, there is provided a process for etching semiconductor material comprising the steps of mixing Freon 11 gas with a second gas and routing the mixed gases into an etching chamber.
The above and other objects, features, and advantages of the present invention will be better understood from the following detailed description.
Brief Description of the Drawing
The single figure is a block diagram illustrating an apparatus suitable for use in carrying out the inventive process.
Detailed Description of the Preferred Embodiment
SFg, as well as other fluorine based gases selected from the saturated halocarbon series, provides for a fast etch rate of semiconductor materials and provides for excellent selectivity of oxides (better etch rate of the primary material, i.e., polysilicon, to the secondary material, i.e., silicon dioxide). However", SFg, when used alone, causes unacceptable undercut of the photoresist mask. Freon 11 has a slow etch rate but causes little undercut. When the SFg and Freon 11 are pre-mixed in accordance with the present invention, a sufficiently fast etch rate and selectivity are obtained while minimizing the underσut. A mixture of 12.0% of Freon 11 and 88.0% SFg provides good results; however, it is expected that a 'percent range for Freon 11 from 8.0% to 17.0% would provide beneficial results. This mixture precludes the condensation of the Freon 11 and the resultant failure of the MFC. Since the gases are pre-mixed, only one line and one MFC are required for supplying the mixture to the etch chamber. Therefore, the MFC has no bearing on the accuracy of the percent mix of the Freon 11 and SFg. Referring to the single figure, storage chamber 1 is substantially evacuated and then filled with Freon 11 to a vapor pressure of 75.0%. At approximately 20° C, the absolute pressure of this Freon 11 is approximately 62 kPa. The remainder of storage chamber 1 is then filled with SFg to approximately 414 kPa. Once mixed, Freon 11 will not condense at room temperature.
The gas mixture flows through a line 2 to a single MFC 3 and then through line 4 to etching chamber 5. The gas mixture will not condense in the line or the MFC; therefore, there is no blockage of the line or failure of the MFC. Furthermore, since the gas is pre-mixed and there is only one MFC, the accuracy of the percent mix of gases is independent of the MFCs.
Another embodiment comprises a two step etch process in which Freon 11 and SFg, mixed as described above, is used first to etch the material. This mixture is then removed from the etching chamber and a mixture of Freon 11 and Argon is used for "overetching" the material. Storage chamber 1 is again filled with Freon 11 to a vapor pressure of 75.0%.. The remainder of storage chamber 1 is then filled with Argon to approximately 138 kPa. Although other inert gases could be used, argon is desirable since it inhibits Freon 11 polymerization effects. A 39.0% mixture of Freon 11 in argon has proven satisfactory, although other percentages would work as well. By mixing Freon 11 and the inert gas, condensation in the lines is prevented, thereby preventing blockage of the lines and failure of the MFC.
By now it should be appreciated that there has been provided an improved process of pre-mixing Freon 11 with another gas for etching polysilicon. This process prevents condensation of the Freon 11, thereby preventing blockage of the line and failure of the MFC. Furthermore, by pre-mixing the gases, the accuracy of the mix is not dependent upon the MFCs.
The above description is given by way of example only. Changes in form and details may be made by one skilled in the art without parting from the spirit and scope of the invention. For example, the pressure and percent of the gas mixtures may vary.

Claims

1. A process for etching a semiconductor material in an etching chamber comprising the steps of: storing CFCI3 under pressure in a gaseous state; and 5 supplying said gas to said chamber at a controlled rate.
2. The process as set forth in claim 1 wherein said gaseous state is obtained by the step of: mixing said CFCI3 w th a flourine based gas.
° 3. The process according to claim 1 wherein the fluorine based gas is SFg.
4. - The process according to claim 3 wherein the percent mixture of the CFCI3 gas is- in the range of 8.0 to 17.0 percent.
5 5. The process as set forth in claim 1 wherein said gaseous state is obtained by the step of: mixing said CFCI3 with inert gas.
6. The process according to claim 5 wherein the fourth gas is Argon.
0 7. A process for etching a semiconductor material in an etch chamber comprising the steps of: connecting said chamber to a static supply of a mixture CFCI3 and a fluorine based gas; supplying said gas to said chamber at a controlled 5 rate; terminating the supply of said mixture; connecting said chamber to a static supply of a mixture of CFCI3 and an inert gas; and supplying said gas to said chamber at a controlled rate.
EP19850904367 1984-10-01 1985-08-26 Process for etching polysilicon with freon 11 and another gas Withdrawn EP0197044A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US65620084A 1984-10-01 1984-10-01
US656200 1984-10-01

Publications (1)

Publication Number Publication Date
EP0197044A1 true EP0197044A1 (en) 1986-10-15

Family

ID=24632072

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19850904367 Withdrawn EP0197044A1 (en) 1984-10-01 1985-08-26 Process for etching polysilicon with freon 11 and another gas

Country Status (3)

Country Link
EP (1) EP0197044A1 (en)
JP (1) JPS62500622A (en)
WO (1) WO1986002199A1 (en)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4214946A (en) * 1979-02-21 1980-07-29 International Business Machines Corporation Selective reactive ion etching of polysilicon against SiO2 utilizing SF6 -Cl2 -inert gas etchant
DE2915983C2 (en) * 1979-04-20 1983-03-31 Klöckner Ionon GmbH, 5000 Köln Method for generating a gas mixture
US4255230A (en) * 1980-02-22 1981-03-10 Eaton Corporation Plasma etching process
JPS5747876A (en) * 1980-09-03 1982-03-18 Toshiba Corp Plasma etching apparatus and method
US4353777A (en) * 1981-04-20 1982-10-12 Lfe Corporation Selective plasma polysilicon etching
US4447290A (en) * 1982-06-10 1984-05-08 Intel Corporation CMOS Process with unique plasma etching step
US4473435A (en) * 1983-03-23 1984-09-25 Drytek Plasma etchant mixture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8602199A1 *

Also Published As

Publication number Publication date
JPS62500622A (en) 1987-03-12
WO1986002199A1 (en) 1986-04-10

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Inventor name: SCANNELL, JACK, WAYNE