EP0116293A1 - Modulation system for railway circuits - Google Patents

Modulation system for railway circuits Download PDF

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Publication number
EP0116293A1
EP0116293A1 EP84100273A EP84100273A EP0116293A1 EP 0116293 A1 EP0116293 A1 EP 0116293A1 EP 84100273 A EP84100273 A EP 84100273A EP 84100273 A EP84100273 A EP 84100273A EP 0116293 A1 EP0116293 A1 EP 0116293A1
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Prior art keywords
modulation
output
signals
shift register
pseudo
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EP84100273A
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German (de)
French (fr)
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EP0116293B1 (en
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Claude Pontier
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Alstom SA
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Alstom SA
Alsthom Atlantique SA
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B61—RAILWAYS
    • B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L1/00—Devices along the route controlled by interaction with the vehicle or vehicle train, e.g. pedals
    • B61L1/18—Railway track circuits
    • B61L1/181—Details
    • B61L1/188—Use of coded current

Definitions

  • the present invention relates to modulation systems for rail track circuits, making it possible to make as low as desired their probability of disturbance by parasitic currents, to which the devices used are subjected in operation.
  • Track circuits are devices very old and widely used in railway technology to ensure the absence of trains in a specific section of track.
  • the principle of track circuits is based on the division of a railroad into successive cantons isolated from each other by pairs of joints or electrical separation devices creating an electrical discontinuity in each of the rails.
  • An electrical signal transmitter is arranged to be connected to the two rails at one end of the block and a receiver of the same signals having passed through the rails is arranged at the other end of the same block between the two rails also.
  • a train entering the canton entrance on the receiver side causes a short circuit of the signals by the electrical axle-rail link of the train and this short circuit of the signals detected by the receiver generates a change in signaling state, lights, for example, turning red at the entrance to the train in the block and thus preventing the next train from entering the block as long as the block is occupied by the train preceding it.
  • the modulation systems of the track circuits used up to now can be, for example, either of the type of pulse modulation, or of the type of sinusoidal carrier frequency modulated in amplitude or in frequency.
  • pulse modulation these are generated by the channel transmitter of a block with a certain polarity, the pulses having a particular recurrence frequency, while the transmitter of the adjacent block generates pulses of 'reverse polarity, the pulses having a slightly different frequency of recurrence.
  • the carrier frequency is different from one canton to another as well as the modulation frequency.
  • pulse modulation or modulation of the sinusoidal carrier the information to be transmitted which leads to state one or state zero of the signaling depends either on the pulse polarity and its amplitude or on the carrier frequency-modulation frequency couple and its amplitude.
  • the receiver detects an absence of pulse, a reverse pulse polarity or an insufficient amplitude, in the case of pulse modulation, the receiver changes the signal to red.
  • the receiver detects an absence of carrier or an insufficient amplitude of carrier or an incorrect modulation frequency in the case of amplitude or frequency modulations, the receiver changes the signal to red also.
  • the modulation systems of conventional track circuits have the disadvantage of not being reliable enough from the safety point of view. Indeed, the ever increasing power of modern traction motors and ancillary electrotechnical bodies such as converters of all types (current, voltage, frequency) leads to the production of stray currents of increasingly high level and forms of increasing complexity .
  • the modulation signals used in conventional systems are fixed and have immutable characteristics. It is obvious that a parasitic signal in the frequency band used by the track circuit and similar to the signals used, can cause in the receiver the transition to a state reverse of the state commanding the stop of the trains which can lead to disasters.
  • the modulation system of the present invention overcomes this drawback. This in fact provides very high security due to the insignificant probability of identification error which is obtained.
  • the subject of the present invention is a modulation system for railway track circuits comprising signals modulated by a pulse modulator of positive or negative polarity, characterized in that the signals are determined by at least one pseudo-random binary series, the bits "one" of this series corresponding to one of the two polarities, the "zero" bits of this series corresponding to the other.
  • the present invention also relates to a modulation system for railway track circuits comprising signals whose carrier frequency is modulated by a first or a second frequency.
  • modulation frequency characterized in that the signals are determined by at least one pseudo-random binary series, the bits "one" of this series corresponding to one of the two modulation frequencies, the bits "zero" of this series corresponding to the other.
  • said pseudo-random binary series are different in successive cantons and an emitter of said modulated signals comprises a cyclic code generator made up of EXCLUSIVE OR modules connected to at least one output of the stages of a shift register incremented by a clock so that the choice of said stages is predetermined according to the transmitter in order to produce each of said pseudo-random binary series.
  • said transmitter of the modulated signals comprises, at the output of the last stage of said shift register, a pulse generator of variable polarity followed by a power amplifier delivering said amplified pulses in the track circuit, said pulse generator delivering a positive pulse when the bit at the output of the shift register is "one" and a negative pulse when the bit at the output of the shift register is "zero".
  • said transmitter of modulated signals comprises, at the output of the last stage of said shift register, a modulator of the carrier frequency signals followed by a power amplifier delivering said carrier frequency signals in 1 circuit of channel, said modulator delivering carrier frequency signals modulated at a first modulation frequency when the bit at the output of the shift register is "one" and at a second modulation frequency when the bit at the output of the shift register is " zero".
  • a receiver of said modulated signals having traversed the channel comprises a cyclic code generator constituted by a register identical to that of said corresponding transmitter whose EXCLUSIVE modules are connected to the same stages of the register according to the same arrangement and whose output is compared in a comparator with the pseudo-random binary series originating from said modulated signals.
  • an attraction timer actuating an output relay of said receiver, said timer having a delay delay such that it makes it possible to obtain the desired probability of error d 'identification of said pseudo-random binary series assigned to the considered track circuit.
  • Figure 1 shows an electrical block diagram of a channel circuit transmitter modulated by a pseudo-random binary series generator.
  • FIG. 2 represents a block diagram of a channel circuit receiver modulated by signals coded by the pseudo-random binary series having crossed the channel.
  • the bit entered at entry 12 of register 10 for each period thereof is obtained by adding modulo 2 by means of three EXCLUSIVE OR 13, 14, 15 in this example connected to stages 1, 3, 5 and 6 of the register 10. It should be noted that in another transmitter the EXCLUSIVE OUs 13, 14, 15 would be connected to other stages of register 10 with the exception of stage 6 which is still used.
  • the bit present at the output 16 of the register 10 at each period of the clock 11 constitutes the continuation of the binary pseudo-random series being generated.
  • Such a device generates for a length n of the shift register 10 and certain combinations of the EXCLUSIVE OR modules a linear periodic binary series of length 2 n-1 bits.
  • the theory of polynomials indeed shows that if we consider the binary numbers of n bits contained at each instant in the shift register 10 all the possible numbers except 0 ... 0 appear successively once and only once to each period of the series in an order which depends on the number and location of the modules. So if we knows the length n of the shift register 10 the number and location of the modules and the number it contains at a given time, it is possible to predict its future successive contents and therefore the series sent.
  • the output 16 of the register 10 communicates with a modulator or a pulse generator 17 delivering a signal to a power amplifier 18 in order to amplify it.
  • a modulator 17 the signal consists of a carrier frequency of value 1000 Hz for example, modulated in amplitude or in frequency by a modulating frequency F1 of value 12 Hz for example when a bit "one" is present at output 16 of register 10 and by a modulating frequency F2 of value 17 Hz for example when a "zero" bit is present at output 16 of register 10.
  • the signal consists of pulses, for example rectangular, with positive polarity, for example when a bit "one" is present at output 16 of register 10 and with negative polarity, for example, when a "zero" bit is present at output 16 of register 10.
  • the modulated signal amplified by the amplifier 18 at the power level required for the operation of the track circuit, is injected into the track, at one end of the portion of track in which it is desired to ensure the absence of the train , by the output 19 of the amplifier 18.
  • FIG. 2 shows the channel circuit receiver corresponding to the transmitter which has just been described.
  • the receiver is connected to the track by its input 20 at the end opposite the transmitter of the track portion in which it is desired to ensure the absence of the train.
  • the signal present at the input 20 of the receiver is first filtered in a filter 21.
  • the filter 21 is adapted to the width of the pulses and to their frequency of recurrence.
  • the filter 21 is a bandpass filter centered on the carrier frequency.
  • the signal is then demodulated in the demodulator 22.
  • the latter consists of active elements such as diodes for example.
  • the register 100 comprises the same number of EXCLUSIVE OR modules 130, 140 and 150 connected to the same stages 1, 3, 5 and 6 of register 100 as modules 13, 14 and 15 of register 10 of the transmitter.
  • the polynomial theory shows that after a synchronization period of duration at most equal to n bits (n being the length of the registers), the bit existing at output 24 of modulos 130, 140 and 150 is the same as that which will be received at the output 23 of the demodulator 22 at the following period of the clock 11 of the transmitter.
  • This equality is controlled by the comparator 25.
  • the bits present at the inputs 23 and 24 of this comparator are 1 and 1 or 0 and 0 its output 26 delivers the state 1 which means that the comparison is correct.
  • output 26 of comparator is in logic state 0, which means that the comparison is incorrect.
  • the output 26 of the comparator 25 is applied to an attraction timer 27 which controls the relay 28 for outputting the receiver of the track circuit, the contacts 29 of which control the lighting of the lamps of the input signal in the track circuit.
  • the delay time delay of the timer 27 is fixed so that the relay 28 is only energized after a certain number m of successive exact comparisons. It is chosen so as to obtain the desired probability of error in identifying the pseudo-random binary series provided for the channel circuit considered.
  • the applications of the present invention are in the field of rail transport and in particular rail control and safety.

Abstract

Système de modulation pour circuits de voie ferroviaires comprenant chacun un émetteur (17) de signaux modulés en fréquence ou par impulsions, Chaque émetteur comporte un générateur (10, 11, 13, 14, 15) de séries binaires pseudo-aléatoires, le changement de fréquence ou de parité d'impulsion s'effectuant au rythme des changements de valeur binaire. Application : contrôle et sécurité ferroviaires.Modulation system for railway track circuits each comprising a transmitter (17) of frequency or pulse modulated signals, Each transmitter comprises a generator (10, 11, 13, 14, 15) of pseudo-random binary series, the change of frequency or pulse parity occurring at the rate of changes in binary value. Application: railway control and safety.

Description

La présente invention concerne les systèmes de modulation pour circuits de voie ferroviaires, permettant de rendre aussi faible qu'on le désire leur probabilité de perturbation par les courants parasites, auxquels les appareils utilisés sont soumis en fonctionnement.The present invention relates to modulation systems for rail track circuits, making it possible to make as low as desired their probability of disturbance by parasitic currents, to which the devices used are subjected in operation.

Les circuits de voie sont des dispositifs très anciennement et très largement répandus en technique ferroviaire pour s'assurer de l'absence des trains dans une portion de voie déterminée. Le principe des circuits de voie est fondé sur la division d'une voie ferrée en cantons successifs isolés les uns des autres par des paires de joints ou des dispositifs électriques de séparation créant une discontinuité électrique dans chacun des rails. Un émetteur de signaux électriques est disposé pour être relié aux deux rails à l'une des extrémités du canton et un récepteur des mêmes signaux ayant parcouru les rails est disposé à l'autre extrémité du même canton entre les deux rails également. Un train pénétrant à l'entrée du canton du côté du récepteur provoque un court-circuit des signaux par la liaison électrique rails-essieux du train et ce court-circuit des signaux détecté par le récepteur engendre un changement d'état de la signalisation, les feux passant par exemple au rouge à l'entrée du train dans le canton et empêchant ainsi le train suivant de pénétrer dans le canton tant que le canton est occupé par le train qui le précède.Track circuits are devices very old and widely used in railway technology to ensure the absence of trains in a specific section of track. The principle of track circuits is based on the division of a railroad into successive cantons isolated from each other by pairs of joints or electrical separation devices creating an electrical discontinuity in each of the rails. An electrical signal transmitter is arranged to be connected to the two rails at one end of the block and a receiver of the same signals having passed through the rails is arranged at the other end of the same block between the two rails also. A train entering the canton entrance on the receiver side causes a short circuit of the signals by the electrical axle-rail link of the train and this short circuit of the signals detected by the receiver generates a change in signaling state, lights, for example, turning red at the entrance to the train in the block and thus preventing the next train from entering the block as long as the block is occupied by the train preceding it.

Les systèmes de modulation des circuits de voie utilisés jusqu'à présent peuvent être, par exemple, soit du type de modulation à impulsions, soit du type de fréquence porteuse sinusoidale modulée en amplitude ou en fréquence. Dans le cas de la modulation par impulsions, celles-ci sont générées par l'émetteur de voie d'un canton avec une certaine polarité, les impulsions ayant une fréquence de récurrence particulière, alors que l'émetteur du canton adjacent génère des impulsions d'une polarité inverse, les impulsions ayant une fréquence de récurrence légèrement différente. Dans le cas de la modulation en amplitude ou en fréquence d'une fréquence porteuse, la fréquence porteuse est différente d'un canton à l'autre ainsi que la fréquence de modulation. Dans tous les cas, modulation par impulsions ou modulation de la porteuse sinusoïdale, l'information à transmettre qui conduit à l'état un ou l'état zéro de la signalisation dépend soit de la polarité d'impulsion et de son amplitude soit du couple fréquence porteuse-fréquence de modulation et de son amplitude. Lorsque le récepteur détecte une absence d'impulsion, une polarité d'impulsion inverse ou une amplitude insuffisante, dans le cas de modulation par impulsions, le récepteur fait passer le signal au rouge. Lorsque le récepteur déteote une absence de porteuse ou une amplitude insuffisante de porteuse ou une fréquence de modulation incorrecte dans le cas de modulations d'amplitude ou de fréquence, le récepteur fait passer le signal au rouge également.The modulation systems of the track circuits used up to now can be, for example, either of the type of pulse modulation, or of the type of sinusoidal carrier frequency modulated in amplitude or in frequency. In the case of pulse modulation, these are generated by the channel transmitter of a block with a certain polarity, the pulses having a particular recurrence frequency, while the transmitter of the adjacent block generates pulses of 'reverse polarity, the pulses having a slightly different frequency of recurrence. In the case of amplitude or frequency modulation of a carrier frequency, the carrier frequency is different from one canton to another as well as the modulation frequency. In all cases, pulse modulation or modulation of the sinusoidal carrier, the information to be transmitted which leads to state one or state zero of the signaling depends either on the pulse polarity and its amplitude or on the carrier frequency-modulation frequency couple and its amplitude. When the receiver detects an absence of pulse, a reverse pulse polarity or an insufficient amplitude, in the case of pulse modulation, the receiver changes the signal to red. When the receiver detects an absence of carrier or an insufficient amplitude of carrier or an incorrect modulation frequency in the case of amplitude or frequency modulations, the receiver changes the signal to red also.

Cependant les systèmes de modulation de circuits de voie classiques ont l'inconvénient de ne pas être assez fiables au point de vue sécurité. En effet, la puissance toujours croissante des moteurs de traction modernes et des organes électrotechniques annexes tels que les convertisseurs de tous type (courant, tension, fréquence) entraine la production de courants parasites de niveau de plus en plus élevé et de formes de complexité croissante. D'autre part, les signaux de modulation employés dans les systèmes classiques sont fixes et ont des caractéristiques immuables. Il est évident qu'un signal parasite dans la bande de fréquences utilisée par le circuit de voie et semblable aux signaux utilisés, peut provoquer dans le récepteur le passage à un état inverse de l'état commandant l'arrêt des trains ce qui peut conduire à des catastrophes.However, the modulation systems of conventional track circuits have the disadvantage of not being reliable enough from the safety point of view. Indeed, the ever increasing power of modern traction motors and ancillary electrotechnical bodies such as converters of all types (current, voltage, frequency) leads to the production of stray currents of increasingly high level and forms of increasing complexity . On the other hand, the modulation signals used in conventional systems are fixed and have immutable characteristics. It is obvious that a parasitic signal in the frequency band used by the track circuit and similar to the signals used, can cause in the receiver the transition to a state reverse of the state commanding the stop of the trains which can lead to disasters.

Le système de modulation de la présente invention remédie à cet inconvénient. Celui-ci assure en effet une très grande sécurité par suite de la probabilité d'erreur d'identification insignifiante qui est obtenue.The modulation system of the present invention overcomes this drawback. This in fact provides very high security due to the insignificant probability of identification error which is obtained.

La présente invention a pour objet un système de modulation pour circuits de voie ferroviaires comportant des signaux modulés par un modulateur par impulsions de polarité positive ou négative, caractérisé en ce que les signaux sont déterminés par au moins une série binaire pseudo-aléatoire, les bits "un" de cette série correspondant à l'une des deux polarités, les bits "zéro" de cette série correspondant à l'autre.The subject of the present invention is a modulation system for railway track circuits comprising signals modulated by a pulse modulator of positive or negative polarity, characterized in that the signals are determined by at least one pseudo-random binary series, the bits "one" of this series corresponding to one of the two polarities, the "zero" bits of this series corresponding to the other.

La présente invention a également pour objet un système de modulation pour circuits de voie ferroviaires comportant des signaux dont la fréquence porteuse est modulée par une première ou une deuxième fréquence de modulation, caractérisé en ce que les signaux sont déterminés par au moins une série binaire pseudo-aléatoire, les bits "un" de cette série correspondant à l'une des deux fréquences de modulation, les bits "zéro" de cette série correspondant à l'autre.The present invention also relates to a modulation system for railway track circuits comprising signals whose carrier frequency is modulated by a first or a second frequency. modulation frequency, characterized in that the signals are determined by at least one pseudo-random binary series, the bits "one" of this series corresponding to one of the two modulation frequencies, the bits "zero" of this series corresponding to the other.

Selon une particularité de l'invention lesdites séries binaires pseudo-aléatoires sont différentes dans les cantons successifs et un émetteur desdits signaux modulés comporte un générateur de code cyclique constitué de modules OU EXCLUSIF branchés à au moins une sortie des étages d'un registre à décalage incrémenté par une horloge de telle sorte que le choix desdits étages est prédéterminé selon l'émetteur afin de réaliser chacune desdites séries binaires pseudo-aléatoires.According to a feature of the invention, said pseudo-random binary series are different in successive cantons and an emitter of said modulated signals comprises a cyclic code generator made up of EXCLUSIVE OR modules connected to at least one output of the stages of a shift register incremented by a clock so that the choice of said stages is predetermined according to the transmitter in order to produce each of said pseudo-random binary series.

Selon une autre particularité de l'invention ledit émetteur des signaux modulés comporte à la sortie du dernier étage dudit registre à décalage, un générateur d'impulsions à polarité variable suivi d'un amplificateur de puissance délivrant lesdites impulsions amplifiées dans le circuit de voie, ledit générateur d'impulsion délivrant une impulsion positive lorsque le bit à la sortie du registre à décalage est "un" et une impulsion négative lorsque le bit à la sortie du registre à décalage est "zéro".According to another particular feature of the invention, said transmitter of the modulated signals comprises, at the output of the last stage of said shift register, a pulse generator of variable polarity followed by a power amplifier delivering said amplified pulses in the track circuit, said pulse generator delivering a positive pulse when the bit at the output of the shift register is "one" and a negative pulse when the bit at the output of the shift register is "zero".

Selon une autre particularité de l'invention, ledit émetteur de signaux·modulés comporte à la sortie du dernier étage dudit registre à décalage un modulateur des signaux de fréquence porteuse suivi d'un amplificateur de puissance délivrant lesdits signaux de fréquence porteuse dans 1 circuit de voie, ledit modulateur délivrant des signaux de fréquence porteuse modulés à une première fréquence de modulation lorsque le bit à la sortie du registre à décalage est "un" et à une deuxième fréquence de modulation lorsque le bit à la sortie du registre à décalage est "zéro".According to another particular feature of the invention, said transmitter of modulated signals comprises, at the output of the last stage of said shift register, a modulator of the carrier frequency signals followed by a power amplifier delivering said carrier frequency signals in 1 circuit of channel, said modulator delivering carrier frequency signals modulated at a first modulation frequency when the bit at the output of the shift register is "one" and at a second modulation frequency when the bit at the output of the shift register is " zero".

Selon une autre particularité de l'invention; un récepteur desdits signaux modulés ayant parcouru la voie comporte un générateur de code cyclique constitué d'un registre identique à celui dudit émetteur correspondant dont les modules OU EXCLUSIF sont branchés sur les mêmes étages du registre selon la même disposition et dont la sortie est comparée dans un comparateur avec la série binaire pseudo-aléatoire provenant desdits signaux modulés.According to another feature of the invention; a receiver of said modulated signals having traversed the channel comprises a cyclic code generator constituted by a register identical to that of said corresponding transmitter whose EXCLUSIVE modules are connected to the same stages of the register according to the same arrangement and whose output is compared in a comparator with the pseudo-random binary series originating from said modulated signals.

Selon une autre particularité de l'invention, après ledit comparateur est disposé un temporisateur à l'attraction actionnant un relais de sortie dudit récepteur, ledit temporisateur ayant un retard de temporisation tel qu'il permet d'obtenir la probabilité désirée d'erreur d'identification de ladite série binaire pseudo-aléatoire affectée au circuit de voie considéré.According to another feature of the invention, after said comparator is arranged an attraction timer actuating an output relay of said receiver, said timer having a delay delay such that it makes it possible to obtain the desired probability of error d 'identification of said pseudo-random binary series assigned to the considered track circuit.

En se référant aux figures schématiques 1 et 2 ci-jointes on va décrire ci-après un exemple de mise en oeuvre de la présente invention, exemple donné à titre purement illustratif et nullement limitatif.With reference to the attached diagrammatic figures 1 and 2, an example of implementation of the present invention will be described below, an example given purely by way of illustration and in no way limiting.

La figure 1 représente un schéma de principe électrique d'un émetteur du circuit de voie modulé par un générateur de série binaire pseudo-aléatoire.Figure 1 shows an electrical block diagram of a channel circuit transmitter modulated by a pseudo-random binary series generator.

la figure 2 représente un schéma de principe d'un récepteur de circuit de voie modulé par des signaux codés par la série binaire pseudo-aléatoire ayant traversé la voie.FIG. 2 represents a block diagram of a channel circuit receiver modulated by signals coded by the pseudo-random binary series having crossed the channel.

On voit sur la figure 1 un émetteur de circuit de voie constitué d'un registre à décalage 10 comprenant n = 6 cellules à titre d'exemple. les étages 1, 2, 3....6 du registre 10 sont incrémentés par une horloge 11 dont la période commande l'avance du registre. Le bit introduit à l'entrée 12 du registre 10 pour chaque période de celle-ci est obtenu par addition modulo 2 au moyen de trois OU EXCLUSIF 13, 14, 15 dans cet exemple branchés sur les étages 1, 3, 5 et 6 du registre 10. Il est à noter que dans un autre émetteur les OU EXCLUSIFS 13, 14, 15 seraient branchés sur d'autres étages du registre 10 à l'exception de l'étage 6 toujours utilisé.FIG. 1 shows a channel circuit transmitter consisting of a shift register 10 comprising n = 6 cells by way of example. stages 1, 2, 3 .... 6 of the register 10 are incremented by a clock 11 whose period controls the advance of the register. The bit entered at entry 12 of register 10 for each period thereof is obtained by adding modulo 2 by means of three EXCLUSIVE OR 13, 14, 15 in this example connected to stages 1, 3, 5 and 6 of the register 10. It should be noted that in another transmitter the EXCLUSIVE OUs 13, 14, 15 would be connected to other stages of register 10 with the exception of stage 6 which is still used.

Le bit présent à la sortie 16 du registre 10 à chaque période de l'horloge 11 constitue la suite de la série binaire pseudo-aléatoire en cours de génération. Un tel dispositif engendre pour une longueur n du registre à décalage 10 et certaines combinaisons des modules OU EXCLUSIF une série binaire périodique linéaire de longueur 2 n-1 bits. La théorie des polynômes montre en effet que si l'on considère les nombres binaires de n bits contenus à chaque instant dans le registre à décalage 10 tous les nombres possibles à l'exception de 0...0 apparaissent successivement une fois et une seule à chaque période de la série dans une ordre qui est fonction du nombre et de l'emplacement des modulos. De ce fait si l'on connaît la longueur n du registre à décalage 10 le nombre et l'emplacement des modules et le nombre qu'il contient a un instant donné, il est possible de prévoir ses contenus successifs futurs et donc la série émise.The bit present at the output 16 of the register 10 at each period of the clock 11 constitutes the continuation of the binary pseudo-random series being generated. Such a device generates for a length n of the shift register 10 and certain combinations of the EXCLUSIVE OR modules a linear periodic binary series of length 2 n-1 bits. The theory of polynomials indeed shows that if we consider the binary numbers of n bits contained at each instant in the shift register 10 all the possible numbers except 0 ... 0 appear successively once and only once to each period of the series in an order which depends on the number and location of the modules. So if we knows the length n of the shift register 10 the number and location of the modules and the number it contains at a given time, it is possible to predict its future successive contents and therefore the series sent.

La sortie 16 du registre 10 communique avec un modulateur ou un générateur d'impulsions 17 délivrant un signal à un amplificateur de puissance 18 afin de l'amplifier. Dans le cas d'un modulateur 17 le signal est constitué d'une fréquence porteuse de valeur 1000 Hz par exemple, modulée en amplitude ou en fréquence par une fréquence modulante F1 de valeur 12 Hz par exemple quand un bit "un" est présent à la sortie 16 du registre 10 et par une fréquence modulante F2 de valeur 17 Hz par exemple quand un bit "zéro" est présent à la sortie 16 du registre 10.The output 16 of the register 10 communicates with a modulator or a pulse generator 17 delivering a signal to a power amplifier 18 in order to amplify it. In the case of a modulator 17 the signal consists of a carrier frequency of value 1000 Hz for example, modulated in amplitude or in frequency by a modulating frequency F1 of value 12 Hz for example when a bit "one" is present at output 16 of register 10 and by a modulating frequency F2 of value 17 Hz for example when a "zero" bit is present at output 16 of register 10.

Dans le cas d'un générateur d'impulsions 17, le signal est constitué d'impulsions par exemple rectangulaires, à polarité positive, par exemple quand un bit "un" est présent à la sortie 16 du registre 10 et à polarité négative, par exemple, quand un bit "zéro" est présent à la sortie 16 du registre 10.In the case of a pulse generator 17, the signal consists of pulses, for example rectangular, with positive polarity, for example when a bit "one" is present at output 16 of register 10 and with negative polarity, for example, when a "zero" bit is present at output 16 of register 10.

Le signal modulé, amplifié par l'amplificateur 18 au niveau de puissance requis pour le fonctionnement du circuit de voie, est injecté dans la voie, à une extrémité de la portion de voie dans laquelle on désire s'assurer de l'absence de train, par la sortie 19 de l'amplificateur 18.The modulated signal, amplified by the amplifier 18 at the power level required for the operation of the track circuit, is injected into the track, at one end of the portion of track in which it is desired to ensure the absence of the train , by the output 19 of the amplifier 18.

La figure 2 montre le récepteur de circuit de voie correspondant à l'émetteur qui vient d'être décrit.FIG. 2 shows the channel circuit receiver corresponding to the transmitter which has just been described.

Le récepteur est relié à la voie par son entrée 20 à l'extrémité opposée à l'émetteur de la portion de voie dans laquelle on désire s'assurer de l'absence de train. le signal présent à l'entrée 20 du récepteur est d'abord filtré dans un filtre 21. Dans le cas de la modulation par impulsions le filtre 21 est adapté à la largeur des impulsions et à leur fréquence de récurrence. Dans le cas de la modulation de la porteuse le filtre 21 est un filtre passe-bande centré sur la fréquence porteuse.The receiver is connected to the track by its input 20 at the end opposite the transmitter of the track portion in which it is desired to ensure the absence of the train. the signal present at the input 20 of the receiver is first filtered in a filter 21. In the case of pulse modulation the filter 21 is adapted to the width of the pulses and to their frequency of recurrence. In the case of carrier modulation, the filter 21 is a bandpass filter centered on the carrier frequency.

Le signal est ensuite démodulé dans le démodulateur 22. Celui-ci est constitué d'éléments actifs tels que des diodes par exemple.The signal is then demodulated in the demodulator 22. The latter consists of active elements such as diodes for example.

A la sortie 23 du démodulateur 22 apparait la série binaire engendrée par l'émetteur à la sortie 16 du registre 10. Cette série binaire est appliquée à un registre 100 de même longueur que le registre 10 de l'émetteur. L'avance du registre est commandée par une horloge 110 synchronisée par les signaux présents à la sortie 23 du démodulateur 22. Le registre 100 comporte le même nombre de modules OU EXCLUSIF 130, 140 et 150 reliés aux mêmes étages 1, 3, 5 et 6 du registre 100 que les modulos 13, 14 et 15 du registre 10 de l'émetteur.At the output 23 of the demodulator 22 appears the binary series generated by the transmitter at the output 16 of the register 10. This binary series is applied to a register 100 of the same length as the register 10 of the transmitter. The advance of the register is controlled by a clock 110 synchronized by the signals present at the output 23 of the demodulator 22. The register 100 comprises the same number of EXCLUSIVE OR modules 130, 140 and 150 connected to the same stages 1, 3, 5 and 6 of register 100 as modules 13, 14 and 15 of register 10 of the transmitter.

La théorie des polynômes montre qu'après une période de synchronisation de durée au plus égale à n bits (n étant la longueur des registres), le bit existant à la sortie 24 des modulos 130, 140 et 150 est le même que celui qui sera reçu à la sortie 23 du démodulateur 22 à la période suivante de l'horloge 11 de l'émetteur. Cette égalité est contrôlée par le comparateur 25. Lorsque les bits présents aux entrées 23 et 24 de ce comparateur sont 1 et 1 ou 0 et 0 sa sortie 26 délivre l'état 1 ce qui signifie que la comparaison est correcte. Lorsque les bits présents aux entrées 23 et 24 du comparateur 25 sont 1 et 0 ou 0 et 1 la sortie 26 du comparateur est à l'état logique 0 ce qui signifie que la comparaison est incorrecte.The polynomial theory shows that after a synchronization period of duration at most equal to n bits (n being the length of the registers), the bit existing at output 24 of modulos 130, 140 and 150 is the same as that which will be received at the output 23 of the demodulator 22 at the following period of the clock 11 of the transmitter. This equality is controlled by the comparator 25. When the bits present at the inputs 23 and 24 of this comparator are 1 and 1 or 0 and 0 its output 26 delivers the state 1 which means that the comparison is correct. When the bits present at inputs 23 and 24 of comparator 25 are 1 and 0 or 0 and 1, output 26 of comparator is in logic state 0, which means that the comparison is incorrect.

La sortie 26 du comparateur 25 est appliquée à un temporisateur à l'attraction 27 qui commande le relais 28 de sortie du récepteur du circuit de voie dont des contacts 29 commandent l'allumage des lampes du signal d'entrée dans le circuit de voie. Le retard de temporisation du temporisateur 27 est fixé de telle sorte que le relais 28 ne soit excité qu'après un certain nombre m de comparaisons exactes successives. Il est choisi de manière à obtenir la probabilité désirée d'erreur d'identification de la série binaire pseudo-aléatoire prévue pour le circuit de voie considéré. Un exemple de réalisation prévoit ainsi par exemple un nombre de m = 32 comparaisons exactes successives pour un registre à n = 6 étages.The output 26 of the comparator 25 is applied to an attraction timer 27 which controls the relay 28 for outputting the receiver of the track circuit, the contacts 29 of which control the lighting of the lamps of the input signal in the track circuit. The delay time delay of the timer 27 is fixed so that the relay 28 is only energized after a certain number m of successive exact comparisons. It is chosen so as to obtain the desired probability of error in identifying the pseudo-random binary series provided for the channel circuit considered. An exemplary embodiment thus provides for example a number of m = 32 successive exact comparisons for a register with n = 6 stages.

Les applications de la présente invention sont du domaine des transports ferroviaires et notamment du contrôle et de la sécurité ferroviaires.The applications of the present invention are in the field of rail transport and in particular rail control and safety.

Claims (9)

1/ Système de modulation pour circuits de voie ferroviaires comportant des signaux modulés par un modulateur par impulsions de polarité positive ou négative, caractérisé en ce que les signaux sont déterminés par au moins une série binaire pseudo-aléatoire, les bits "un" de cette série correspondant à l'une des polarités, les bits "zéro" de cette série correspondant à l'autre.1 / Modulation system for railway track circuits comprising signals modulated by a pulse modulator of positive or negative polarity, characterized in that the signals are determined by at least one pseudo-random binary series, the bits "one" of this series corresponding to one of the polarities, the "zero" bits of this series corresponding to the other. 2/ Système de modulation pour circuits de voie ferroviaires comportant des signaux dont la fréquence porteuse est modulée par une première ou une deuxième fréquence de modulation, caractérisé en ce que les signaux sont déterminés par au moins une série binaire pseudo-aléatoire, les bits "un" de cette série correspondant à l'une des fréquences de modulation, les bits "zéro" de cette série correspondant à l'autre.2 / Modulation system for railway track circuits comprising signals whose carrier frequency is modulated by a first or a second modulation frequency, characterized in that the signals are determined by at least one pseudo-random binary series, the bits " a "of this series corresponding to one of the modulation frequencies, the" zero "bits of this series corresponding to the other. 3/ Système de modulation selon l'une des revendications 1 ou 2, caractérisé par le fait que lesdites séries binaires pseudo-aléatoires sont différentes dans les cantons successifs et qu'un -émetteur desdits signaux modulés comporte un générateur de code cyclique constitué de modules OU EXCLUSIF (13, 14, 5) branchés à au moins une sortie des étages d'un registre (10) à décalage incrémenté par une horloge (11) de telle sorte que le choix desdits étages (1, 2, 3, 4, 5, 6) est prédéterminé selon l'émetteur afin de réaliser chacune desdites séries binaires pseudo-aléatoires.3 / Modulation system according to one of claims 1 or 2, characterized in that said pseudo-random binary series are different in the successive cantons and that a transmitter of said modulated signals comprises a cyclic code generator made up of modules OR EXCLUSIVE (13, 14, 5) connected to at least one output of the stages of a shift register (10) incremented by a clock (11) so that the choice of said stages (1, 2, 3, 4, 5, 6) is predetermined according to the transmitter in order to produce each of said pseudo-random binary series. 4/ Système de modulation selon les revendications 1 et 3, caractérisé par le fait que ledit émetteur des signaux modulés comporte à la sortie du dernier étage dudit registre (10) à décalage, un générateur d'impulsions (17) à polarité variable suivi d'un amplificateur (18) de puissance délivrant lesdites impulsions amplifiées dans le circuit de voie, ledit générateur d'impulsions (17) délivrant une impulsion positive lorsque le bit à la sortie du registre à décalage est "un" et une impulsion négative lorsque le bit à la sortie du registre (10) à décalage est "zéro".4 / modulation system according to claims 1 and 3, characterized in that said transmitter of the modulated signals comprises at the output of the last stage of said shift register (10), a pulse generator (17) with variable polarity followed by a power amplifier (18) delivering said amplified pulses in the track circuit, said pulse generator (17) delivering a positive pulse when the bit at the output of the shift register is "one" and a negative pulse when the bit at the output of the shift register (10) is "zero". 5/ Système de modulation selon les revendications 2 et 3, caractérisé par le fait que ledit émetteur des signaux modulés comporte à la sortie du dernier étage (6) dudit registre à décalage un modulateur (17) des signaux de fréquence porteuse suivi d'un amplificateur de puissance (18) délivrant lesdits signaux de fréquence porteuse dans le circuit de voie, ledit modulateur (17) délivrant des signaux de fréquence porteuse modulés à une première fréquence de modulation lorsque le bit à la sortie du registre à décalage est "un" et à une deuxième fréquence de modulation lorsque le bit à la sortie du registre à décalage est "zéro".5 / modulation system according to claims 2 and 3, characterized in that said transmitter of the modulated signals comprises at the output of the last stage (6) of said shift register a modulator (17) of carrier frequency signals followed by a power amplifier (18) delivering said carrier frequency signals in the track circuit, said modulator (17) delivering carrier frequency signals modulated at a first modulation frequency when the bit at the output of the shift register is "one" and at a second modulation frequency when the bit at the output of the shift register is "zero". 6/ Système de modulation selon la revendication 5, caractérisé par le fait que ledit modulateur (17) des signaux de la fréquence porteuse utilise une modulation en amplitude afin d'engendrer lesdites première et deuxième fréquences de modulation.6 / modulation system according to claim 5, characterized in that said modulator (17) of the carrier frequency signals uses amplitude modulation to generate said first and second modulation frequencies. 7/ Système de modulation selon la revendication 5, caractérisé par le fait que ledit modulateur (17) des signaux de la fréquence porteuse utilise une modulation en fréquence afin d'engendrer lesdites première et deuxième fréquences de modulation.7 / modulation system according to claim 5, characterized in that said modulator (17) of the carrier frequency signals uses frequency modulation in order to generate said first and second modulation frequencies. 8/ Systèmes de modulation selon l'une des revendications 1 et 2, caractérisés par le fait qu'un récepteur desdits signaux modulés ayant parcouru la voie comporte un générateur de code cyclique constitué d'un registre (100) identique à celui dudit émetteur correspondant dont les modules OU EXCLUSIF (130, 140, 150) sont branchés sur les mêmes étages du registre selon la même disposition et dont la sortie est comparée dans un comparateur (25) avec la série binaire pseudo-aléatoire provenant desdits signaux modulés.8 / Modulation systems according to one of claims 1 and 2, characterized in that a receiver of said modulated signals having traveled the channel comprises a cyclic code generator consisting of a register (100) identical to that of said corresponding transmitter whose EXCLUSIVE OR modules (130, 140, 150) are connected to the same stages of the register according to the same arrangement and whose output is compared in a comparator (25) with the pseudo-random binary series originating from said modulated signals. 9/ Système de modulation selon la revendication 8, caractérisé par le fait qu'après ledit comparateur (25) est disposé un temporisateur (27) à l'attraction actionnant un relais (28) de sortie dudit récepteur, ledit temporisateur (27) ayant un retard de temporisation tel qu'il permet d'obtenir la probabilité désirée d'erreur d'identification de ladite série binaire pseudo-aléatoire affectée au circuit de voie considéré.9 / modulation system according to claim 8, characterized in that after said comparator (25) is arranged a timer (27) to the attraction actuating a relay (28) output of said receiver, said timer (27) having a time delay such that it makes it possible to obtain the desired probability of identification error of said pseudo-random binary series assigned to the channel circuit considered.
EP84100273A 1983-01-13 1984-01-12 Modulation system for railway circuits Expired EP0116293B1 (en)

Applications Claiming Priority (2)

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FR8300429 1983-01-13
FR8300429A FR2539372A1 (en) 1983-01-13 1983-01-13 MODULATION SYSTEMS FOR RAILWAY CIRCUITS

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EP0116293B1 EP0116293B1 (en) 1988-07-20

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FR2539372B1 (en) 1985-03-15
ES8504582A1 (en) 1985-04-16
EP0116293B1 (en) 1988-07-20
ES528870A0 (en) 1985-04-16
FR2539372A1 (en) 1984-07-20
DE3472779D1 (en) 1988-08-25
US4582279A (en) 1986-04-15

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