EP0101702A1 - Method and wiring system for driving a picture display, particularly an ac electroluminescent display. - Google Patents

Method and wiring system for driving a picture display, particularly an ac electroluminescent display.

Info

Publication number
EP0101702A1
EP0101702A1 EP19830900715 EP83900715A EP0101702A1 EP 0101702 A1 EP0101702 A1 EP 0101702A1 EP 19830900715 EP19830900715 EP 19830900715 EP 83900715 A EP83900715 A EP 83900715A EP 0101702 A1 EP0101702 A1 EP 0101702A1
Authority
EP
European Patent Office
Prior art keywords
voltage
line selection
column
voltages
modulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19830900715
Other languages
German (de)
French (fr)
Other versions
EP0101702B1 (en
Inventor
Terho Teuvo Harju
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lohja Oy AB
Original Assignee
Lohja Oy AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lohja Oy AB filed Critical Lohja Oy AB
Publication of EP0101702A1 publication Critical patent/EP0101702A1/en
Application granted granted Critical
Publication of EP0101702B1 publication Critical patent/EP0101702B1/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0275Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current

Definitions

  • the present invention concerns a method in accordance with the preamble of claim 1.
  • the invention also concerns a wiring system to be used for the implementation of this method.
  • An AC electroluminescent display based on the thin film technique comprises a bi-dimensional matrix, in respect of the drive circuits, consisting of X and Y electrodes, in which matrix the X electrodes form lines and the Y electrodes, on the other hand, form columns.
  • the necessary modulation voltage is lower than half the entire drive voltage, - after the refresh pulse, the luminance is lowered at a time constant typically of approximately 1 ms, and
  • the capacitance of the display is high, typically about 50 to 200 pF/mm 2 .
  • each line in its turn receives a high amplitude line selection pulse while the other lines are floating.
  • a modulation voltage corresponding to the desired luminance is applied to the columns.
  • a refresh pulse of reversed polarity is applied simultaneously to all lines.
  • the method described in the reference publication (2) corresponds to the former method regarding its withstand voltage requirements.
  • the methods differ from each other in the respect that, in the former method, high-voltage pulses are applied to the ground point of the line drive circuits, and the ground point of the column drive circuits is connected to the ground point of the entire drive system.
  • the ground point of the line drive circuits is connected to the system ground, and the high-voltage pulses are applied to the ground point of the column drive circuits.
  • the object of the present invention is to eliminate the drawbacks occurring in the systems of prior art.
  • a further object of the invention to provide a refresh method for driving particularly an AC electroluminescent display based on the thin film technique, which refresh method lowers the requirements of withstandvoitage to be imposed on the drive circuits of the display, reduces the power consumption of the display, and permits a drive voltage completely free from a DC voltage component.
  • a further object is to provide a wiring system for the implementation of the method.
  • the invention is based, e.g., on the following ideas:
  • the capacitances of the whole display are charged at a maximum basic voltage, however, so that the line selection pulses or column modulation pulses alone are not sufficient to ignite any display element.
  • the line selection and column modulation voltages are superimposed on the basic voltage so that no change occurs in the voltage of the non-selected display elements.
  • the absolute value of the semi-selected display elements is increased at the maximum by the line selection or column modulation voltage, and the absolute value of the voltage of the selected display ele ments is increased by the sum of the line selection voltage and column modulation voltage.
  • the polarity of the basic voltage is preferably not reversed until after all the lines have, in their turn, received the line selection pulse.
  • the apparatus includes two sources of DC voltage, one of them being the drive voltage source of the line drive circuits and the other one the drive voltage source of the column drive circuits. Moreover, the apparatus includes an AC voltage source, which is connected in series with one of the DC voltage sources. More specifically, the method in accordance with the invention is characterized by what is stated in the characterizing part of claim 1.
  • the withstand voltage required both from the line drive circuits and from the column drive circuits is only equal to the maximum values of the modulation voltages, about 30 V.
  • the prior art refresh methods have required a withstand voltage of about 60 V from the column drive circuits and a withstand voltage of about 200 V from the line drive circuits.
  • a lower withstand voltage requirement facilitates the integration and results in less expensive and more reliable circuits.
  • Both of the drive circuits may be of the same type, which reduces the number of circuit types to be integrated.
  • the drive voltage of the display does notcontain a DC voltage component, which increases the service life of the display.
  • the power consumption of the display is low, because the amplitude of the line selection pulses and of the column modulation pulses is low and because the frequency of the basic voltage may be low, even lower than 25 Hz.
  • Figure 1 shows one wiring system in accordance with the invention as applied to a 2 x 2 matrix display.
  • Figure 2 is a graphical presentation as a function of time of the various drive pulses related to the wiring system shown in Fig. 1.
  • the display matrix comprises the lines X1 and X2 as well as the columns Y1 and Y2.
  • the dis play elements C11 , C12, C21 and C22 are located.
  • the voltages measured at the elements from the X electrodes to the Y electrodes are denoted with U C11 , U C12 , U C21 and U C22 , respectively.
  • the ground point SE of the column drive circuits SA is preferably connected to the ground point JE of the entire drive system.
  • the ground point RE of the line drive circuits RA is connected to the AC voltage U B generated by the AC voltage source B.
  • the selected line X2 receives the voltage U B + U RM
  • the non-selected line X1 receives the voltage U B
  • the selected column Y2 is connected to the ground point SE and the non-selected column Y1 to the voltage U SM .
  • the positive amplitude of the basic voltage (U BIAS ) is formed by subtracting the maximum value U SM of the column modulation voltages from the positive peak value ⁇ B of the AC voltage.
  • U B is negative, the selected line X2 is connected to the voltage - ⁇ B and the nonselected line to the voltage - ⁇ B + U RM .
  • C12, C21 and C22 are AC voltages, the peak values being ⁇ B in the cases of semi-selected display elements C11,
  • the line selection voltage U RM and the maximum value U SM of the column modulation voltages are equally high in the example of Figures 1 and 2. They may also be different. Symmetry of the drive voltage can then be maintained by selecting the positive and the negative amplitude of the AC voltage U B to differ as to their magnitudes by the difference between the line selection voltage U RM and the maximum value
  • the non-selected lines are always connected either to the positive pole or to the negative pole of the line selection voltage source RM depending on the phase of the AC voltage U B . If the line selection voltage U RM is selected at least twice as high as the maximum value U SM of the column modulation voltages, the non-selected lines may be allowed to float while the selected line receives the selection pulse. This reduces the power consumption.

Abstract

Procédé et système de câblage, pour la commande d'un affichage électroluminescent à courant alternatif (C11, C12, C21, C22) basé sur la technique à film mince et comprenant une matrice bidimensionnelle (X1, X2; Y1, Y2) se composant d'électrodes X et Y, où des impulsions de sélection de lignes sont appliquées alternativement aux électrodes X (X1, X2) et des impulsions de modulation de colonne correspondant à la luminence désirée sont appliquées aux électrodes Y (Y1, Y2). Selon l'invention, au moins quelques-uns des éléments d'affichage (C11, C12, C21, C22) sont chargés à une tension maximum de base de polarité variable, cette tension de base ayant été sélectionnée de sorte que les impulsions de sélection de ligne ou les impulsions de modulation de colonne prises séparément ne suffisent pas à provoquer l'allumage d'un élément d'affichage (C11, C12, C21, C22). Les tensions de sélection de ligne et de modulation de colonne sont superposées à la tension de base, ces tensions ayant été sélectionnées de sorte qu'uniquement la somme de la tension de base, de la tension de sélection de ligne (URM) et de la tension de modulation de colonne (USM) puisse amener chaque élément sélectionné (C11, C12, C21, C22) à l'état d'affichage. Dans la solution adoptée par la présente invention, la tension de résistance requise aussi bien par les circuits d'attaque de ligne que par les circuits d'attaque de colonne est uniquement égale à la valeur maximum des tensions de modulation, environ 30V.Wiring method and system for controlling an alternating current electroluminescent display (C11, C12, C21, C22) based on the thin film technique and comprising a two-dimensional matrix (X1, X2; Y1, Y2) consisting of 'X and Y electrodes, where line selection pulses are applied alternately to the X electrodes (X1, X2) and column modulation pulses corresponding to the desired luminance are applied to the Y electrodes (Y1, Y2). According to the invention, at least some of the display elements (C11, C12, C21, C22) are charged at a maximum base voltage of variable polarity, this base voltage having been selected so that the selection pulses line or the column modulation pulses taken separately are not sufficient to cause the lighting of a display element (C11, C12, C21, C22). The line selection and column modulation voltages are superimposed on the base voltage, these voltages having been selected so that only the sum of the base voltage, the line selection voltage (URM) and the column modulation voltage (USM) can bring each selected item (C11, C12, C21, C22) to the display state. In the solution adopted by the present invention, the resistance voltage required by both the line drive circuits and by the column drive circuits is only equal to the maximum value of the modulation voltages, approximately 30V.

Description

Method and Wiring System for Driving a Picture Display, Particularly an AC Electroluminescent Display
The present invention concerns a method in accordance with the preamble of claim 1. The invention also concerns a wiring system to be used for the implementation of this method.
An AC electroluminescent display based on the thin film technique comprises a bi-dimensional matrix, in respect of the drive circuits, consisting of X and Y electrodes, in which matrix the X electrodes form lines and the Y electrodes, on the other hand, form columns.
It is additionally characteristic of such a display that - the drive voltage is an AC voltage,
- a DC voltage component in the drive voltage reduces the service life of the display,
- the necessary modulation voltage is lower than half the entire drive voltage, - after the refresh pulse, the luminance is lowered at a time constant typically of approximately 1 ms, and
- the capacitance of the display is high, typically about 50 to 200 pF/mm2. In order to illustrate the prior art, reference is made to the following publications:
(1) Gielow T.A., Holly R.H.: "Tactical Video Display", Report number DELET -TR-79-0251-1, Sept. 1980, 17 p. (2) Kurahashi K., Takahara K., Andoh Sh.:
"A Refresh Addressing Technique of AC-TFEL Panels", Proceedings of the First European Display Research Conference EURODISPLAY '81, September 16-18, 1981, Munich, p. 216-219, and (3) FI Patent Application 811,245 (Oy Lohja Ab).
In the method in accordance with the reference publication (1), each line in its turn receives a high amplitude line selection pulse while the other lines are floating. At the same time, a modulation voltage corresponding to the desired luminance is applied to the columns. After the line selection pulses, a refresh pulse of reversed polarity is applied simultaneously to all lines. In this solution, it has been possible to reduce the withstand voltage required from the column drive circuits to the level of unipolar modulation voltage. The method described in the reference publication (2) corresponds to the former method regarding its withstand voltage requirements. The methods differ from each other in the respect that, in the former method, high-voltage pulses are applied to the ground point of the line drive circuits, and the ground point of the column drive circuits is connected to the ground point of the entire drive system. In the method in accordance with the reference publication (2), the ground point of the line drive circuits is connected to the system ground, and the high-voltage pulses are applied to the ground point of the column drive circuits.
In the reference publication (3), a method is described by means of which the withstand voltage requirement of the column drive circuits can be lowered by applying bipolar pulses to the lines and by applying the modulation both to the positive and to the negative drive pulses of the display.
In all of the refresh methods mentioned above,drive circuits operating at high voltages are re quired for guiding the line electrodes. As is known in prior art, circuits of high withstand voltages are difficult to integrate and, therefore, expensive. In the methods in accordance with the reference publications (1) and (2), further drawbacks are the occurrence of a DC voltage component in the drive voltage of the display as well as the requirement of high withstand voltage of the column drive circuits, because of the unipolar modulation. The requirement of two different drive circuits is also a considerable drawback.
The object of the present invention is to eliminate the drawbacks occurring in the systems of prior art. A further object of the invention to provide a refresh method for driving particularly an AC electroluminescent display based on the thin film technique, which refresh method lowers the requirements of withstandvoitage to be imposed on the drive circuits of the display, reduces the power consumption of the display, and permits a drive voltage completely free from a DC voltage component. A further object is to provide a wiring system for the implementation of the method.
The invention is based, e.g., on the following ideas:
- Preferably, the capacitances of the whole display are charged at a maximum basic voltage, however, so that the line selection pulses or column modulation pulses alone are not sufficient to ignite any display element.
- The line selection and column modulation voltages are superimposed on the basic voltage so that no change occurs in the voltage of the non-selected display elements. The absolute value of the semi-selected display elements is increased at the maximum by the line selection or column modulation voltage, and the absolute value of the voltage of the selected display ele ments is increased by the sum of the line selection voltage and column modulation voltage.
- The polarity of the basic voltage is preferably not reversed until after all the lines have, in their turn, received the line selection pulse.
- The apparatus includes two sources of DC voltage, one of them being the drive voltage source of the line drive circuits and the other one the drive voltage source of the column drive circuits. Moreover, the apparatus includes an AC voltage source, which is connected in series with one of the DC voltage sources. More specifically, the method in accordance with the invention is characterized by what is stated in the characterizing part of claim 1.
On the other hand, the wiring system in accordance with the invention is characterized by what is stated in the characterizing part of claim 7.
By means of the invention, remarkable advantages are achieved. Thus, the withstand voltage required both from the line drive circuits and from the column drive circuits is only equal to the maximum values of the modulation voltages, about 30 V. The prior art refresh methods have required a withstand voltage of about 60 V from the column drive circuits and a withstand voltage of about 200 V from the line drive circuits. A lower withstand voltage requirement facilitates the integration and results in less expensive and more reliable circuits. Both of the drive circuits may be of the same type, which reduces the number of circuit types to be integrated.
The drive voltage of the display does notcontain a DC voltage component, which increases the service life of the display.
The power consumption of the display is low, because the amplitude of the line selection pulses and of the column modulation pulses is low and because the frequency of the basic voltage may be low, even lower than 25 Hz.
In the wiring system, only one high-voltage AC voltage source is required, whereas, in the prior art solutions, up to four pulse sources have been commonly required. This reduces the cost of the apparatus and improves, its reliability.
The invention will be examined below in more detail with the aid of the exemplifying embodiment in accordance with the attached drawings.
Figure 1 shows one wiring system in accordance with the invention as applied to a 2 x 2 matrix display.
Figure 2 is a graphical presentation as a function of time of the various drive pulses related to the wiring system shown in Fig. 1.
In Fig. 1, the display matrix comprises the lines X1 and X2 as well as the columns Y1 and Y2. At the crossing points of the lines and columns, the dis play elements C11 , C12, C21 and C22 are located. The voltages measured at the elements from the X electrodes to the Y electrodes are denoted with UC11 , UC12, UC21 and UC22 , respectively. The ground point SE of the column drive circuits SA is preferably connected to the ground point JE of the entire drive system. The ground point RE of the line drive circuits RA is connected to the AC voltage UB generated by the AC voltage source B.
In Fig. 2 it is assumed that the display element C22 is in the display state corresponding to the maximum luminance and that the voltage URM across the line drive circuits RA, which voltage URM is in series with the AC voltage UB, is equal to the voltage USM across the column drive circuits SA.Thus, thereat, URM = USM = UM. The formation of the drive voltages of the display elements C11 , C12, C21 and C22 is examined ata moment at which the line X2 is in the selected state.
When UB is positive, the selected line X2 receives the voltage UB + URM , whereas the non-selected line X1 receives the voltage UB. At the same time, the selected column Y2 is connected to the ground point SE and the non-selected column Y1 to the voltage USM. Thus, the positive amplitude of the basic voltage (UBIAS) is formed by subtracting the maximum value USM of the column modulation voltages from the positive peak value ÛB of the AC voltage. When UB is negative, the selected line X2 is connected to the voltage -ÛB and the nonselected line to the voltage -ÛB + URM. The selected column Y2 is now connected to the voltage USM and the non-selected column Y1 to the ground, so that the absolute value of the negative amplitude of the basic voltage (UBIAS ) is equal to the peak value ÛB of the AC voltage reduced by the line selection voltage URM. From Fig. 2 it is seen that, when the line selection voltage URM and the maximum value USM of the column modulation voltages are chosen equally high (USM = URM = UM), the voltages of all of the display elements C11,
C12, C21 and C22 are AC voltages, the peak values being Û B in the cases of semi-selected display elements C11,
C12, C21 and Û B + UM in the case of selected display element C22. From Fig. 2 it is also seen that, when the line X2 receives a selection pulse, the display element C11 is non-selected and, consequently, receives only the basic voltage (UBIAS), whose amplitude has an absolute value of Û B - UM.
Within the scope of the invention, it is also possible to conceive solutions differing from the exemplifying embodiment described above. Thus, differing from the example of Figures 1 and 2, it is possible to reverse the polarity of the basic voltage more frequentlythan after each field. The frequency can be increased even to several cycles per line.
The line selection voltage URM and the maximum value USM of the column modulation voltages are equally high in the example of Figures 1 and 2. They may also be different. Symmetry of the drive voltage can then be maintained by selecting the positive and the negative amplitude of the AC voltage UB to differ as to their magnitudes by the difference between the line selection voltage URM and the maximum value
USM of the column modulation voltages.
In the example of the Figures 1 and 2, the non-selected lines are always connected either to the positive pole or to the negative pole of the line selection voltage source RM depending on the phase of the AC voltage UB. If the line selection voltage URM is selected at least twice as high as the maximum value USM of the column modulation voltages, the non-selected lines may be allowed to float while the selected line receives the selection pulse. This reduces the power consumption.
Differing from the example of Fig. 1, it is possible to use a bridge coupling so that to the ground points RE, SE of both the line drive circuits RA and the column drive circuits SA, pulses unipolar in relation to the system ground are supplied at opposite phases in relation to each other.
In the example of Figures 1 and 2, a case has been discussed in which the luminance of the display elements has only two levels. It is evident that the method in accordance with the invention can also be employed in connection with picture displays. Besides the burst-length and pulse-width modulations, it is also possible to use amplitude modulation for adjustment of the luminance, for example, in the way suggested in the reference publication (3), by selecting the column modulation voltage corresponding to the desired luminahce between zero and the maximum value USM.

Claims

WHAT IS CLAIMED IS:
1. Method for driving a picture display, particularly an AC electroluminescent display (C11, C12, C21, C22) based on the thin film technique and comprising a bi-dimensional matrix (X1, X2, Y1, Y2 ) consisting of X and Y electrodes, according to which method
- line selection pulses are alternatingly applied to the X electrodes (X1, X2) and
- column modulation pulses corresponding to the desired luminance are applied to the Y electrodes (Y1, Y2), c h a r a c t e r i z e d in that - at least some of the display elements
(C11, C12, C21, C22) are charged to a maximum basic voltage (UBIAS ) of variable polarity, which basic voltage has been selected so that the line selection pulses or the column modulation pulses alone are not sufficient to ignite any display element (C11, C12, C21, C22), and
- the line selection and column modulation voltages are superimposed on the basic voltage (UBIAS), which voltages have been selected so that only the sum of the basic voltage (UBIAS), the line selection voltage (URM), and the column modulation vol tage can bring each element to be selected (C11, C12, C21, C22) to the display state.
2. Method as claimed in claim 1, wherein the AC voltage source (B) is connected in series with the line selection voltage source (RM), c h a r a c t e r i z e d in that the basic voltage (UBIAS ) is formed out of the AC voltage (UB) by subtracting therefrom the line selection voltage (URM) if the AC voltage (UB) is negative, and by subtracting therefrom the maximum value (USM) of the column modulation voltages if the
AC voltage (UB) is positive.
3. Method as claimed in claim 1, wherein the AC voltage source (B) is connected in series with the column modulation voltage source (SM), c h a r a c t e r i z e d in that the basic voltage (UBIAS) is formed out of the AC voltage (UB) by subtracting therefrom the line selection voltage (URM) if the AC voltage (UB) is positive, and by subtracting therefrom the maximum value (USM) of the column modulation voltages if the AC voltage (UB) is negative.
4. Method as claimed in claim 1, c h a r a c t e r i z e d in that the polarity of the basic voltage (UBIAS) is not reversed until after all the lines (X1 , X2) have, in their turn, received the line selection pulse.
5. Method as claimed in claim 1, c h a r a c t e r i z e d in that the line selection voltage (URM) and the maximum value (USM) of the column modu lation voltages are of equal magnitude as compared with each other.
6. Method as claimed in claim 1, c h a r a c t e r i z e d in that the line selection voltage
(URM) and the maximum value (USM) of the column modulation voltages are of different magnitudes as compared with each other, and the symmetry of the drive voltage is maintained by selecting the positive and the negative amplitude of the AC voltaqe (UB) to differ as to their magnitudes by the difference between the line selection voltage (URM) and the maximum value (USM) of the column modulation voltages.
7. Wiring system to be used for the application of the method as claimed in claim 1, which wiring system comprises: - an AC electroluminescent display (C11, C12, C21, C22) based on the thin film technique and comprising a matrix (X1, X2; Y1, Y2) consisting of X and Y electrodes,
- line drive circuits (RA) for applying line selection pulses alternatingly to the X electrodes (X1, X2), - column drive circuits (SA) for applying column modulation pulses to the Y electrodes (Y1, Y2),
- a line selection voltage source (RM) for the generation of line selection voltage (UR M, UM) ,
- a column modulation voltage source (SM) for the generation of column modulation voltages, c h a r a c t e r i z e d in that
- the line selection voltage source (RM) and the column modulation voltage source (SM) are DC voltage sources, and - the wiring system includes an AC voltage source
(B) required for the generation of the basic voltage (UBIAS ), which source (B) is connected in series either with the line selection voltage source (RM) or with the column modulation voltage source (SM), wherein the voltages of the different voltage sources (B, RM, SM) have been selected so that the basic voltage (UBIAS) becomes symmetric and so that, on one hand, the line selection pulses or the column modulation pulses alone are not sufficient to ignite any display element (C11, C12, C21, C22) but, on the other hand, that only the sum of the basic voltage (UBIAS), the line selection voltage, and the column modulation voltage brings each element (C11, C12, C21 , C22) to be selected to the display state.
8. Wiring system as claimed in claim 7, c h a r a c t e r i z e d in that the DC voltages (URM, USM, UM) generated both by the line selection voltage and by the column modulation voltage sources (RM, SM) are equally high.
9. Wiring system as claimed in claim 7, c h a r a c t e r i z e d in that the AC voltage source (B) is connected in series with the line selection voltage source (RM).
10. Wiring system as claimed in claim 9, c h a r a c t e r i z e d in that the ground point (SE) of the column modulation voltage source (SM) is at the same potential with the ground point (JE) of the AC voltage source (B).
EP19830900715 1982-02-17 1983-02-17 Method and wiring system for driving a picture display, particularly an ac electroluminescent display Expired EP0101702B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI820522 1982-02-17
FI820522A FI64248C (en) 1982-02-17 1982-02-17 OIL COUPLING FOER STYRNING AV BILDAOTERGIVNING OCHISYNNERHET VAEXELSTROEMS-ELEKTROLUMINENSAOTERGIVNING

Publications (2)

Publication Number Publication Date
EP0101702A1 true EP0101702A1 (en) 1984-03-07
EP0101702B1 EP0101702B1 (en) 1986-02-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP19830900715 Expired EP0101702B1 (en) 1982-02-17 1983-02-17 Method and wiring system for driving a picture display, particularly an ac electroluminescent display

Country Status (6)

Country Link
EP (1) EP0101702B1 (en)
JP (1) JPS59500289A (en)
DE (1) DE3332440T1 (en)
FI (1) FI64248C (en)
GB (1) GB2127199B (en)
WO (1) WO1983003021A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5006838A (en) * 1985-06-10 1991-04-09 Sharp Kabushiki Kaisha Thin film EL display panel drive circuit

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60249191A (en) * 1984-05-24 1985-12-09 シチズン時計株式会社 Display driving circuit
EP0249954B1 (en) * 1986-06-17 1992-12-02 Fujitsu Limited Driving a matrix type display device
GB2194663B (en) * 1986-07-18 1990-06-20 Stc Plc Display device
JP2647859B2 (en) * 1987-09-16 1997-08-27 シャープ株式会社 Thin film EL display
JPH0748143B2 (en) * 1988-12-28 1995-05-24 シャープ株式会社 Driving method of display device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327099B2 (en) * 1973-10-03 1978-08-05
US4237456A (en) * 1976-07-30 1980-12-02 Sharp Kabushiki Kaisha Drive system for a thin-film EL display panel
US4275336A (en) * 1979-03-05 1981-06-23 International Business Machines Corporation Method of improving the memory effect and brightness of an alternating current excited thin film electroluminscent device
JPS5714889A (en) * 1980-06-30 1982-01-26 Fujitsu Ltd Matrix display unit driving method
FI62447C (en) * 1981-04-22 1982-12-10 Lohja Ab Oy FOERFARANDE FOER STYRNING AV BILDAOTERGIVNING OCH I SYNNERHET VAEXELSTROEMSELEKTROLUMINENSAOTERGIVNING

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8303021A1 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5006838A (en) * 1985-06-10 1991-04-09 Sharp Kabushiki Kaisha Thin film EL display panel drive circuit

Also Published As

Publication number Publication date
JPS59500289A (en) 1984-02-23
GB2127199A (en) 1984-04-04
GB2127199B (en) 1986-07-16
FI64248B (en) 1983-06-30
WO1983003021A1 (en) 1983-09-01
FI64248C (en) 1983-10-10
JPH0220994B2 (en) 1990-05-11
EP0101702B1 (en) 1986-02-12
GB8327190D0 (en) 1983-11-09
DE3332440T1 (en) 1984-02-09

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