EP0004340A2 - Pseudorandom generation of orthogonal matrixes for scrambling purposes - Google Patents

Pseudorandom generation of orthogonal matrixes for scrambling purposes Download PDF

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EP0004340A2
EP0004340A2 EP79100778A EP79100778A EP0004340A2 EP 0004340 A2 EP0004340 A2 EP 0004340A2 EP 79100778 A EP79100778 A EP 79100778A EP 79100778 A EP79100778 A EP 79100778A EP 0004340 A2 EP0004340 A2 EP 0004340A2
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memory
matrix
content
address
line
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French (fr)
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EP0004340B1 (en
EP0004340A3 (en
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Jörg Dr. Dr.-Ing. Robra
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Tekade Felten and Guilleaume Fernmeldeanlagen GmbH
Felten and Guilleaume Fernmeldeanlagen GmbH
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Tekade Felten and Guilleaume Fernmeldeanlagen GmbH
Felten and Guilleaume Fernmeldeanlagen GmbH
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04KSECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K1/00Secret communication

Definitions

  • the invention relates to a method for the pseudo-random generation of orthogonal number matrices.
  • Orthogonal number matrices are among others used in procedures for encrypting speech. Such an encryption method is e.g. described in German patent specification 2523828.
  • groups of e.g. eight samples of the unencrypted speech signal are transformed using an orthogonal 8 x 8 number matrix according to known rules of matrix transformation (see e.g. Zurmühl, Matrizen, Springer Verlag 1958) and the transformed samples are subjected to further transformation processes.
  • a matrix transformation with the inverse matrix is carried out in a corresponding intermediate step.
  • the invention is based on the object of specifying a method by means of which the largest possible number of different orthogonal matrices can be generated in a pseudo-random manner with the least possible use of memory space and made available for the transformation or back-transformation of the samples.
  • This object is achieved in that another matrix is generated from an orthogonal matrix already used for the encryption by pseudo-random permutation of its rows or columns.
  • FIG. 1 shows a simple example of an orthogonal number matrix.
  • the matrix consists of four numbered row vectors (number series from right to left) and four column vectors (number series from top to bottom). 1 can at the same time be understood as an image of the content of a correspondingly large memory matrix of a random access memory. Permutations of the rows of the number matrix, such as swapping two rows, then correspond to swap the contents of the corresponding rows of the memory matrix.
  • FIG. 2 shows the matrix that emerged from the number matrix according to FIG. 1 by exchanging the second with the fourth line vector. Transferred to the memory matrix means that the content of the second memory line has been interchanged with the content of the fourth memory line of the read-write memory. It is important in the present context that, even after the permutation, the number matrix is an orthogonal matrix and can therefore be used for the "transformation on the transmission side and the reverse transformation on the reception side in the same way as the output matrix.
  • the components used are a random generator 1, an address memory 3, a read-write memory 4, a changeover switch 5, a first shift register 6, a second shift register 7 and a control unit 8. All components together form a clocked system, the Clock generator and the feed lines to the clock inputs of the individual modules are not shown.
  • the random numbers output by the pseudo random generator 1 are stored in the address memory 2.
  • the read-write memory 4 has the form of a matrix memory and has as many memory locations as the number matrix components to be treated.
  • the control unit 8 switches the two memories 2 and 4 from read to write operation via the connections shown. In addition, it operates the changeover switch 5 and the address counter 3 and processes information about its counter reading.
  • the number matrix previously used for encryption is stored in memory 4.
  • the permutation process for generating another number matrix is thus initiated tet that the random number generator 1 outputs a random number to the address memory 2 and the address counter 3 is set by the control unit 8 to the address 0.
  • the control unit 8 With the appropriate position of the switch 5 and a control signal from the control unit 8 to the memory 4, the result is that the content of the memory cell with the address 0 is read into the shift register 6.
  • the control unit 8 gives the memory 2 and the address counter 3 the necessary commands for this to be set to the address which is stored in the address memory 2.
  • the memory line of the memory 4 corresponding to the stored address is transferred to the shift register 6, while the previous content of the shift register 6 is passed on to the shift register 7.
  • the changeover switch 5 is then brought into a position by the control unit 8, which causes the shift registers 6 and 7 to be connected in a ring-shaped manner. It is thereby achieved that the contents of the shift registers 6 and 7 are exchanged by the next clocks. If this exchange process is completed, the control unit immediately sets the address counter 3 to 0. The content of the shift register 6 is now read into the memory line with the address 0, while at the same time the total content of the registers 6 and 7 is cyclically shifted. If the memory line is written with the address 0, the address counter 3 is set again with the contents of the address memory 2 that have remained unchanged. Now the memory line corresponding to this address is written with the content currently contained in the shift register 6. If this memory line is also written, the following final state of the memory has been reached: The content of the memory line with the address 0 has reached the memory line with the address initially generated by the pseudo-random generator while the content of this memory line was written in the line with the address 0.
  • control unit sets the address counter again to 0 and brings the changeover switch 5 into a position in which information can be transferred from the matrix memory 4 into the shift register 6. If the content of the memory line with address 0 is written in shift register 6, the address counter is set to 1. The content of the line with the address 1 of the memory 4 is now read into the shift register 6, the content stored there being adopted into the line with the address 1. After completion of this process, the counter status is increased again by one unit and the content of the memory line assigned to this counter status is exchanged with the content of shift register 6. The process repeats itself until all addresses have run through and the counter has returned to address 0.
  • the creation of a permutation of the line contents of the memory matrix 4 according to the described method has the advantage that a number matrix is available with only one random number, which differs from the previous number matrix as a rule in each line. For cryptological reasons, the greatest possible difference between two successive number matrices is desirable. This difference could also be achieved by repeatedly pseudo-randomly swapping two lines at a time. However, it would then be necessary for the random number generator to supply more than one address in the period in which the new matrix has to be made available for encryption purposes, that is to say it is operated at a higher clock frequency. that must. Since the random generator is already operated at the limit of its highest clock frequency in most applications, a further increase in the clock frequency is impossible.
  • the inventive design of the method for solving the problem presented shows an easy way out of the difficulties mentioned.

Abstract

1. Pseudo random generation of orthogonal number matrices for scrambling purposes, which is characterized in that another orthoganol number matrix is generated from an orthogonal number matrix already used for the scrambling, by a pseudo random permutation of its rows or columns.

Description

Die Erfindung betrifft ein Verfahren zur pseudozufälligen Erzeugung von orthogonalen Zahlenmatrizen. Orthogonale Zahlenmatrizen werden u.a. in Verfahren zur Verschlüsselung von Sprache verwendet. Ein solches Verschlüsselungsverfahren ist z.B. in der deutschen Auslegeschrift 2523828 beschrieben. Entsprechend diesem Verfahren werden in einem Zwischenschritt Gruppen von z.B. acht Abtastproben des unverschlüsselten Sprachsignales mit Hilfe einer orthogonalen 8 x 8-Zahlenmatrix nach bekannten Regeln der Matrixtransformation (vgl. hierzu z.B. Zurmühl, Matrizen, Springer Verlag 1958) transformiert und die transformierten Abtastproben weiteren Transformationsprozessen unterworfen. Um auf der Empfängerseite die ursprünglichen Abtastproben zurückzugewinnen, wird in einem entsprechenden Zwischenschritt eine Matrixtransformation mit der inversen Matrix durchgeführt.The invention relates to a method for the pseudo-random generation of orthogonal number matrices. Orthogonal number matrices are among others used in procedures for encrypting speech. Such an encryption method is e.g. described in German patent specification 2523828. In accordance with this method, groups of e.g. eight samples of the unencrypted speech signal are transformed using an orthogonal 8 x 8 number matrix according to known rules of matrix transformation (see e.g. Zurmühl, Matrizen, Springer Verlag 1958) and the transformed samples are subjected to further transformation processes. In order to recover the original samples on the receiver side, a matrix transformation with the inverse matrix is carried out in a corresponding intermediate step.

Um eine unbefugte Entschlüsselung zu erschweren, ist z.B. in dem Verfahren nach der genannten Auslegeschrift vorgesehen, in einem Festwertspeicher genügender Größe mehrere Matrizen zu speichern und von Zeit zu Zeit durch einen Pseudozufallsgenerator eine andere Matrix aussuchen zu lassen, die zur Transformation bzw. Rücktransformation der Proben verwendet wird. Die unbefugte Entschlüsselung wird umso schwieriger, je mehr verschiedene Matrizen zur Verfügung stehen und benutzt werden. Die Größe eines aus unterschiedlichen Matrizen bestehenden Vorrates ist allerdings durch die Kapazität der Festwertspeicher sowie der nötigen Adreßspeicher begrenzt.In order to make unauthorized decoding more difficult, provision is made, for example, in the method according to the above-mentioned layout specification, in a read-only memory of sufficient size save several matrices and, from time to time, have a pseudo random generator select another matrix that is used to transform or reverse transform the samples. Unauthorized decryption becomes more difficult the more different matrices are available and used. However, the size of a stock consisting of different matrices is limited by the capacity of the read-only memory and the necessary address memory.

Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren anzugeben, durch das bei möglichst geringem Aufwand an Speicherplätzen eine möglichst große Anzahl von unterschiedlichen orthogonalen Matrizen auf pseudozufällige Weise erzeugt und für die Transformation bzw. Rücktransformation der Abtastproben bereitgestellt werden kann.The invention is based on the object of specifying a method by means of which the largest possible number of different orthogonal matrices can be generated in a pseudo-random manner with the least possible use of memory space and made available for the transformation or back-transformation of the samples.

Diese Aufgabe wird dadurch gelöst, daß aus einer schon für die Verschlüsselung verwendeten orthogonalen Matrix durch pseudozufällige Permutation ihrer Zeilen oder Spalten eine andere Matrix erzeugt wird.This object is achieved in that another matrix is generated from an orthogonal matrix already used for the encryption by pseudo-random permutation of its rows or columns.

Anhand eines Ausführungsbeispieles soll das erfindungsgemäße Verfahren, die Mittel zu seiner Durchführung sowie seine Weiterbildungen erläutert werden.The method according to the invention, the means for its implementation and its further developments are to be explained using an exemplary embodiment.

Fig. 1 zeigt ein einfaches Beispiel einer orthogonalen Zahlenmatrix. Die Matrix besteht aus vier durchnummerierten Zeilenvektoren (Zahlenreihe von rechts nach links) und vier Spaltenvektoren (Zahlenreihe von oben nach unten). Die Matrix nach Fig. 1 kann gleichzeitig als Bild des Inhaltes einer entsprechend großen Speichermatrix eines Schreib-Lese-Speichers verstanden werden. Permutationen der Zeilen der Zahlenmatrix, wie z.B. Vertauschen von zwei Zeilen, korrespondieren dann zur Vertauschung des Inhaltes der entsprechenden Zeilen der Speichermatrix. So zeigt z.B. Fig. 2 die Matrix, die aus der Zahlenmatrix nach Fig. 1 durch Vertauschen des zweiten mit dem vierten Zeilenvektor hervorgegangen ist. Übertragen auf die Speichermatrix bedeutet, daß der Inhalt der zweiten Speicherzeile mit dem Inhalt der vierten Speicherzeile des Schreib-Lese-Speichers vertauscht worden ist. Wichtig im vorliegenden Zusammenhang ist, daß auch nach der Permutation die Zahlenmatrix eine orthogonale Matrix ist und damit für die " Transformation auf der Sendeseite und die Rücktransformation auf der Empfangsseite in der gleichen Weise verwendet werden kann wie die Ausgangsmatrix.1 shows a simple example of an orthogonal number matrix. The matrix consists of four numbered row vectors (number series from right to left) and four column vectors (number series from top to bottom). 1 can at the same time be understood as an image of the content of a correspondingly large memory matrix of a random access memory. Permutations of the rows of the number matrix, such as swapping two rows, then correspond to swap the contents of the corresponding rows of the memory matrix. For example, FIG. 2 shows the matrix that emerged from the number matrix according to FIG. 1 by exchanging the second with the fourth line vector. Transferred to the memory matrix means that the content of the second memory line has been interchanged with the content of the fourth memory line of the read-write memory. It is important in the present context that, even after the permutation, the number matrix is an orthogonal matrix and can therefore be used for the "transformation on the transmission side and the reverse transformation on the reception side in the same way as the output matrix.

Fig. 3 dient zur Erläuterung einer Anordnung, mit der das erfindungsgemäße Verfahren durchgeführt werden kann. Die verwendeten Bauteile sind ein Zufallsgenerator 1, ein Adreßspeicher 3, ein Schreib-Lese-Speicher 4, ferner ein Umschalter 5, ein erstes Schieberegister 6, ein zweites Schieberegister 7, sowie eine Steuereinheit 8. Sämtliche Bauteile zusammen bilden ein getaktetes System, wobei der Taktgenerator sowie die Zuführungsleitungen zu den Takteingängen der einzelnen Bausteine nicht eingezeichnet sind. Im Adreßspeicher 2 werden die vom Pseudozufallsgenerator 1 abgegebenen Zufallszahlen gespeichert. Der Schreib-Lese-Speicher 4 hat die Form eines Matrizenspeichers und besitzt ebenso viele Speicherstellen wie die zu behandelnde Zahlenmatrix Komponenten. Die Steuereinheit 8 schaltet über die eingezeichneten Verbindungen die beiden Speicher 2 und 4 vom Lese- in den Schreibbetrieb um. Außerdem bedient sie den Umschalter 5 sowie den Adre3zähler 3 und verarbeitet Informationen über dessen Zählerstand. Die bisher für die Verschlüsselung verwendete Zahlenmatrix ist im Speicher 4 gespeichert. Der Permutationsprozess zur Erzeugung einer anderen Zahlenmatrix wird damit eingeleitet, daß der Zufallsgenerator 1 eine Zufallszahl an den Adreßspeicher 2 abgibt und der Adreßzähler 3 von der Steuereinheit 8 auf die Adresse 0 gesetzt wird. Bei entsprechender Stellung des Umschalters 5 und einem Steuersignal von der Steuereinheit 8 an den Speicher 4 hat das zur Folge, daß der Inhalt der Speicherzelle mit der Adresse 0 in das Schieberegister 6 eingelesen wird. Sodann gibt die Steuereinheit 8 an den Speicher 2 und den Adreßzähler 3 die nötigen Befehle dafür, daß dieser auf die Adresse eingestellt wird, die im Adreßspeicher 2 gespeichert ist. Nach der Einstellung des Adreßzählers wird die der eingespeicherten Adresse entsprechende Speicherzeile des Speichers 4 in das Schieberegister 6 übernommen, während der bisherige Inhalt des Schieberegisters 6 an das Schieberegister 7 weitergegeben wird. Sodann wird der Umschalter 5 durch die Steuereinheit 8 in eine Stellung gebracht, die ein ringförmiges Zusammenschließen des Schieberegisters 6 und 7 bewirkt. Dadurch wird erreicht, daß durch die nächsten Takte die Inhalte der Schieberegister 6 und 7 vertauscht werden. Ist dieser Vertauschungsvorgang abgeschlossen, so stellt die Steuereinheit den Adreßzähler 3 sofort auf 0. Der Inhalt des Schieberegisters 6 wird nun in die Speicherzeile mit der Adresse 0 eingelesen, während gleichzeitig der Gesamtinhalt der Register 6 und 7 zyklisch verschoben wird. Ist die Speicherzeile mit der Adresse 0 beschrieben, so wird der Adresszähler 3 erneut mit dem unverändert gebliebenen Inhalt des Adre3speichers 2 eingestellt. Jetzt erfolgt das Beschreiben der dieser Adresse entsprechenden Speicherzeile mit dem zu diesem Zeitpunkt im Schieberegister 6 enthaltenen Inhalt. Ist auch diese Speicherzeile beschrieben, so ist folgender Endzustand des Speichers erreicht: Der Inhalt der Speicherzeile mit der Adresse 0 ist in die Speicherzeile mit der zu Anfang vom Pseudo-Zufallsgenerator erzeugten Adresse gelangt, während der Inhalt dieser Speicherzeile in die Zeile mit der Adresse 0 eingeschrieben wurde.3 serves to explain an arrangement with which the method according to the invention can be carried out. The components used are a random generator 1, an address memory 3, a read-write memory 4, a changeover switch 5, a first shift register 6, a second shift register 7 and a control unit 8. All components together form a clocked system, the Clock generator and the feed lines to the clock inputs of the individual modules are not shown. The random numbers output by the pseudo random generator 1 are stored in the address memory 2. The read-write memory 4 has the form of a matrix memory and has as many memory locations as the number matrix components to be treated. The control unit 8 switches the two memories 2 and 4 from read to write operation via the connections shown. In addition, it operates the changeover switch 5 and the address counter 3 and processes information about its counter reading. The number matrix previously used for encryption is stored in memory 4. The permutation process for generating another number matrix is thus initiated tet that the random number generator 1 outputs a random number to the address memory 2 and the address counter 3 is set by the control unit 8 to the address 0. With the appropriate position of the switch 5 and a control signal from the control unit 8 to the memory 4, the result is that the content of the memory cell with the address 0 is read into the shift register 6. Then the control unit 8 gives the memory 2 and the address counter 3 the necessary commands for this to be set to the address which is stored in the address memory 2. After setting the address counter, the memory line of the memory 4 corresponding to the stored address is transferred to the shift register 6, while the previous content of the shift register 6 is passed on to the shift register 7. The changeover switch 5 is then brought into a position by the control unit 8, which causes the shift registers 6 and 7 to be connected in a ring-shaped manner. It is thereby achieved that the contents of the shift registers 6 and 7 are exchanged by the next clocks. If this exchange process is completed, the control unit immediately sets the address counter 3 to 0. The content of the shift register 6 is now read into the memory line with the address 0, while at the same time the total content of the registers 6 and 7 is cyclically shifted. If the memory line is written with the address 0, the address counter 3 is set again with the contents of the address memory 2 that have remained unchanged. Now the memory line corresponding to this address is written with the content currently contained in the shift register 6. If this memory line is also written, the following final state of the memory has been reached: The content of the memory line with the address 0 has reached the memory line with the address initially generated by the pseudo-random generator while the content of this memory line was written in the line with the address 0.

Nun stellt die Steuereinheit den Adreßzähler abermals auf 0 und bringt den Umschalter 5 in eine Stellung, in der aus dem Matrizenspeicher 4 Informationen in das Schieberegister 6 übertragen werden können. Ist der Inhalt der Speicherzeile mit der Adresse 0 in das Schieberegister 6 geschrieben, so wird der Adreßzähler auf 1 gestellt. Der Inhalt der Zeile mit der Adresse 1 des Speichers 4 wird nun in das Schieberegister 6 eingelesen, wobei der dort gespeicherte Inhalt in die Zeile mit der Adresse 1 übernommen wird. Nach Abschluß dieses Vorgangs wird der Stand des Zählers abermals um eine Einheit erhöht und der Inhalt der diesem Zählerstand zugeordneten Speicherzeile mit dem Inhalt des Schieberegisters 6 ausgetauscht. Der Vorgang wiederholt sich solange, bis sämtliche Adressen durchgelaufen sind und der Zähler wieder bei der Adresse 0 angelangt ist. Ist die Zeile mit der Adresse 0 durch den Inhalt der Zeile mit der höchsten Adresse überschrieben worden, so ist durch die beschriebenen Verfahrensschritte eine zyklische Verschiebung sämtlicher Zeileninhalte des Speichers 4 erreicht worden. Insgesamt gesehen ist der Inhalt des Speichers 4 aus dem ursprünglichen Inhalt durch eine Permutation der Zeileninhalte hervorgegangen, und zwar besteht diese Permutation aus der Vertauschung zweier Zeilen mit anschließender zyklischer Verschiebung um genau eine Stelle.Now the control unit sets the address counter again to 0 and brings the changeover switch 5 into a position in which information can be transferred from the matrix memory 4 into the shift register 6. If the content of the memory line with address 0 is written in shift register 6, the address counter is set to 1. The content of the line with the address 1 of the memory 4 is now read into the shift register 6, the content stored there being adopted into the line with the address 1. After completion of this process, the counter status is increased again by one unit and the content of the memory line assigned to this counter status is exchanged with the content of shift register 6. The process repeats itself until all addresses have run through and the counter has returned to address 0. If the line with the address 0 has been overwritten by the content of the line with the highest address, a cyclical shifting of all line contents of the memory 4 has been achieved by the method steps described. Seen overall, the content of the memory 4 has arisen from the original content by permutation of the line contents, and this permutation consists of swapping two lines with subsequent cyclical shifting by exactly one place.

Was bisher über die Zeilen des Speichers 4 gesagt worden ist, läßt sich mit nur geringen Abwandlungen auch mit den Spalten durchführen. Möglich ist auch, daß Zeilen- und Spaltenpermutationen gemischt werden.What has been said so far about the rows of the memory 4 can also be carried out with the columns with only minor modifications. It is also possible that row and column permutations are mixed.

Die Erzeugung einer Permutation der Zeileninhalte der Speichermatrix 4 nach dem beschriebenen Verfahren hat den Vorteil, daß mit nur einer Zufallszahl eine Zahlenmatrix zur Verfügung steht, die sich von der vorangegangenen Zahlenmatrix in der Regel in jeder Zeile unterscheidet. Aus kryptologischen Gründen ist ein möglichst großer Unterschied zwischen zwei nacheinander verwendeten Zahlenmatrizen wünschenswert. Dieser Unterschied könnte auch durch mehrmaliges pseudozufälliges Vertauschen jeweils zweier Zeilen erreicht werden. Jedoch wäre es dann nötig, daß in dem Zeitraum, in dem die neue Matrix zu Verschlüsselungszwecken zur Verfügung gestellt werden muß, der Zufallsgenerator mehr als eine Adresse abzugeben hat, er also mit einer höheren Taktfrequenz betrieben wer. den muß. Da in den meisten Anwendungsfällen der Zufallsgenerator ohnehin schon an der Grenze seiner obersten Taktfrequenz betrieben wird, ist eine weitere Erhöhung der Taktfrequenz unmöglich. Die erfindungsgemäße Ausgestaltung des Verfahrens zur Lösung der gestellten Aufgabe zeigt einen leicht gangbaren Ausweg aus den genannten Schwierigkeiten.The creation of a permutation of the line contents of the memory matrix 4 according to the described method has the advantage that a number matrix is available with only one random number, which differs from the previous number matrix as a rule in each line. For cryptological reasons, the greatest possible difference between two successive number matrices is desirable. This difference could also be achieved by repeatedly pseudo-randomly swapping two lines at a time. However, it would then be necessary for the random number generator to supply more than one address in the period in which the new matrix has to be made available for encryption purposes, that is to say it is operated at a higher clock frequency. that must. Since the random generator is already operated at the limit of its highest clock frequency in most applications, a further increase in the clock frequency is impossible. The inventive design of the method for solving the problem presented shows an easy way out of the difficulties mentioned.

Claims (2)

1. Pseudozufällige Erzeugung von orthogonalen Zahlenmatrizen für Verschlüsselungszwecke, dadurch gekennzeichnet, daß aus einer schon für die Verschlüsselung verwendeten orthogonalen Zahlenmatrix durch pseudozufällige Permutation ihrer Zeilen oder Spalten eine andere orthogonale Zahlenmatrix erzeugt wird.1. Pseudo-random generation of orthogonal number matrices for encryption purposes, characterized in that another orthogonal number matrix is generated from an orthogonal number matrix already used for encryption by pseudo-random permutation of its rows or columns. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß zu einer pseudozufälligen Permutation der Zeilen einer orthogonalen Zahlenmatrix ihre Komponenten in den Speicherelementen eines Matrizenspeichers (4) gespeichert werden und daß mit einer Steuereinrichtung (8) und einem einstellbaren Adresszähler (3) der Inhalt der ersten Speicherzeile des Matrizenspeichers und der Inhalt einer Speicherzeile, deren Adresse von einem Pseudo-Zufallsgenerator bestimmt wurde, zunächst aus dem Matrizenspeicher ausgelesen und in jeweils einem Schieberegister (6,7) zwischengespeichert und danach in den Matrizenspeicher so eingelesen werden, daß die Inhalte der beiden erwähnten Speicherzeilen des Matrizenspeichers miteinander vertauscht sind und daß anschließend der Inhalt der ersten Speicherzeile in eines der Schieberegister (6) eingelesen wird und daß der Inhalt der nächsten Speicherzeile mit dem Inhalt des Schieberegisters ausgetauscht wird, und daß dieser Austauschvorgang mit den folgenden Speicherzeilen so lange wiederholt wird, bis jede Speicherzeile einmal ihren Inhalt mit dem Schieberegister (6) getauscht hat.2. The method according to claim 1, characterized in that for a pseudo-random permutation of the rows of an orthogonal number matrix their components are stored in the memory elements of a matrix memory (4) and that with a control device (8) and an adjustable address counter (3) the content of the first memory line of the matrix memory and the content of a memory line, the address of which was determined by a pseudo-random generator, first read out of the matrix memory and temporarily stored in a shift register (6,7) and then read into the matrix memory so that the contents of the two mentioned memory lines of the matrix memory are interchanged and that the content of the first memory line is then read into one of the shift registers (6) and that the content of the next memory line is exchanged with the content of the shift register, and that this exchange process with the following memories hurry is repeated until each memory line has once exchanged its content with the shift register (6).
EP79100778A 1978-03-17 1979-03-15 Pseudorandom generation of orthogonal matrixes for scrambling purposes Expired EP0004340B1 (en)

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DE19782811635 DE2811635A1 (en) 1978-03-17 1978-03-17 PSEUDO-ACCESSIBLE PRODUCTION OF ORTHOGONAL MATRICES FOR ENCYCLING PURPOSES

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THE RADIO AND ELECTRONIC ENGINEER Vol. 43, Nr. 8, August 1973, London, GB, V. PHILLIPS et al.: "Speech scrambling by the matrixing of amplitude samples", Seiten 459-470 * Seite 460, linke Spalte, Zeilen 5-16; Seite 469, linke Spalte, Zeilen 36-41 * *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0123360A1 (en) * 1983-04-26 1984-10-31 Koninklijke Philips Electronics N.V. Method of distributing and utilizing enciphering keys
WO1998038767A1 (en) * 1997-02-26 1998-09-03 Siemens Aktiengesellschaft Method and arrangement for computer assisted formation of a permutation to permute digital signals and method and arrangement to encrypt digital signals

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DE2960026D1 (en) 1981-01-22
EP0004340B1 (en) 1980-10-15
EP0004340A3 (en) 1979-10-17
DE2811635A1 (en) 1979-09-20

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