DK2467784T3 - System og fremgangsmåde til at cache information - Google Patents
System og fremgangsmåde til at cache information Download PDFInfo
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- DK2467784T3 DK2467784T3 DK10810295.5T DK10810295T DK2467784T3 DK 2467784 T3 DK2467784 T3 DK 2467784T3 DK 10810295 T DK10810295 T DK 10810295T DK 2467784 T3 DK2467784 T3 DK 2467784T3
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/122—Replacement control using replacement algorithms of the least frequently used [LFU] type, e.g. with individual count value
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/50—Network services
- H04L67/56—Provisioning of proxy services
- H04L67/568—Storing data temporarily at an intermediate stage, e.g. caching
- H04L67/5683—Storage of data provided by user terminals, i.e. reverse caching
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0871—Allocation or management of cache space
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/26—Using a specific storage system architecture
- G06F2212/264—Remote server
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7209—Validity control, e.g. using flags, time stamps or sequence numbers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Information Transfer Between Computers (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Claims (15)
1. En metode der omfatter: At modtage en anmodning om at behandle et emne på en processor med en tilknyttet cache; at modtage det søgte emne fra cachen, når det befinder sig deri; at hente det ønskede emne fra en anden hukommelse, når emnet ikke befinder sig i cachen; metoden er kendetegnet ved disse trin: behandling af emnet uden at gemme emnet i cachen, når der ikke tidligere har været anmodet om emnet inden for en på forhånd fastsat periode; behandling af emnet uden at gemme emnet i cachen, når der er anmodet om emnet inden for en fastsat periode og tiden for den forrige anmodning er tidligere end den seneste anmodning for hvert emne i et sæt af emner, der befinder sig i cachen; og behandling af emnet og lagring af det i cachen, når emnet er blevet anmodet om inden for den aftalte periode og tiden for den forrige anmodning ligger senere end den seneste anmodning om mindst ét emne indenfor det sæt af emner, der befinder sig i cachen.
2. Metoden i krav 1, hvor anmodningen modtages via et netværk af en server fra en klientenhed, og anmodningen om at behandle emnet omfatter afsendelse af det søgte emne til klientenheden.
3. Metoden i krav 2, hvor emnet omfatter gengivelse af audio- eller visuelle data på klientenheden.
4. Metoden i krav 3, hvor emnet omfatter en fil.
5. Metoden i krav 4, hvor emnet omfatter en del af en fil.
6. Metoden i krav 1, der yderligere omfatter fjernelse af et emne fra sættet af emner, når den seneste anmodning om det fjernede emne tidsmæssigt er før den seneste anmodning om andre emner i sættet.
7. Metoden i krav 6, hvori emnet fjernes inden opbevaring af det søgte emne i cachen.
8. Metoden i krav 7, hvori emnet fjernes, når størrelsen af det søgte emne overskrider størrelsen af cachen minus den samlede størrelse af emnerne i sættet.
9. Metoden i krav 1, hvori emnet omfatter en indholdsfil, og kravet om at behandle emnet omfatter gengivelse af indhold hos en bruger.
10. Metoden i krav 1, hvori emner, der befinder sig i cachen, indeholder alle de emner, der befinder sig i cachen.
11. Et system bestående af: En cache til opsamling af oplysninger; En maskinlæsbar hukommelse, der er konfigureret til opsamling af informationer, og en processor konfigureret til: at modtage det søgte emne fra cachen, når dette emne befinder sig deri. at modtage det søgte emne fra en maskinlæsbar hukommelse, når det søgte emne ikke befinder sig i cachen; systemet er karakteriseret ved, at denne processor er konfigureret til: at tilvejebringe det søgte emne hos en anmodende enhed uden at gemme dette emne i cachen inden den næste anmodning, når emnet ikke tidligere har været søgt inden for en på forhånd fastsat periode; at tilvejebringe det søgte emne hos den anmodende enhed uden at gemme dette emne i cachen inden den næste anmodning, når emnet er blevet anmodet om inden for en fastsat periode, og tiden for den forrige anmodning ligger før den seneste anmodning for hvert emne i et sæt af emner, der befinder sig i cachen; og at tilvejebringe det søgte emne hos den anmodende enhed og gemme dette emne i cachen inden den næste anmodning, når emnet førhen er blevet søgt inden for den aftalte periode, og tidspunktet for den forrige anmodning er senere end den seneste anmodning om mindst ét emne indenfor det sæt af emner, der befinder sig i cachen.
12. Ordningen med krav 11, hvori processoren befinder sig i et knudepunkt i et netværk, og den anmodende enhed består af en enhed i et knudepunkt i et netværk, der er forskelligt fra knudepunktet for den føromtalte processor.
13. Ordningen med krav 11, hvori processoren befinder sig i et knudepunkt i et netværk, og den anmodende enhed består af en flerhed af enheder i en flerhed af knudepunkter i et netværk, der er forskelligt fra knudepunktet for den føromtalte processor.
14. Ordningen med krav 13, hvori informationsemnerne omfatter videoinformation, hvor netværket består af Internettet, og de begærende enheder består af brugercomputere.
15. Ordningen med krav 11, hvori processoren og den anmodende enhed er identiske, således at processoren behandler emner, den henter fra cachen, og den maskinlæsbare hukommelse.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/545,225 US8566531B2 (en) | 2009-08-21 | 2009-08-21 | System and method of selectively caching information based on the interarrival time of requests for the same information |
PCT/US2010/002317 WO2011022079A2 (en) | 2009-08-21 | 2010-08-20 | System and method of caching information |
Publications (1)
Publication Number | Publication Date |
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DK2467784T3 true DK2467784T3 (da) | 2016-11-21 |
Family
ID=43606203
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DK10810295.5T DK2467784T3 (da) | 2009-08-21 | 2010-08-20 | System og fremgangsmåde til at cache information |
DK16188263.4T DK3125131T3 (da) | 2009-08-21 | 2010-08-20 | System og fremgangsmåde til cache-lagring af information |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DK16188263.4T DK3125131T3 (da) | 2009-08-21 | 2010-08-20 | System og fremgangsmåde til cache-lagring af information |
Country Status (9)
Country | Link |
---|---|
US (7) | US8566531B2 (da) |
EP (3) | EP3722962A1 (da) |
JP (2) | JP5592489B2 (da) |
CN (2) | CN104915319B (da) |
AU (1) | AU2010284682B2 (da) |
CA (3) | CA3026715C (da) |
DE (1) | DE202010018478U1 (da) |
DK (2) | DK2467784T3 (da) |
WO (1) | WO2011022079A2 (da) |
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2009
- 2009-08-21 US US12/545,225 patent/US8566531B2/en active Active
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2010
- 2010-08-20 DK DK10810295.5T patent/DK2467784T3/da active
- 2010-08-20 AU AU2010284682A patent/AU2010284682B2/en active Active
- 2010-08-20 EP EP20178341.2A patent/EP3722962A1/en active Pending
- 2010-08-20 JP JP2012525535A patent/JP5592489B2/ja active Active
- 2010-08-20 EP EP16188263.4A patent/EP3125131B1/en active Active
- 2010-08-20 CN CN201510204702.6A patent/CN104915319B/zh active Active
- 2010-08-20 DK DK16188263.4T patent/DK3125131T3/da active
- 2010-08-20 DE DE202010018478.9U patent/DE202010018478U1/de not_active Expired - Lifetime
- 2010-08-20 CN CN201080047230.3A patent/CN102576350B/zh active Active
- 2010-08-20 CA CA3026715A patent/CA3026715C/en active Active
- 2010-08-20 EP EP10810295.5A patent/EP2467784B1/en active Active
- 2010-08-20 CA CA2771599A patent/CA2771599C/en active Active
- 2010-08-20 WO PCT/US2010/002317 patent/WO2011022079A2/en active Application Filing
- 2010-08-20 CA CA2942418A patent/CA2942418C/en active Active
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2011
- 2011-08-19 US US13/213,779 patent/US8572327B2/en active Active
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2013
- 2013-10-08 US US14/048,869 patent/US8812791B2/en active Active
- 2013-10-16 US US14/055,210 patent/US8825960B2/en active Active
- 2013-10-16 US US14/055,357 patent/US8825961B2/en active Active
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- 2014-07-24 JP JP2014150555A patent/JP5814436B2/ja active Active
- 2014-07-28 US US14/444,057 patent/US9104605B1/en active Active
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