DK163396B - IMPROVEMENT FOR IMPROVED PARITY PARENTS - Google Patents
IMPROVEMENT FOR IMPROVED PARITY PARENTS Download PDFInfo
- Publication number
- DK163396B DK163396B DK599984A DK599984A DK163396B DK 163396 B DK163396 B DK 163396B DK 599984 A DK599984 A DK 599984A DK 599984 A DK599984 A DK 599984A DK 163396 B DK163396 B DK 163396B
- Authority
- DK
- Denmark
- Prior art keywords
- scrambler
- parity
- character
- character stream
- output
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03828—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties
- H04L25/03866—Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties using scrambling
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
iin
DK 163396 BDK 163396 B
Opfindelsen angår et anlæg til overføring af digitale signaler, omfattende en tegnsender og en tegnmodtager, med en første kontinuerlig paritetstælling over i hvert enkelt tilfælde n bit af den tegnstrøm, der skal 5 sendes, og indføjning af en af det enkelte resultat af denne første paritetstælling afhængig paritetsbit i den tegnstrøm, der skal sendes, på sendesiden samt med en anden kontinuerlig paritetstælling over de samme n bit i den modtagne tegnstrøm og sammenligning af resultatet af 1 0 denne anden paritetstælling med den modtagne paritetsbit med henblik på fejlerkendelse på modtagesiden.BACKGROUND OF THE INVENTION 1. Field of the Invention The invention relates to a digital signal transmission system comprising a character transmitter and a character receiver, with a first continuous parity count over in each case n bit of the character stream to be transmitted, and inserting one of the individual results of this first parity count. dependent parity bit in the character stream to be sent, on the send side as well as with another continuous parity count over the same n bit in the received character stream and comparing the result of this second parity count with the received parity bit for error recognition on the receive side.
Pra tysk offentliggørelsesskrift nr. 22 47 662 kendes et anlæg, som ved ombytning af scrambler og fejlsikringsindretning på sendesiden og descrambler og fejl-15 detekteringsindretning på modtagesiden forøger fejlsikkerheden væsentligt (fig. 1). Denne foranstaltning træffes med henblik på på modtagesiden at undgå en flerdob-ling af overføringsfejl som følge af descrambleren og på forhånd at kunne konstatere og eventuelt korrigere over-20 føringsfejl.German Patent Publication No. 22 47 662 discloses a system which, by exchanging scrambler and error protection device on the sending side and descrambler and error detection device on the receiving side, significantly increases the error security (Fig. 1). This measure is taken in order to avoid, on the receiving side, multiple duplication of transmission errors due to the descrambler and to be able to detect and possibly correct transmission errors in advance.
Opfindelsen har til opgave at angive et anlæg af den indledningsvis omhandlede art, i hvilket paritetstællingsprocessen bliver uafhængig både af strukturen af de på sendesiden ankommende data og af strukturen af de 25 over overføringsstrækningen sendte data.It is the object of the invention to provide a facility of the kind initially referred to, in which the parity counting process becomes independent both of the structure of the data arriving on the transmit side and of the structure of the data transmitted over the transmission line.
Opgaven løses som angivet i krav l's kendetegnende del. Underkravene angiver fordelagtige videreudviklinger .The task is solved as specified in the characteristic part of claim 1. The subclaims indicate advantageous further developments.
Opfindelsesgenstanden er i det følgende forklaret 30 nærmere på grundlag af nogle udførelseseksempler under henvisning til tegningen, hvor fig. 1 viser teknikkens stade ifølge tysk offentliggørelsesskrift nr. 22 47 662, fig. 2 et anlæg ifølge opfindelsen som angivet i 35 krav 1, fig. 3 et anlæg ifølge opfindelsen som angivet i krav 3, 2The invention will now be explained in more detail on the basis of some exemplary embodiments with reference to the drawing, in which: FIG. 1 shows the state of the art in accordance with German Publication No. 22 47 662; 2 shows a plant according to the invention as claimed in claim 1; FIG. 3 shows a plant according to the invention as claimed in claims 3, 2
DK 163396 BDK 163396 B
fig. 4 et anlæg ifølge opfindelsen som angivet i krav 4, fig. 5 et anlæg ifølge opfindelsen som angivet i krav 5, og 5 fig. & en kendt opstilling til paritetskontrol.FIG. 4 shows a plant according to the invention as claimed in claim 4; 5 shows a plant according to the invention as claimed in claim 5, and 5 fig. & a known set up for parity checking.
Som fordel ved anlægget ifølge opfindelsen resulterer en væsentligt forbedret nøjagtighed ved paritetsudnyttelsen i sådanne overføringssystemer, i hvilke overføringsforstyrrelser - betinget af den anvendte mo-10 dulationsmetode - til stadighed frembringer en gruppe n-bit-fejl, som f.eks. ved 4-PSK-modulation med differentiel kodning. Det forudsættes, at der i modem'et opbygges hhv. nedbygges en overramme, hvorved en overføring af den på sendesiden talte paritetskode først bliver 15 mulig.In advantage of the system according to the invention, a substantially improved accuracy of parity utilization results in such transmission systems, in which transmission disorders - subject to the modulation method used - constantly produce a group of n-bit errors, such as e.g. by 4-PSK modulation with differential coding. It is assumed that the modem is built up, respectively. an over frame is downgraded, whereby a transmission of the parity code spoken on the sending side is only possible 15.
Der kendes opstillinger til paritetstælling i systemer, som til stadighed frembringer grupper af n-bit-fejl. De adskiller sig fra opstillinger, som ved aftastningsfejl overvejende frembringer l-bit-fejl, ved, 20 at der efter dem er indkoblet et 1/n-binæromsætningsled, hvis udgangssignal anvendes som paritetskode. Der kendes ligeledes digitalt overføringsudstyr, hvor datasignalet i datasenderen og -modtageren i hvert enkelt tilfælde scrambles med en kvasitilfældighedsfølge, og hvor pari-25 tetstællingen i relation til scramblingen med kvasitil-fældighedsfølgen enten sker ved interface-stedet til nytte-datasignalet eller ved interface-stedet til overføringsstrækningen .Parity count setups are known in systems that constantly generate groups of n-bit errors. They differ from arrays which, for scanning errors, predominantly produce 1-bit errors, know that after that a 1 / n binary converter is switched on, whose output signal is used as a parity code. Digital transmission equipment is also known in which the data signal in the data transmitter and receiver is in each case scrambled with a quasi-random sequence, and the parity count in relation to the scrambling with the quasi-random sequence occurs either at the interface site of the utility data signal or at the interface. the site of the transfer route.
Ulempen ved de hidtil kendte anlæg forklares 30 nærmere eksempelvis med henvisning til fig. 1. I dette kredsløb sker paritetstællingen umiddelbart før hhv. efter modulations- hhv. demodulationsindretningen. Der kan eksempelvis være tale om en 4-PSK-modulation.The disadvantage of the prior art systems is explained in greater detail, for example with reference to FIG. 1. In this circuit, the parity count takes place immediately before, respectively. according to modulation respectively. The despreading. For example, this may be a 4-PSK modulation.
Paritetstællerens arbejdsmåde består i, at den 35 indenfor et fastlagt interval (en ramme) kontrollerer, om antallet af deri overførte ét'er (eller nuller) i 3The mode of operation of the parity counter consists in the fact that within a set interval (a frame) it checks whether the number of ones (or zeros) transmitted therein in 3
DK 163396 BDK 163396 B
datasignalet er lige eller ulige. Dertil anvendes eksempelvis en kobling som vist i fig. 6. Deri tæller den første JK-flip-flop de i datasignalet indeholdte ét'er, idet den omstyres ved hvert ét, dvs. ændrer sin udgangs-5 tilstand. Den derpå følgende JK-flip-flop er en sædvanlig l:2-binærdeler, som her er nødvendig med henblik på konstatering af de ved 4-PSK-metoder med differentiel kodning til stadighed optrædende dobbeltfejl. Da der ved aftastningsfejl i sådanne 4-PSK-demodulatorer altid er 10 nøjagtigt to binærtegn forkerte, kan der dertil angives følgende fejlskema:the data signal is equal or odd. For example, a coupling as shown in FIG. 6. Therein, the first JK flip-flop counts the ones contained in the data signal, being redirected at each one, ie. changes its output-5 state. The subsequent JK flip-flop is a conventional 1: 2 binary divider, which is required here to detect the double error occurring by 4-PSK methods with differential coding. Since, when scanning errors in such 4-PSK demodulators, there are always exactly two binary characters wrong, the following error diagram can be specified:
Udsendte binærtegn Forfalskede binærtegn (a) 0 0 11 15 (b) 01 10 (c) 10 0 1 (d) 11 0 0 På grundlag af paritetstællerens (fig. 6) funk-20 tionsmåde kan det ses, at kun tilfældene (a) og (d) fører til paritetskrænkelser.Transmitted binary characters Counterfeit binary characters (a) 0 0 11 15 (b) 01 10 (c) 10 0 1 (d) 11 0 0 Based on the function of the parity counter (Fig. 6), it can be seen that only the cases (a ) and (d) lead to parity violations.
Da det i idealtilfældet gælder, at tilfældene (a)-(d) alle er lige sandsynlige, vil kvotienten af antallet af binærtegnfejl og antallet af paritetskrænkel-25 ser i gennemsnit antage værdien 4.Since, in the ideal case, the cases (a) - (d) are all equally likely, the quotient of the number of binary character errors and the number of parity violations will, on average, assume the value 4.
Kendskabet til denne størrelse, der sædvanligvis kaldes "fortyndelsesfaktor", muliggør nu en bedømmelse af fejlhyppigheden, hvormed f.eks. erstatningskoblingen for overføringsstrækninger kan styres.The knowledge of this size, usually called "dilution factor", now enables an assessment of the frequency of error, by which e.g. the replacement link for transmission lines can be controlled.
30 I praksis gælder den forannævnte antagelse af ens sandsynlighed for tilfældene (a)-(d) imidlertid kun med tilnærmelse. Det viser sig, at den i det foranstående definerede kvotient omtrent kan variere med en faktor på 2 i teknisk realiserede apparater, i ekstreme tilfælde 35 endog med størrelsesordener. Årsagen er, at som følge af signalforvrængninger på overføringsstrækningen er nogle30 In practice, however, the aforementioned assumption of one's likelihood of cases (a) - (d) only applies with approximation. It turns out that the quotient defined above can approximately vary by a factor of 2 in technically realized appliances, in extreme cases even with orders of magnitude. The reason is that as a result of signal distortions on the transmission line, some
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19833345777 DE3345777A1 (en) | 1983-12-17 | 1983-12-17 | ARRANGEMENT FOR IMPROVED PARITY PAYMENT |
DE3345777 | 1983-12-17 |
Publications (4)
Publication Number | Publication Date |
---|---|
DK599984D0 DK599984D0 (en) | 1984-12-14 |
DK599984A DK599984A (en) | 1985-06-18 |
DK163396B true DK163396B (en) | 1992-02-24 |
DK163396C DK163396C (en) | 1992-07-13 |
Family
ID=6217291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DK599984A DK163396C (en) | 1983-12-17 | 1984-12-14 | IMPROVEMENT FOR IMPROVED PARITY PARENTS |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0147658B1 (en) |
AT (1) | ATE40623T1 (en) |
DE (2) | DE3345777A1 (en) |
DK (1) | DK163396C (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3775746A (en) * | 1972-05-19 | 1973-11-27 | Ibm | Method and apparatus for detecting odd numbers of errors and burst errors of less than a predetermined length in scrambled digital sequences |
DE2247662B2 (en) * | 1972-09-28 | 1977-06-23 | Siemens AG, 1000 Berlin und 8000 München | PROCEDURE FOR SECURE DATA TRANSFER |
DE3006112C2 (en) * | 1980-02-19 | 1981-11-19 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Method for data transmission with error protection by means of parity bits |
JPS5783946A (en) * | 1980-11-13 | 1982-05-26 | Fujitsu Ltd | Input and output monitoring system |
-
1983
- 1983-12-17 DE DE19833345777 patent/DE3345777A1/en not_active Withdrawn
-
1984
- 1984-11-29 EP EP84114460A patent/EP0147658B1/en not_active Expired
- 1984-11-29 AT AT84114460T patent/ATE40623T1/en not_active IP Right Cessation
- 1984-11-29 DE DE8484114460T patent/DE3476620D1/en not_active Expired
- 1984-12-14 DK DK599984A patent/DK163396C/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DK599984A (en) | 1985-06-18 |
DE3476620D1 (en) | 1989-03-09 |
EP0147658A2 (en) | 1985-07-10 |
DK163396C (en) | 1992-07-13 |
DE3345777A1 (en) | 1985-06-27 |
ATE40623T1 (en) | 1989-02-15 |
DK599984D0 (en) | 1984-12-14 |
EP0147658B1 (en) | 1989-02-01 |
EP0147658A3 (en) | 1987-09-02 |
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PBP | Patent lapsed |