DK1168206T3 - Method for analyzing power loss in an electrical circuit - Google Patents

Method for analyzing power loss in an electrical circuit

Info

Publication number
DK1168206T3
DK1168206T3 DK01114916T DK01114916T DK1168206T3 DK 1168206 T3 DK1168206 T3 DK 1168206T3 DK 01114916 T DK01114916 T DK 01114916T DK 01114916 T DK01114916 T DK 01114916T DK 1168206 T3 DK1168206 T3 DK 1168206T3
Authority
DK
Denmark
Prior art keywords
electrical circuit
power loss
analyzing power
copy
protocol function
Prior art date
Application number
DK01114916T
Other languages
Danish (da)
Inventor
Lars Kruse
Original Assignee
Chipvision Design Systems Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipvision Design Systems Ag filed Critical Chipvision Design Systems Ag
Application granted granted Critical
Publication of DK1168206T3 publication Critical patent/DK1168206T3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/06—Power analysis or power optimisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Power Conversion In General (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Communication Control (AREA)
  • Control Or Security For Electrophotography (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

At least one copy is made from the original algorithm before introducing the protocol function(s). The protocol function(s) are introduced into this copy. Occasionally the original algorithm or its copy is used with the protocol function(s).
DK01114916T 2000-06-20 2001-06-20 Method for analyzing power loss in an electrical circuit DK1168206T3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10030349A DE10030349A1 (en) 2000-06-20 2000-06-20 Method for analyzing the power loss or the energy consumption of an electrical circuit or an electrical component
EP01114916A EP1168206B1 (en) 2000-06-20 2001-06-20 Process to analyse the power dissipation of an electric circuit

Publications (1)

Publication Number Publication Date
DK1168206T3 true DK1168206T3 (en) 2005-04-11

Family

ID=7646376

Family Applications (1)

Application Number Title Priority Date Filing Date
DK01114916T DK1168206T3 (en) 2000-06-20 2001-06-20 Method for analyzing power loss in an electrical circuit

Country Status (5)

Country Link
EP (1) EP1168206B1 (en)
AT (1) ATE284062T1 (en)
DE (2) DE10030349A1 (en)
DK (1) DK1168206T3 (en)
ES (1) ES2230207T3 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7398445B2 (en) 2002-08-09 2008-07-08 Synplicity, Inc. Method and system for debug and test using replicated logic
US6904576B2 (en) 2002-08-09 2005-06-07 Synplicity, Inc. Method and system for debugging using replicated logic
US7213216B2 (en) 2002-08-09 2007-05-01 Synplicity, Inc. Method and system for debugging using replicated logic and trigger logic
US7725848B2 (en) 2005-01-27 2010-05-25 Wolfgang Nebel Predictable design of low power systems by pre-implementation estimation and optimization

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5960198A (en) * 1997-03-19 1999-09-28 International Business Machines Corporation Software profiler with runtime control to enable and disable instrumented executable

Also Published As

Publication number Publication date
EP1168206B1 (en) 2004-12-01
ATE284062T1 (en) 2004-12-15
DE50104659D1 (en) 2005-01-05
EP1168206A3 (en) 2003-10-29
EP1168206A2 (en) 2002-01-02
DE10030349A1 (en) 2002-01-10
ES2230207T3 (en) 2005-05-01

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