DE8909027U1 - Carrier element with at least one integrated circuit, in particular for installation in chip cards - Google Patents
Carrier element with at least one integrated circuit, in particular for installation in chip cardsInfo
- Publication number
- DE8909027U1 DE8909027U1 DE8909027U DE8909027U DE8909027U1 DE 8909027 U1 DE8909027 U1 DE 8909027U1 DE 8909027 U DE8909027 U DE 8909027U DE 8909027 U DE8909027 U DE 8909027U DE 8909027 U1 DE8909027 U1 DE 8909027U1
- Authority
- DE
- Germany
- Prior art keywords
- element according
- ring
- support element
- stiffening ring
- carrier substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000009434 installation Methods 0.000 title claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 28
- 238000005452 bending Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 5
- 244000309464 bull Species 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 230000003014 reinforcing effect Effects 0.000 claims description 4
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 3
- 239000004593 Epoxy Substances 0.000 claims description 2
- 239000004642 Polyimide Substances 0.000 claims 1
- 229920000728 polyester Polymers 0.000 claims 1
- 229920001721 polyimide Polymers 0.000 claims 1
- 239000003351 stiffener Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 9
- 150000001875 compounds Chemical class 0.000 description 6
- 239000011888 foil Substances 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 238000005266 casting Methods 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- QFLWZFQWSBQYPS-AWRAUJHKSA-N (3S)-3-[[(2S)-2-[[(2S)-2-[5-[(3aS,6aR)-2-oxo-1,3,3a,4,6,6a-hexahydrothieno[3,4-d]imidazol-4-yl]pentanoylamino]-3-methylbutanoyl]amino]-3-(4-hydroxyphenyl)propanoyl]amino]-4-[1-bis(4-chlorophenoxy)phosphorylbutylamino]-4-oxobutanoic acid Chemical compound CCCC(NC(=O)[C@H](CC(O)=O)NC(=O)[C@H](Cc1ccc(O)cc1)NC(=O)[C@@H](NC(=O)CCCCC1SC[C@@H]2NC(=O)N[C@H]12)C(C)C)P(=O)(Oc1ccc(Cl)cc1)Oc1ccc(Cl)cc1 QFLWZFQWSBQYPS-AWRAUJHKSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000002787 reinforcement Effects 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000004927 clay Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005489 elastic deformation Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000011265 semifinished product Substances 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
- 239000004945 silicone rubber Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
- G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07718—Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/0772—Physical layout of the record carrier
- G06K19/07728—Physical layout of the record carrier the record carrier comprising means for protection against impact or bending, e.g. protective shells or stress-absorbing layers around the integrated circuit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H01L2924/01079—Gold [Au]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Credit Cards Or The Like (AREA)
Description
w 1· -w 1· -
Herr 22SC71025Mr 22SC71025
Edgar Schneider
8057 GünzenhausenEdgar Schneider
8057 Gunzenhausen
Trägerelement «it wenigstens einen integrierten Schaltkreis, insbesondere sas Einbau inCarrier element «with at least one integrated circuit, in particular for installation in
Die vorliegende Erfindung betrifft: ein Srägereleiaent suit wenigstens einem integriertem Schaltkreis bzw. Halbleiter-Chip, insbesondere für den Einbau in sogenannte Chip-Kartan.The present invention relates to a cutting element suit at least one integrated circuit or semiconductor chip, in particular for installation in so-called chip boxes.
Chip-Karten finden ixsro&r br^.tere Verwendung als Identffikations-, Kredit- oder Buchum: ^karten «r«i dergleichen, um die Herstellung dieser Karten rationell i^id kostengünstig zu gestalten, wird als TrägereleiEÄ&t vorzugsweise ein Halbfabrikat verwendet, bei dem auf einer mit Leiterbahnen versehenen flexible^ Trägerfolie ein oder mehrere integrierte Schaltkreise in *&Oacgr;&pgr;&eegr; von Halbleiter-Kristallen montiert sind. Die Kontaktierung der integrierten Schaltkreise bzw. Ha? Meiter-Chips mit entsprechenden Anschlußpunkten auf der flexiblen Träger folie geschieht üblicherweise eiktweutx mittele Bond-Verfahren (z.B. DE-OS 32 35 650) oder mittels Direktkon taktierungs-Verfahren (z.B. DE-AS 29 20 012). Bei der Kartenherstellung werden diese Trägerelemente in passend geformte Ausparungen des Kartenmaterials eingesetzt. Beim Vorpressen von Chipkartenlaminaten und Trägerelementen treten je nach verwendetem Verfahren Drücke bis zu 160 bar auf. Dabei werden die empfindlichen integrierten Schaltkreise bzw. Halbleiter-Chips häufig beschädigt. Auch die beim Gebrauch von Chip-Karten auftretenden Verbiegungen und daraus resultierende Biegekräfte können zu einer Beschädigung der HaIbleiter-Chips führen. Um derartige Beschädigungen zu vermeiden bzw. zu reduzieren, ist es beispielsweise aus der DE-OS 36 39 630 bekannt, den bereite mit dem Trägerelement verbundenen Halbleiter-Chip durch eine Schutzfolie aus einemChip cards are increasingly used as identification, credit or bookkeeping cards or the like. In order to make the production of these cards efficient and cost-effective, a semi-finished product is preferably used as the carrier element, in which one or more integrated circuits are mounted in layers of semiconductor crystals on a flexible carrier film provided with conductor tracks. The integrated circuits or chip chips are usually connected to corresponding connection points on the flexible carrier film using a bonding process (e.g. DE-OS 32 35 650) or a direct contacting process (e.g. DE-AS 29 20 012). During card production, these carrier elements are inserted into appropriately shaped recesses in the card material. When pre-pressing chip card laminates and carrier elements, pressures of up to 160 bar occur, depending on the process used. This often damages the sensitive integrated circuits or semiconductor chips. The bending that occurs when chip cards are used and the resulting bending forces can also lead to damage to the semiconductor chips. In order to avoid or reduce such damage, it is known, for example from DE-OS 36 39 630, to cover the semiconductor chip connected to the carrier element with a protective film made of a
a &lgr; 2 - a &lgr; 2 -
Material mit hohem elastischen Deformierungsvermögen abzudecken. Material with high elastic deformation capacity.
ff Durch die Verbiegungen beim Kartengebrauch kommt es auch im- ff Due to the bending during card use, it also occurs
p 5 mer wieder vor, daß an der Nahtstelle zwischen Halbleiter-p 5 It happens again and again that at the interface between semiconductor
f Chip und Kartenmaterial Risse auftreten und unter extremenf Chip and card material cracks may occur and under extreme
iff herausbricht. IM dies zu vermeiden ist es beispielsweise ausiff breaks out. To avoid this, it is necessary, for example,
der EP-A 0 211 360 bekannt zwischen Halbleiter-Chip und Kar-EP-A 0 211 360 known between semiconductor chip and card
% 10 tonmaterial eine dünne verstärkende Schicht, beispielsweise% 10 clay material a thin reinforcing layer, for example
f; aus einem dünnen Netzgeflecht, vorzusehen.f; made of a thin mesh.
Wenn die Halbleiter-Kristalle bzw. Halbleiter-Chips durch Bonden mit den entsprechenden Anscüilußpunkten auf der flexi-'■
15 blen Trägerfolie verbunden werden, werden die Bond-Drähte
und der Halbleiter-Chip üblicherweise mit einer Guß- bzw.
Abdeckmasse versehen. Diese Guß- oder Abdeckmasse schützt natürlich nicht nur die Bond-Drähte sondern auch den Halbleiter-Chip.
Um diese Gußmasse im flüssigen bzw. halbflüssigen Zustand gezielt aufbringen zu können, ist es beispielsweise
aus der DE-OS 32 35 650 bekannt, das Trägerelement mit einem dem Halbleiter-Chip samt Bond-Drähten umgebenden ring-
<J förmigen Begrenzungerahmen zu versehen. Dieser Begrenzungsring für die Abdeckmasse besteht üblicherweise aus Glacepoxy
oder PVC. Außer dem Auegießen dee Bereiche innerhalb dee - ringförmigen Begrenzungerahmene mit Epoxydharz oder Silikonkautschuk
weist die aus der DE-OS 32 35 650 bekannte Chip-Karte bzw. Trägeelement keinerlei weitere Vorkehrungen zum
Schutz des Halbleiter-Kristalls auf. Es besteht daher die Gefahr, daß beim Vorpressen der Trägere lernen te mit den Chipkartenlaminat
bzw. beim Gebrauch der fertigen Chip-Karte Beschädigungen des Halbleiter-Kristalls auftreten.When the semiconductor crystals or semiconductor chips are bonded to the corresponding connection points on the flexible carrier foil, the bond wires and the semiconductor chip are usually provided with a casting or covering compound. This casting or covering compound naturally protects not only the bond wires but also the semiconductor chip. In order to be able to apply this casting compound in a targeted manner in the liquid or semi-liquid state, it is known, for example from DE-OS 32 35 650, to provide the carrier element with a ring-shaped limiting frame surrounding the semiconductor chip including the bond wires. This limiting ring for the covering compound is usually made of epoxy or PVC. Apart from the casting of the areas within the ring-shaped boundary frame with epoxy resin or silicone rubber, the chip card or carrier element known from DE-OS 32 35 650 has no further provisions for
Protection of the semiconductor crystal. There is therefore a risk that damage to the semiconductor crystal may occur during pre-pressing of the carriers with the chip card laminate or during use of the finished chip card.
element für integrierte Sahaltkreiee sowie ein Verfahren zu dessen Herstellung und eine damit versehene Chip-Karte zuelement for integrated circuits and a method for its manufacture and a chip card provided with it
u 3· -u 3· -
schaffen, bei dem trotz rationeller und kostengünstiger Herstellung die empfindlichen Bauteile sehr gut gegen mechanische Belastungen geschützt sind.create a system in which, despite efficient and cost-effective production, the sensitive components are very well protected against mechanical stress.
Die Lösung dieser Aufgabe erfolgt durch die Merkmale des Anspruchs 1.This problem is solved by the features of claim 1.
Dadurch, daß der Versteifungsring eine wesentlich höhere bzw. größere Biegesteifigkeit aufweist als das flexible Trägersubstrat, d.h. der Versteifungsring im Vergleich zum Trägersubstrat völlig steif ist, können Biege- und Torsionsbeanspruchengen des Trägersubstrats nicht zur Beschädigung &agr; s in die Abdeckmasse eingegossenen und von dem Versteifungsring umschlossenen Halbleiterkristalls führen. Im Verbund mit dem flexiblen Trägersabstrat wiiict der Versteifungsring bei sämtlichen Biege- und Torsionsbeanspruchungen des Trägersubstrate oder einer Chip-Karte mit einem erfi.ndungsgemäßen Trägerelement als verwendungssteife Zelle und schützt dadurch den Halbleiter-Kristall vor mechanischen Beanspruchungen. Because the stiffening ring has a significantly higher or greater bending stiffness than the flexible carrier substrate, i.e. the stiffening ring is completely stiff compared to the carrier substrate, bending and torsional stresses on the carrier substrate cannot lead to damage to the semiconductor crystal cast into the covering compound and enclosed by the stiffening ring. In combination with the flexible carrier substrate, the stiffening ring acts as a rigid cell for all bending and torsional stresses on the carrier substrate or a chip card with a carrier element according to the invention, thereby protecting the semiconductor crystal from mechanical stresses.
Dadurch, daß der Versteifungsring eine höhere Biegesteifigkeit als herkömmliche Chip-Karten aufweist, werden sowohl bei der Chip-Karten-Herstellung als auch beim Kartengebrauch auftretende Druck- und Scherkräfte im wesentlichen von dem Versteifungsring aufgenommen und somit vom Halbleiter-Chip ferngehalten.Because the stiffening ring has a higher bending stiffness than conventional chip cards, the pressure and shear forces that occur both during chip card production and during card use are essentially absorbed by the stiffening ring and thus kept away from the semiconductor chip.
Die Biegesteifigkeit eines Körpers wird im wesentlichen durch seine geometrische Form und das Material bzw. genauer durch den Elastizitätsmodul des Materials bestimmt. Die ideale Form für den Verstärkungsring ist kreisringförmig, da dann die angreifenden Kräfte opotimal von dem Verstärkungsring aufgenommen werden. IM in jedem Falle eine genügend hohe Biegesteifigkeit des Versteifungsringes zu gewährlei-The bending stiffness of a body is essentially determined by its geometric shape and the material, or more precisely by the elastic modulus of the material. The ideal shape for the reinforcement ring is circular, as the forces acting on it are then optimally absorbed by the reinforcement ring. In any case, a sufficiently high bending stiffness of the stiffening ring must be ensured.
»•ti»•ti
sten, wj.rd bei einer bevorzugten Ausführungsform Material mit einem Elastizitätsmodul von über 500 N/mm2 verwendet.sten, wj.rd in a preferred embodiment material with a modulus of elasticity of more than 500 N/mm 2 is used.
Eine genügend hohe Biegesteifigkeit kann durch die Verwendung von geeigneten Metallen bzw. Metall-Legierungen gewährleistet werden. Darüberhinaus weisen Metalle noch den Vorteil auf, daß sie druckunempfindlich und unempfindlich gegenüber den bei der Kartenherstellung auftretenden Temperaturen sind. Dsrübsrhinsus ist Metall fertigungstechnisch leicht zu handhaben. Als bevorzugte Materialen werden für den Ring die Legierungen CuSn6, 195 HV (HV = Härte nach Vikers) oder CrNi 17/7, 220 HV verwendet.A sufficiently high bending stiffness can be ensured by using suitable metals or metal alloys. Metals also have the advantage of being insensitive to pressure and temperatures that occur during card production. In addition, metal is easy to handle in terms of manufacturing. The preferred materials for the ring are the alloys CuSn6, 195 HV (HV = Vikers hardness) or CrNi 17/7, 220 HV.
Da der Versteifungering gemäß der vorliegenden Erfindung natUrlich nach wie vor auch die Funktion eines Begrenzungsrahmens für die Abdeckmasse erfüllt sind damit keinerlei fertigungstechnische Nachteile bzw. Mehraufwand verbunden. Wird der Versteifungsring zusätzlich mit Marken für optische Erkennungssysteme, z.B. von Handhabungsautomaten und Bondmaschinen, versehen, wird zum einen die vollautomatische Positionierung des Versteifungsringes auf der flexiblen Trägerfolie erleichtert bzw. ermöglicht und zum anderen dienen diese Marken bzw. Markierungen auch der Positionierung von vollautomatischen Bond-Maschinen bzw. Bond-Automaten. Diese Marken für optische Erkennungssysteme können beispielsweise in Form von in das Innere des Ringes vorspringende Zapfen ausgeführt sein.Since the stiffening ring according to the present invention naturally still fulfills the function of a limiting frame for the covering compound, there are no manufacturing disadvantages or additional costs associated with it. If the stiffening ring is additionally provided with marks for optical recognition systems, e.g. of handling machines and bonding machines, on the one hand the fully automatic positioning of the stiffening ring on the flexible carrier film is made easier or possible and on the other hand these marks or markings also serve to position fully automatic bonding machines or bonding machines. These marks for optical recognition systems can, for example, be designed in the form of pins protruding into the interior of the ring.
Weitere Einzelheiten, Aspekte und Vorteile der vorliegenden Erfindung ergeben sich aus der nachfolgenden Beschreibung unter Bezugnahme auf die Zeichnungen.Further details, aspects and advantages of the present invention will become apparent from the following description with reference to the drawings.
-83- zeigt:-83- shows:
Fig. 1 Eine Schnittansicht einer bevorzugten Ausführungsform des Trägerelements mit IC;Fig. 1 A sectional view of a preferred embodiment of the carrier element with IC;
Fig. 2 eine Aufsicht auf die Ausführungsform nach Fig. 1;Fig. 2 is a plan view of the embodiment according to Fig. 1;
gerelement nach Fig. 1.ger element according to Fig. 1.
Das erfindungsgemäße Trägerelement 1 weist ein flexibles Trägersubstrat in Form einer flexiblen Trägerfolie 2 auf, auf der ein- oder beidseitig nicht dargestellte Leiterbahnen vorgesehen sind. Diese Leiterbahnen stellen elektrische Verbindungen zwischen Kontaktflächen 4 und Anschlußpunkten 6 her. Über die Anschlußpunkte 6 wird mittels aufgebondeten Golddrähten 3 der elektrische Kontakt zu einem integrierten Schaltkreis bzw. Halbleiter-Chip 7 hergestellt. Über die Kontaktflächen 4 wird später beim Gebrauch der fertiggestellten Chip-Karte der Kontakt zu dem Halbleiter-Chip 7 hergestellt. In dem Trägerelement 1 nach Fig. 1 liegen die Kontaktflächen 4 auf der einen Seite der flexiblen Trägerfolie 2 und die Anschlußpunkte 6 auf der anderen Seite der flexiblen Trägerfolie. Auf der Seite mit den Anschlußpunkten 6 ist auch der Halbleiter-Chip bzw. -Kristall 7 auf der Trägerfolie 2 angeordnet. Auf dieser Seite der flexiblen u'rägerfolie ist auch ein den Halbleiter-Chip bzw. Halbleiterkristall 7 umschließender Vereteifungsring 8 befestigt. Der Versteifungsring 8 besteht aus der Metall-Legierung CuSn6 mit einer Härte von 195 HV. Die wesentlichen mechanischen Eigenschaften dieses Materials sind der nachfolgenden Tabelle zu entnehmen.The carrier element 1 according to the invention has a flexible carrier substrate in the form of a flexible carrier film 2, on which conductor tracks (not shown) are provided on one or both sides. These conductor tracks establish electrical connections between contact surfaces 4 and connection points 6. The electrical contact to an integrated circuit or semiconductor chip 7 is established via the connection points 6 by means of bonded gold wires 3. The contact surfaces 4 are later used to establish contact with the semiconductor chip 7 when the finished chip card is used. In the carrier element 1 according to Fig. 1, the contact surfaces 4 are on one side of the flexible carrier film 2 and the connection points 6 are on the other side of the flexible carrier film. The semiconductor chip or crystal 7 is also arranged on the carrier film 2 on the side with the connection points 6. On this side of the flexible carrier foil, a reinforcing ring 8 is also attached, which encloses the semiconductor chip or semiconductor crystal 7. The reinforcing ring 8 is made of the metal alloy CuSn6 with a hardness of 195 HV. The essential mechanical properties of this material can be found in the following table.
1#- &bgr; - 1# - β -
CuSn6CuSn6
harrharr
federhartspring hard
doppelfederhartdouble spring hard
1515
in N/mm2 Tensile strength R n
in N/ mm2
Rp 0,2
in N/mm2 0.2% proof stress
Rp0.2
in N/ mm2
A5 % min.
A1Q % min.Elongation at break
A 5 % min.
A 1 Q % min.
1520
15
810
8th
grenze RpB
in N/mm2 mind.350
in N/mm2 mind.370Spring bending
limit Rp B
in N/mm 2 min.350
in N/mm 2 min.370
25 30 3525 30 35
Der Versteifungsring 8 und der Halbleiterkristall 7 sind mittels einer Klebeschicht 10 auf der flexiblen Trägerfolie 2 befestigt. Das Innere des Versteifungsringes (8) ist mit einer Abdeckmasse 11 ausgefüllt, so daß die- F>,ibleiter-Kristalle 7 samt Golddrähten 3 von der Abdeckmasse 11 schützend umgeben sind.The stiffening ring 8 and the semiconductor crystal 7 are attached to the flexible carrier foil 2 by means of an adhesive layer 10. The interior of the stiffening ring (8) is filled with a covering compound 11, so that the semiconductor crystals 7 together with the gold wires 3 are protectively surrounded by the covering compound 11.
Fig. 2 zeigt das Trägerelement 1 von Fig. 1 von oben. Der Versteifungsring 8 weist eine Dicke von ca. 0,4 mm auf und kann somit ohne weiteres in Chip-Karten mit einer Norrodicke von 0,76 mm (ISO-Norm) integriert werden. Der Versteifungsring 8 i.rt in seiner Grundform kreisringförmig mit einem in- Fig. 2 shows the carrier element 1 of Fig. 1 from above. The stiffening ring 8 has a thickness of approx. 0.4 mm and can therefore be easily integrated into chip cards with a standard thickness of 0.76 mm (ISO standard). The stiffening ring 8 is circular in its basic form with an inner
neren Durchmesser von Rl - 4,5 mm und einem äußeren Durchmesser von R2 = 6,0 mm. Der Versteifungsring 8 weist auf seiner Außenseite zwei einander gegenüberliegende gerade Bereiche 12 und 13 auf. Die geraden Bereiche 12 und 13 ermögliehen bzw. erleichtern die Orientierung des Versteifungsrings 8 auf der Trägerfolie 2, da sie als Harken bzw* Markierungen für optische Erkennungsysteme von Handhabungsautomaten dienen. Der Außendurchmesser da des Versteifungsringes 8 gemessen an diesen geraden Bereichen 12 und 13 beträgt ca.ner diameter of Rl - 4.5 mm and an outer diameter of R2 = 6.0 mm. The stiffening ring 8 has two opposing straight areas 12 and 13 on its outside. The straight areas 12 and 13 enable or facilitate the orientation of the stiffening ring 8 on the carrier film 2, as they serve as rakes or markings for optical recognition systems of handling machines. The outer diameter da of the stiffening ring 8 measured at these straight areas 12 and 13 is approx.
10,4 mm, der Innendurchmesser Di des Versteifungsringes beträgt an diesen Stellen 8,4 mm. Auf der Innenseite des Versteifungsringes 8, den geraden Bereichen 12 und 13 gegenüberliegend, sind ebenfalls Marken für optische Erkennungssysteme in Form von rechteckförmigen Vorsprüngen 14 und 15 vorgesehen. Die Vorsprünge 14 und 15 dienen in erster Linie zur Orientierung von vollautomatischen Bond-Maschinen. Zusätzlich erhöhen die Vorsprünge 14 und 15 auch die Stabilität des in den geraden Bereichen 12 und 13 schmäleren Versteif ungsrings 8. Das Außenmaß da ist durch die ISO-Norm vorgegeben. Die Tiefe T dieser Vorsprünge beträgt dabei ca 0,5 mm und ihre Breite B ca. 1,4 mm. Die Form des Versteifungeringes 8 gemäß Fig. 2 weist zum einen eine genügend hohe Biegesteifigkeit auf und zum anderen ist diese Form für den Einsatz in Chip-Karten nach ISO-Norm optimiert.10.4 mm, the inner diameter Di of the stiffening ring is 8.4 mm at these points. On the inside of the stiffening ring 8, opposite the straight areas 12 and 13, marks for optical recognition systems in the form of rectangular projections 14 and 15 are also provided. The projections 14 and 15 are primarily used for the orientation of fully automatic bonding machines. In addition, the projections 14 and 15 also increase the stability of the stiffening ring 8, which is narrower in the straight areas 12 and 13. The external dimension da is specified by the ISO standard. The depth T of these projections is approx. 0.5 mm and their width B approx. 1.4 mm. The shape of the stiffening ring 8 according to Fig. 2 has a sufficiently high bending stiffness and this shape is also optimized for use in chip cards according to the ISO standard.
In dem Ver &bgr; tei fungering 8 gemäß Fig. 2 lassen sich Halbleiter-Chips bis zu einer Grundfläche bis zu 5,7 &khgr; 5,7 mm einsetzen. Das Vorsehen von Marken für optische Erkennungesysteme erlaubt eine rationelle Fertigung der Trägerelement mit hohen Stückzahlen.Semiconductor chips with a base area of up to 5.7 x 5.7 mm can be used in the distribution ring 8 according to Fig. 2. The provision of marks for optical recognition systems allows efficient production of the carrier element in large quantities.
Fig. 3 zeigt eine Schnittansicht einer erfindungsgemäßen Chip-Karte 36 mit einem Trägerelement 1, auf dem der integrierte Schaltkreis 7 aufgeklebt ist. Das Trägerelement 1 mit Halbleiter-Chip 7 ist in eine entsprechende Auesperrung 38 der Chip-Karte 36 eingebettet. Die Oberseite des Versteifungerings 8 wird von einer Abdeckschicht 40, die Teil dexFig. 3 shows a sectional view of a chip card 36 according to the invention with a carrier element 1, on which the integrated circuit 7 is glued. The carrier element 1 with semiconductor chip 7 is embedded in a corresponding opening 38 of the chip card 36. The top of the stiffening ring 8 is covered by a cover layer 40, which is part of the
Chip-Karte 36 ist, überze gen. Die Unterseite des Trägerelements 1 bzw. der Trägerfolie 2 fluchtet mit einer Seite der Chip-Karte 36, so daß die Kontaktflächen 4 von dieser Seite der Chip-Karte 36 zugänglich sind. Als Alternative hierzu kann in nicht näher dargestellter Weise jedoch auch diese Seit© UBS Trägsär@les&©jy£s I alt der Tr&gerfolie 2 von einer dünnen Abdackschicht Überzogen sein, die lediglich die Kontaktflächen 4 frei zugänglich läßt. In diesem Falle wäre as* Trägerelement 1 mit. £felbleiter~Chip 7 gandviuhartig in di® Chip-Karte 36 eingefügt.The underside of the carrier element 1 or the carrier foil 2 is flush with one side of the chip card 36, so that the contact surfaces 4 are accessible from this side of the chip card 36. As an alternative to this, however, this side of the carrier foil 2 can also be covered by a thin covering layer in a manner not shown in detail, which only leaves the contact surfaces 4 freely accessible. In this case, the carrier element 1 with the field conductor chip 7 would be inserted into the chip card 36 in a manner similar to that shown in FIG.
Das vorstehend beschriebene Trägerelement nach Fig. 1 ist insbesondere für den Einbau in Chip-Karten nach ISO-Norm geeignet und ausgelegt. Die erfindungsgemäßen Trägerelemente lassen sich natürlich auch in andere Schaltungen und Vorrichtung einbauen, die mechanischen Beanspruchungen ausgesetzt sind.The carrier element described above according to Fig. 1 is particularly suitable and designed for installation in chip cards according to ISO standards. The carrier elements according to the invention can of course also be installed in other circuits and devices that are exposed to mechanical stress.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE8909027U DE8909027U1 (en) | 1989-07-24 | 1989-07-25 | Carrier element with at least one integrated circuit, in particular for installation in chip cards |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3924439A DE3924439A1 (en) | 1989-07-24 | 1989-07-24 | CARRIER ELEMENT WITH AT LEAST ONE INTEGRATED CIRCUIT, ESPECIALLY FOR INSTALLATION IN CHIP CARDS, AND METHOD FOR THE PRODUCTION OF THESE CARRIER ELEMENTS |
DE8909027U DE8909027U1 (en) | 1989-07-24 | 1989-07-25 | Carrier element with at least one integrated circuit, in particular for installation in chip cards |
Publications (1)
Publication Number | Publication Date |
---|---|
DE8909027U1 true DE8909027U1 (en) | 1990-02-01 |
Family
ID=25883312
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8909027U Expired - Lifetime DE8909027U1 (en) | 1989-07-24 | 1989-07-25 | Carrier element with at least one integrated circuit, in particular for installation in chip cards |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE8909027U1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE9100665U1 (en) * | 1991-01-21 | 1992-07-16 | TELBUS Gesellschaft für elektronische Kommunikations-Systeme mbH, 85391 Allershausen | Carrier element for integrated semiconductor circuits, especially for installation in chip cards |
DE4105869A1 (en) * | 1991-02-25 | 1992-08-27 | Edgar Schneider | IC card suitable for contactless reading systems - has layers contg. integrated circuit carrier foil with conductor network, spiral inductor loops and contact surfaces mounted on one side without crossings |
DE4337921A1 (en) * | 1993-11-06 | 1995-05-11 | Manfred Dr Michalk | Contactless chip card having an antenna coil and method for its production |
-
1989
- 1989-07-25 DE DE8909027U patent/DE8909027U1/en not_active Expired - Lifetime
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE9100665U1 (en) * | 1991-01-21 | 1992-07-16 | TELBUS Gesellschaft für elektronische Kommunikations-Systeme mbH, 85391 Allershausen | Carrier element for integrated semiconductor circuits, especially for installation in chip cards |
DE4105869A1 (en) * | 1991-02-25 | 1992-08-27 | Edgar Schneider | IC card suitable for contactless reading systems - has layers contg. integrated circuit carrier foil with conductor network, spiral inductor loops and contact surfaces mounted on one side without crossings |
DE4105869C2 (en) * | 1991-02-25 | 2000-05-18 | Edgar Schneider | IC card and method of making it |
DE4337921A1 (en) * | 1993-11-06 | 1995-05-11 | Manfred Dr Michalk | Contactless chip card having an antenna coil and method for its production |
DE4337921C2 (en) * | 1993-11-06 | 1998-09-03 | Ods Gmbh & Co Kg | Contactless chip card with antenna coil |
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