DE69905833D1 - Hochgeschwindigkeitsmultiplizierer - Google Patents

Hochgeschwindigkeitsmultiplizierer

Info

Publication number
DE69905833D1
DE69905833D1 DE69905833T DE69905833T DE69905833D1 DE 69905833 D1 DE69905833 D1 DE 69905833D1 DE 69905833 T DE69905833 T DE 69905833T DE 69905833 T DE69905833 T DE 69905833T DE 69905833 D1 DE69905833 D1 DE 69905833D1
Authority
DE
Germany
Prior art keywords
speed multiplier
multiplier
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69905833T
Other languages
English (en)
Other versions
DE69905833T2 (de
Inventor
Thi N Nguyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69905833D1 publication Critical patent/DE69905833D1/de
Publication of DE69905833T2 publication Critical patent/DE69905833T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69905833T 1998-09-30 1999-09-28 Hochgeschwindigkeitsmultiplizierer Expired - Fee Related DE69905833T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/164,027 US6298369B1 (en) 1998-09-30 1998-09-30 High speed multiplier

Publications (2)

Publication Number Publication Date
DE69905833D1 true DE69905833D1 (de) 2003-04-17
DE69905833T2 DE69905833T2 (de) 2003-12-04

Family

ID=22592660

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69905833T Expired - Fee Related DE69905833T2 (de) 1998-09-30 1999-09-28 Hochgeschwindigkeitsmultiplizierer

Country Status (4)

Country Link
US (1) US6298369B1 (de)
EP (1) EP0990981B1 (de)
JP (1) JP2000112714A (de)
DE (1) DE69905833T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6507629B1 (en) * 1998-04-07 2003-01-14 Sony Corporation Address generator, interleave unit, deinterleave unit, and transmission unit
US6480874B1 (en) * 1999-11-09 2002-11-12 Motorola, Inc. Power saving method for performing additions and subtractions and a device thereof
US6542963B2 (en) * 2001-01-10 2003-04-01 Samsung Electronics Co., Ltd. Partial match partial output cache for computer arithmetic operations
US7296049B2 (en) * 2002-03-22 2007-11-13 Intel Corporation Fast multiplication circuits
US8364670B2 (en) 2004-12-28 2013-01-29 Dt Labs, Llc System, method and apparatus for electronically searching for an item
US9900314B2 (en) 2013-03-15 2018-02-20 Dt Labs, Llc System, method and apparatus for increasing website relevance while protecting privacy
US10120650B2 (en) 2014-09-30 2018-11-06 Samsung Electronics Co., Ltd. Method and apparatus for calculating data
KR102315278B1 (ko) * 2014-09-30 2021-10-21 삼성전자 주식회사 데이터를 연산하는 방법 및 장치.
US9678749B2 (en) * 2014-12-22 2017-06-13 Intel Corporation Instruction and logic for shift-sum multiplier

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2108736B (en) * 1981-10-27 1984-12-12 Standard Telephones Cables Ltd Sum of products multiplier
JPS5932216A (ja) 1982-08-17 1984-02-21 Sony Corp ディジタル信号処理回路及びディジタルフィルタ
GB8529422D0 (en) 1985-11-29 1986-01-08 British Broadcasting Corp Integrated circuits
US4864529A (en) 1986-10-09 1989-09-05 North American Philips Corporation Fast multiplier architecture
US5117385A (en) * 1990-03-16 1992-05-26 International Business Machines Corporation Table lookup multiplier with digital filter
JPH04165530A (ja) 1990-10-30 1992-06-11 Nec Corp 浮動小数点乗算装置
US5255216A (en) * 1991-08-16 1993-10-19 International Business Machines Corporation Reduced hardware look up table multiplier
US5260898A (en) * 1992-03-13 1993-11-09 Sun Microsystems, Inc. Result cache for complex arithmetic units
US5828591A (en) 1992-11-02 1998-10-27 Intel Corporation Method and apparatus for using a cache memory to store and retrieve intermediate and final results
US5343416A (en) 1992-11-02 1994-08-30 Intel Corporation Method and apparatus for re-configuring a partial product reduction tree
US5715187A (en) * 1996-03-04 1998-02-03 Holtek Microelectronics, Inc. Method and apparatus for integer multiplication

Also Published As

Publication number Publication date
EP0990981A3 (de) 2001-03-07
EP0990981A2 (de) 2000-04-05
EP0990981B1 (de) 2003-03-12
JP2000112714A (ja) 2000-04-21
DE69905833T2 (de) 2003-12-04
US6298369B1 (en) 2001-10-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee