DE69734086T2 - Data transmission rate control device with transmission control scheme for subchannels forming an entire channel - Google Patents

Description

BACKGROUND THE INVENTION

Territory of invention

The The invention relates to a data rate control method and system based on cell transfer switches, such as ATM (Asynchronous Transfer Mode) switching devices, ATM router, ATM bridges or use other telecommunications equipment.

technical background

nowadays become mainly The following three methods are used to set the transmission rate of a specified length of Control data (hereafter referred to as cell): the two minimum inter-cell distances or cell interval control schemes or methods that are one cell period of time based scheme and a clock period based scheme include; and the sliding window control scheme. In the following, the two minimum cell interval control schemes is distinguished from each other by the cell duration based minimum cell interval control scheme cell-based minimum intercell spacing control scheme, however, the cycle time based minimum cell interval control scheme is called called a clock-based minimum cell interval control scheme.

When First becomes the cell-based minimum cell interval control scheme described. The scheme controls the distance or time interval between the previous one transmitted Cell and the moment transferred Cell based on the cell transmission period. Accordingly, when the target transmission rate for example, 50% of the peak rate, the transmission at two cell intervals executed.

Secondly the clock-based minimum cell interval control scheme is essentially the same as the cell-based minimum cell interval control scheme. However, the clock-based scheme uses the cycle time instead the cell period, the interval between two consecutively transmitted Timing cells. This allows a more accurate peak rate control.

on the other hand The sliding window control scheme makes a decision as to whether the transfer of a Cell may or may not be at a particular cell time by having a time window of predetermined length at each cell interval is moved. A transmission the current cell is allowed if the number of cells in the time window already transferred were less than an acceptable number.

In particular, reference is made to 7 which represents the sliding window control scheme for controlling the transmission rate at 40% of the peak rate. In the figure, when a cell is transmitted in a period of time #n-3, the total number of cells in the time window reaches five, exceeding the allowable number, four. Therefore, the transmission of the cell is prevented at this time as shown by a mark "X". At the next #n-2 period, the transmission of a cell is allowed, as shown by a circle, since the total number of cells in the time window is within the allowable number, four, even if it is transmitted, by one by shifting the time window single cell period, the total number was decreased by one. Similar processing is repeated iteratively at the periods #n-1, #n, and so on.

The However, the control schemes described above have the following problems on. First, there is the cell-based minimum cell interval control scheme the transferability the cells based on the cell duration, the problem lem, that distances or intervals between controllable values at high rates roughly (especially in a range close to the peak rate). For example is the controllable value is 100% for each cell interval, 50% for two Cell intervals, 33% at three cell intervals, 25% at four Cell intervals, 20% at five Cell interval, etc. Thus, the controllable values have with increasing transmission rate larger spaces.

There Furthermore the cell based minimal cell interval control scheme in time division multiplex mode every channel checks, takes its accuracy decreases with increasing number of channels. Take, for example that the number of channels 1,024 that a review of a Channel per clock period and that one cell period 53 cycle times, about 20 cell periods are needed to complete all cells, what time errors in the transmission control can cause.

Second, even though the clock-based minimum cell interval control scheme can solve the controllable gap problem of the cell-based minimum cell interval control scheme, it raises a new problem in that it has a smaller cell cell-based control scheme compared to the cell-based an increase in the circuit size is unavoidable. This is because the number of bits needed to control the transmission enable time is minimum clock-based tervall control method is increased: A 6-bit magnification is required if 1 byte is processed during a clock period. For example, if the bandwidth is limited to 1% of the peak rate bandwidth, the transmission must be performed once per 100 cells. To accomplish this, even though the cell-based minimum cell interval control scheme requires a number of 6 bits, the clock-based minimum cell interval control scheme requires twice that, 12 bits, thereby inevitably reducing the number of bits of its control components, such as counter, Adder and comparator is doubled.

And after all There is a problem with the sliding window control scheme that with the decrease of the minimum value of the controllable value the width of the shift register increases. Even if, for example, at a Minimum value of 10% the minimum required window width only 10, it increases for example, to 100 for 1%, and 10,000 for 0.01%. Because the sliding window control scheme a shift register is needed whose register stages must correspond to the width of the time window as the minimum value decreases, a shift register of increasing number of bits to be provided.

The needed per shift register stage Number of bits depends from the channel identifier and amounts to 24 bits for the VPI / VCI of an ATM cell. Therefore, if the transfer rate of a particular channel is 0.01% of the peak rate, four 320 kbit flip flops needed, which is a problem insofar as it is difficult to do such a thing Implement system through hardware.

There is also even if it is the cell based minimum cell interval control scheme or the clock-based minimum cell interval control scheme is possible independently from the bandwidth a transmission always at a fixed rate (speed) to perform since the transmission interval between the previous cell and the current cell is checked, in the sliding window control scheme, which over the transferability in accordance decides with the number of cells in the time window and thus at decreasing bandwidth of the channel requires a wide window of opportunity Problem that the fluctuations of the cells in the time window with decreasing Bandwidth increase.

CONTENT OF INVENTION

Therefore It is an object of the invention to provide a data rate control method and system, which control rates of control transfer can that data for a multiplex transmission over channels with the suitable transmission rates the respective channels are transmitted.

In accordance With a first aspect of the invention, there is provided a data transfer rate control method provided comprising the steps of: controlling Data supplied to multiplex transmission channels such that data on each of the channels with one for the channel transfer suitable transmission rate become; Divide a total band by at least one threshold in subbands; and selecting a transmission control scheme for each of the channels in accordance with the subband to which the for the channel is suitable transmission rate.

in this connection is the number of at least one threshold one and that for transmitting Data used transmission control scheme apply a cycle-time based scheme to the subband which a larger bandwidth than the threshold has a cell duration based scheme apply to the subband that has a narrower bandwidth than that Threshold has.

The Number of at least one threshold may be one and that to transfer data transfer scheme used by data can be a sliding window scheme apply to the subband that has a larger bandwidth than the threshold and apply a cell-time based scheme to the subband which has a narrower bandwidth than the threshold.

In accordance A second aspect of the invention is a data rate control system which controls data supplied to multiplex transmission channels, such that data on each of the channels with one for the channel transfer suitable transmission rate the system comprising: a tape identification device, by which a determination of a subband takes place, to which the for each Channel suitable transmission rate belongs, and which on each of the channels attach an identifier corresponding to the result of the determination, wherein a total band is divided by at least one threshold into subbands a plurality of controllers associated with each of the subbands and the data transfer Taxes; and a device containing one of the control devices selects which the data transmission on a channel in accordance controls with the identifier attached to the channel.

In this case, the number of the at least one threshold value can be one and the control devices can be a first control circuit which applies a clock period based scheme to the subband having a greater bandwidth than the threshold, and a second control circuit which applies a cell duration based scheme to the subband having a narrower bandwidth than the threshold.

The Number of at least one threshold may be one and the control devices can include a first control circuit, which is a sliding window scheme applies to the subband that has a larger bandwidth than the threshold has, and a second control circuit, which a cell period based scheme applies to that subband, which is a narrower Bandwidth as the threshold.

In accordance with the data transfer rate control method and system according to the invention the entire band is divided into a plurality of subbands, so that a for each Subband suitable transmission control scheme is used. Thus, you can the data over transmit a respective channel by means of a control scheme be that for the transmission bandwidth this channel is suitable. This makes a control for each channel the data transmission with big ones Accuracy possible, even if the channels are over one wide transmission band extend.

SHORT DESCRIPTION THE DRAWINGS

The Objects and features of the invention will become apparent from the following detailed Description in conjunction with the attached drawings clearer which show:

1 Fig. 10 is a schematic block diagram showing the overall configuration of a first embodiment of a data transfer rate control system in accordance with the invention;

2 Fig. 10 is a schematic block diagram showing a cell-based minimum cell interval control means included in the first embodiment;

3 Fig. 10 is a schematic block diagram showing a clock-based minimum cell interval control means included in the first embodiment;

4 Fig. 12 is a schematic diagram useful in a rough understanding of the function of managing a simultaneous queue table FIFO memory by a state manager;

5 a schematic block diagram showing the overall configuration of a second embodiment of a data transmission rate control system in accordance with the invention;

6 FIG. 10 is a schematic block diagram showing a sliding window controller included in the second embodiment; FIG.

7 a schematic diagram that is used to understand the concept of sliding window control scheme.

DESCRIPTION THE PREFERRED EMBODIMENTS

following the invention will be described with reference to the accompanying drawings.

EMBODIMENT 1

The first embodiment the data transfer rate control system in accordance with of the invention, which will be described below, is a Cell rate control system in telecommunications equipment from Cell transfer type applied. This embodiment is designed to put the controlled band in an upper and a lower one Subdivide band so that the control scheme in accordance changed with the band like that will that transfer time out the one belonging to the upper band Input cells through the clock-based minimum cell interval control scheme is controlled, however, the transmission timing the one belonging to the lower band Input cells through the cell-based minimum cell interval control scheme is controlled.

Regarding 1 , which shows in a block diagram the cell rate control system associated with the first embodiment, the cell rate control system includes substantially four functional blocks: a clock-based minimum cell interval control means 31 ; a cell-based minimum cell interval controller 32 ; a channel information memory 33 ; and a conflict control device 34 ,

Cell-based minimal cell interval control 32 is adapted to control the cell rate using the cell-based minimum cell interval control scheme. 2 shows the cell-based minimum cell interval control 32 , It contains a reference counting device 1 , which operates as an infinite counter, at each cell time-out signal 101 performs an incremental increase. When a cell is transferred, an adder adds 2 to a count A in the reference counter 1 a peak rate value 115 which is associated with a channel over which the cell is transmitted. The result A + B of this ad dition is a cell transfer enable time for the next transfer and is stored in a special memory location 3 written which is assigned to each channel. The location is through an R / W (read / write) circuit 5 under the control of a flow control device 4 addressed. The flow control device 4 manages allocating the times to check the channels in a time division multiplex mode. This is because a verification circuit would increase the circuit size if it were to be provided for each channel.

The cell transfer release time, thus in a special location of the memory 3 is described from this by the R / W circuit 5 read sequentially, which the read command 103 from the flow control device 4 receives, and in turn becomes a comparator 6 fed. The comparator 6 decides whether to enable the transmission by placing one in the reference counter 1 contained count value (current time) A with the from the memory 3 read cell transfer enable time B compares.

When this count value A exceeds the cell transfer enable time B, a transfer enable signal becomes a decision result hold flip-flop 7 via an AND gate 32A supplied when this is released. The AND gate 32A is configured to AND-process the transmission enable signal A> B with an inverted signal of a control scheme select bit 105 to select the cell-based minimum cell interval control scheme when the selection bit 105 is at its low level. There are M decision result hold flip-flops 7 , where M denotes the number of channels, and one of them is selected to be the transmission enable signal 107 responding to one of the drain manager 4 supplied signal 109 to obtain.

The output variables 111 the decision result hold flip-flop 7 become a conflict control circuit 8th so that channels that conflict with the H level in conjunction with the outputs are fed through the conflict control device 8th to be controlled. The information concerning the channel "winning" the conflict takes the form of channel information representing the released channel 113 output. The decision result hold flip-flop 7 which is in communication with the enabled channel is reset and the output A + B of the adder 2 is set as the next transmission enable time by the R / W circuit 5 in the store 3 written.

Thus, the cell based minimum cell interval control controls 32 the transmission timing of the cells based on the channel information memory 33 supplied peak rate value 115 and the transfer enable channel information that wins the conflict is issued by the conflict control device 34 fed. The information 113 concerning the channel which determines the conflict in the cell-based minimum cell interval controller 32 wins, becomes the conflict control device 34 supplied as the transmission enable channel information for the lower band, to be supplied to the final conflict control.

3 shows a block diagram of the clock-based minimum cell interval controller 31 , In the figure, a reference counter is 11 also an infinite counter which outputs each clock pulse of a clock signal 121 counts. The output A of the reference counter 11 becomes in the transmission of a cell by an adder 12 to the peak rate 115 added to the channel, over which this cell is transmitted. The result A + B of the addition is stored in a special memory location 13 written as data representing a next transmission enable time.

A flow control device 14 is designed to manage the assigning of times for checking channels. An R / W (read / write) circuit 15 which is a read command 123 from the flow control device 14 receives, causes the memory 13 , the next transmission release time data 125 of the channel to be checked. Although the cell-based minimum cell interval control scheme compares the next transmission enable time with a count value held at the reference counter in the reference counter, the clock-based minimum cell interval control scheme corrects the time as follows because the count value of the reference counter 11 is increased incrementally during the period from verification to actual transmission of the cell.

In particular, the next transmission release time becomes 125 through a comparator 18 with a transfer estimation time 127 compared by an adder 16 and a hold flip-flop 17 is generated at each cell time duration signal 101 increased by one. For example, in the illustrated embodiment, each cell period of the signal is one 101 out of 53 clock periods of the signal 121 , where by a single clock pulse, a data amount of 1 byte is forwarded.

If the reference counter 127 the next transmission release time 125 in the comparator 18 exceeds, then a transmission enable signal A> B a decision result Hal th flip-flop 19 via an AND gate circuit 31A supplied when it is released to be held in this. The AND gate circuit 31A is configured to AND the transmission enable signal A> B with a control scheme selection bit 105 to select the clock-based minimum cell interval control scheme when the select bit 105 located at its high level.

There are M decision result hold flip-flops 19 and one of them is selected to set the transmission enable signal A> B in response to one of the timing controller 14 supplied signal 129 to keep. For the channels, which are related to the H-level outputs 131 the decision result hold flip-flop 19 If there is a conflict control by a conflict circuit 20 , and the decision result hold flip-flop 19 of the channel "winning" the conflict is reset, and thus its channel information becomes "transmission enable". In addition, the output becomes 135 the adder 12 controlled by the R / W circuit 15 , as next transfer enable time data in the memory 13 written.

Thus, the clock-based minimum cell interval control circuit controls 31 the transmission time based on the peak rate 115 that of the channel information storage device 33 . 1 , and the transmission enable channel information 107 passing the conflict and from the conflict control circuit 34 is supplied. The information 133 over the channel winning the conflict becomes the conflict control device 34 supplied as transmission enable channel information of the upper band to undergo the final conflict processing.

The clock-based minimum cell interval controller 31 has a functional circuit 31b which is configured to monitor the control state of the respective channels subjected to the control and to the channel information storage device 33 a transmission enable bit 137 for each channel, indicating whether or not the decision processing described above is needed, when the next cell is supplied. Details of the state control device 31B which the transmission enable bit 123 will be described later.

The channel information storage device 33 includes a table referred to first when a cell is supplied so that parameters from each channel are read from the channel identifier of the cell header and into the channel information storage means 33 to be written. For example, band information of the channel specified by the channel identifier is extracted to provide information as to whether the incoming cell is in the clock-based minimum cell interval controller 31 or in the cell-based minimum cell interval controller 32 should be processed. The information becomes the clock-based minimum cell interval controller 31 and the cell-based minimum cell interval controller 32 in the form of the control scheme selection bit 105 delivered.

The control scheme selection bit 105 becomes the clock-based minimum cell interval controller 31 is supplied unchanged and becomes the cell-based minimum cell interval controller 32 with through the inverter 117 supplied in reverse polarity, and therefore allows one of the two control devices 31 and 32 is selected. The channel information storage device 33 keeps the transmission enable bit 137 of each channel indicating whether or not the channel is in the transmission enable state at the cell arrival time point.

The conflict control device 34 is configured to control the conflict between the channel provided by the clock-based minimum cell interval controller 31 and the channel selected by the cell-based minimum cell interval controller 32 has been selected to definitively determine which is the channel to which a transmission enable is to be made. The data representing the final channel is provided by the conflict controller 34 at their exit 107 developed.

In operation, when a new cell arrives, the channel to which the incoming cell corresponds is identified from the cell identifier contained in its cell header. Then, the peak rate value associated with the channel, which is in the channel information storage device 33 is stored, the clock-based minimum cell interval control means 31 and the cell-based minimum cell interval controller 32 fed. In addition, the channel information storage device supplies 33 the clock-based minimum cell interval controller and the cell-based minimum cell interval controller 32 with the control scheme selection bit 105 indicating the band to which the channel of the incoming cell belongs: the upper band or the lower band.

In the illustrated embodiment, the control scheme select bit 105 the primary value is assigned "1" if the band of the cell is greater than Threshold, and "0" if it is smaller than Threshold. In other words, the clock-based minimum cell interval control scheme is selected, if the control scheme selection bit 105 Is "1", and the cell-based minimum cell interval control scheme is selected when it is "0".

Next, the operation of the clock-based minimum cell interval controller will be described 31 and the cell-based minimum cell interval controller 32 described, which check for each channel, whether the transmission in time division multiplex mode is possible or not. The control scheme selection bit 105 becomes the selection gate 31a the clock based minimum cell interval controller 31 supplied unchanged and is the selection gate 32A the cell based minimum cell interval controller 32 supplied in reverse polarity such that one of these is "1" and the other is "0". In other words, the selection gates work 31A and 32A each consisting of the AND gate so that one of them releases the check result of the previous stage by the bit "1" and the other of them clears the check result of the previous stage by the bit "0".

Consequently controls the present embodiment from the entire channels only a limited amount of channels by means of the clock-based minimum cell interval control scheme, that is only Channels, which belong to the upper band. For example, suppose that the minimum bandwidth value, by the clock-based minimum cell interval control scheme can be controlled 10% for every channel is, by setting the threshold to 10% of the peak value The total sum reaches 100% when 10 channels with a 10% bandwidth be controlled simultaneously. Thus, the number of channels passing through to control the clock-based minimum cell interval control scheme 10, 10, and thus the clock-based minimum cell interval control scheme becomes only on 10 channels applied.

Assume now that the threshold is set such that a channel of the clock-based minimum cell interval controller to be controlled now 31 is associated. In this case, the information concerning the restricted channels as described above becomes one in the memory 13 set up management table 13A written, along with the release time for the next transmission, and is held there. The management table 13A stores four elements as shown in 4 : the control state 141 every cell; information 143 whether the cell is in the buffer or not (not shown); a channel number 145 ; and the release time 147 for the next transmission. From these elements becomes the control state 141 and the presence / absence information 143 a cell in the buffer also to generate the transmit enable bit 137 used.

The writing in the memory 13 is done using a dummy table address FIFO memory 15A in the R / W circuit 15 executed. The FIFO memory 15A has n memory locations and is adapted to store the addresses 1, 2, ... n indicating the storage locations of the memory 13 in FIFO (First-In-First-Out) order towards its highest address location # 0 in the initial state of the management table 13A of the memory 13 in which no information has yet been stored, where n is a natural number representing the number of channels that can be controlled simultaneously. The way in which the FIFO memory 15A held address 153 a place in the table 13A designated, which is newly introduced into the control, is by a line 151 in 4 specified. Thus, each time a cell of an upper band is supplied, one of the addresses 1, 2, 3, ..., n is designated in order. A table address which is removed upon completion of the transfer from concurrent control becomes the last position of the idle address FIFO memory 15A written, which prepares for the next write, as by the line 149 shown.

Referring to 4 showing the functional relationships between the management table 13A and the dummy table address FIFO memory 15A represents, performs the state control 31B always controlling the transmission timings of the channels by dynamically changing the concurrent control channels using the management table 13A and the dummy table address FIFO memory 15A ,

The clock-based minimum cell interval controller 31 works in each case using the state controller 31b in the manner described below. First, if the check result made by the comparator is disabled and this information is not yet in the decision result hold flip-flop 19 has been set, the state control device 31B the control state bit 141 the management table 13A stuck to his controlled state.

In contrast, if the cell has already been transferred, the state controller sets 31B fixes the transmission bit to the binary value "0" and stores it in the channel information memory device 33 , As described above, the transmission enable bit represents 137 whether or not the cell can be transmitted without the decision of the clock-based minimum cell interval controller 31 to be subjected to when the cell is supplied. Also in this case, the state control device sets 31B the steering state bit 141 in the management table 13A of the memory 13 stuck to his controlled state.

In terms of channels, where as a result of the comparator 18 This comparison has found that their next transfer times 147 have already passed, decides the state control device 31B Whether or not there is a cell in the buffer, and if there is a cell in it, sets the control state bit 141 on the controlled state. If there is no cell in the buffer, state control continues 31B the transmission enable bit 137 , whereby a control completion state is input, which means that the channel is removed from the channels to be controlled at the same time.

If a new cell is supplied, the state controller checks 31B whether the transmission enable bit 137 in the channel information memory 33 has the binary value "0" or not, and if it has the value "0", then stores the state controller 31B the cell in the buffer and enters its controlled state. Conversely, if the transmit enable bit has the binary value "1", then the state controller issues 31B necessarily a transfer order 137 without making any decision, since the transmission timing has already elapsed. However, if the transfer is disabled because the conflict was "lost", the state controller sets 31B the transmission enable bit 137 to "0", thereby inputting its controlled state.

The state controller 31B reads when the control state bit 141 indicates its controlled state from the dummy table address FIFO memory 15A the address off, which is a blank space of the table 13A indicates and then sets the control bit in the table 141 to the binary value "1", and the present / nonexistent bit 143 the cell is stored in the buffer and writes the associated channel number 145 and the next transmission enable time 147 ,

On the other hand, if the control state bit 141 indicating the completion of the control becomes the control bit 141 in the table 13A of the memory 13 set to "0" and the address of an entity location of the table 13a will be in the last position of the empty table address FIFO memory 15A written.

If the number of channels exceeds the number of controllable channels, ie no empty table address FIFO memory 15A is present, is dispensed to the supplied cell before it is stored in the buffer as not controllable.

The foregoing has described how the clock-based minimum cell interval controller 31 is working. The cell-based minimum cell interval controller 32 performs the processing in a manner similar to the processing described above. Then leads the conflict control device 34 the conflict control between the upper-band transmission enable channel information 133 generated by the clock-based minimum cell interval controller 31 is output, and the lower-band transmission enable channel information 113 by the cell-based minimum cell interval controller 32 and selects the channel information 107 which extracts the conflict at each cell period, as the channel information of the cell which is actually transmitted. The conflict uses round-robin scheduling, so the probability is the same for everyone.

As described above, in the first embodiment, the band is divided into two subbands, and the wider subband is assigned to the clock-based minimum cell interval control scheme and the narrower subband to the cell-based minimum cell interval control scheme to perform the control. This makes it possible to solve the problems existing in the conventional case as follows:
Even if controlling the wider subband only by means of the cell based minimum cell interval control scheme has the problem that the accuracy is greatly reduced, the cell rate control can be achieved over the entire band with small accuracy variations, by using the wide subband by the clock based minimal Cell interval control schemes are controlled and the narrower subband is controlled by means of the cell based minimum cell interval control scheme.
Further, since applying the cell-based minimum cell interval control scheme to the narrower sub-band is equivalent to applying it to channels where the cell intervals are large, a control error due to an increasing number of channels can, thanks to the large number of channels Intervals between the transmitted cells are reduced.
In addition, the first embodiment allocates the clock-based minimum cell interval control scheme only for the wider sub-band control, restricts the number of concurrently-controlled channels, and has means for dynamically changing the table of the simultaneously-controlled channels in accordance with the control state. This makes it possible to limit the bit number of the next transmission enable time, that is, limit the hardware size, and maintain the control accuracy, which has been one of the conventional problems.

EMBODIMENT 2

following is an alternative or second embodiment of a data transfer rate control unit in accordance with the invention described with reference to the drawings. In this embodiment becomes the data transfer rate control unit on the cell rate control unit in a cell transmission communication system applied. In the cell rate control unit in accordance with the second Embodiment is the control band also divided into the upper and lower bands, to which different control schemes are applied. In the present embodiment however, the sliding window control scheme will default to the upper band assigned to wider control bandwidth and cell-based Minimal cell interval control scheme is assigned to the lower band with a Assigned lower bandwidth, thereby increasing the benefits of each Control procedures are well used.

Referring to 5 Fig. 3 is a block diagram showing the cell rate control unit related to the second embodiment. The cell rate control unit includes four functional blocks: a sliding window controller 41 , the cell-based minimum cell interval controller 32 ; the channel information memory 33 ; and the conflict control facility 34 , In the figures, similar elements are denoted by the same reference numerals, and a repetition of the description is omitted. The connections of these functional blocks with each other may be the same as in the first embodiment, wherein the sliding window control means 41 in place of the minimum cell interval controller 31 the first embodiment occurs.

Referring to 6 is the sliding window controller 41 formed to the number of cells in the sliding window using an intra-window cell counter 21 to control. The intra-window cell counter 21 is an up / down counter that performs upcounting when a cell is transmitted within the time window and performs downcounting when the cell is removed from the time window. If there is an incoming cell or an outgoing cell, that is, if the number of cells in the window is checked, an R / W circuit will be established 22 pointing to the channel information 171 regarding the incoming cell, is activated to cause data to flow 161 representing the number of cells in the window of the associated channels from a memory 23 be read out. Thus, the data becomes 161 , which are representative of the number of cells, into the intra-window cell number counter 21 loaded.

The data 163 which represent the number of cells in the window and the counter 21 be generated again by a comparator 24 with the peak rate 115 (allowed number of cells in the window) compared. If the value of the data 163 the allowed number of cells 115 does not exceed, then the result A> B via an AND gate 41A if enabled, a decision result hold flip-flop 25 supplied to be held for each channel as a transmission enable information. The AND gate 41A is designed to AND the output A> B of the comparator 24 with the control scheme selection bit 105 and again gives the output A> B of the comparator 24 only continue if the control scheme select bit 105 located at its high level. This means that the sliding window control device 41 is disabled when the control scheme selection bit 105 is at the low level. Then leads a conflict control device 27 a conflict control of the output variables 165 the flip flops 25 between the channels whose decision result hold flip-flops 25 are set, and the cell of the channel "winning" the conflict is handled as the output cell. When the cell is transmitted, the decision result hold flip-flop becomes 25 reset this channel. Subsequently, the number of cells in the window is increased by one and, if the transfer decision is positive at that moment, the associated decision result-hold flip-flops 25 set again.

The sliding window controller 41 is with a shift register 26 provide which register levels 26A whose number corresponds to the width of the window and which are adapted to make a shift operation every cell interval, independently of the checking of the feeding and discharging of the cells. In this case, the channel identifier of the removed cell becomes the shift register 26 supplied at this cell time. If no removed cell exists, gives information 167 that she is fed. The information that comes from the initial size 169 of the shift register 26 is the channel identifier of the cell that was previously transmitted and removed from the timeslot. The channel removed from the time window results in having room for a single cell, and thus, if there is no cell in the associated channel and there is one cell in the buffer at that cell timing, the decision result hold flip-flops 25 set. The control unit 41 also includes a timing controller 28 which checks the supplied and discharged cells and generates control times for moving the window or other required control times.

The cell-based minimum cell interval controller 32 has the same configuration as the control circuit 32 which reference 2 was shown and described.

In operation, the channel information storage device is used 33 the peak rate 115 and the control scheme selection bit 105 a channel to be checked simultaneously with the sliding window controller 41 and the cell-based minimum cell interval controller 32 fed. The sliding window control scheme is chosen for the channel whose control scheme selection bit 105 on the other hand, the cell-based minimum cell interval control scheme is selected for the channel whose control scheme select bit 105 has the value "0". The control scheme selection bit 105 is set to "1" if the bandwidth of the channel is greater than a threshold set in the band associated with the transmitted cells and "0" if lower than the threshold. The sliding window controller 41 and the cell-based minimum cell interval controller 32 check whether a respective channel is ready for transmission in the time-division multiplex mode with such control.

In this case it is sufficient that the sliding window control device 41 controls the transmission of the cell in the sliding window control method. Accordingly, the width of the window required for implementation of sliding window control, each with a 1% interval between 1% to 100%, can be determined by the shift register 26 arranged with 100 steps, which is a practically applicable size.

According to the second embodiment the band is divided into a pair of subbands, so that the wider subband is assigned to the sliding window control scheme, to be controlled by this, and the narrower band to the cell-based minimum cell interval control scheme is to be controlled by this. Thus, the usual problem solved become.

Also when controlling the wider subband by the cell based Minimal cell interval control scheme has the problem that the accuracy decreases greatly, controlling the cell rate over the entire volume with great Accuracy can be achieved, thereby the wider subband through the sliding window control scheme is controlled and the narrower subband through the cell-based Minimum cell interval control scheme is controlled.

There continue to apply the cell-based minimum cell interval control scheme the narrower subband equivalent to this is that on channels is applied, where the cell intervals are large, may be a control error caused by an increased number of channels is, thanks to the big one Intervals between the transmitted Cells are reduced.

There Furthermore the sliding window control scheme only to the wider subband is applied, the width of the window can be reduced. This allows a reduction in hardware dimensions.

There Furthermore only a narrow window width is needed, the Fluctuations in the cells in the window can be reduced.

VARIATIONS OF THE INVENTION

• (1) Although in the previous embodiments the cell rate control schemes described for systems be applied, which is a fixed length of data or a cell as a transmission unit The invention can also be applied to various systems which are similar control methods use. For example, it may be based on ATM switches, ATM routers, ATM bridges or telecommunications devices of other terminals applied become.
• (2) Although in the foregoing embodiments, only one single threshold or threshold set in the control band is, so the control schemes are switched depending on it be whether the bandwidth is greater as the threshold or not, a plurality of thresholds may be used or limits are used, so that appropriate control schemes can be assigned to each subband, by the thresholds is divided.

According to the before described invention is the entire band by one or more threshold or limits in subbands divided, and the transmission control schemes, the for used the data transfer via channels be switched from channel to channel depending on the subband, to which each channel own transfer rate belongs. This allows that the control accuracy over improved the entire band compared to conventional systems which controls the entire band by a single control scheme.

While the invention has been described with reference to specific exemplary embodiments, these embodiments are not limited. It is understood that by professionals changes or modifications of the can be made without departing from the scope of the invention.

Claims (6)

Method for controlling a data transmission, which comprises the step of supplying data to multiplex transmission channels be controlled so that data on each of the channels with a for the Channel suitable transmission rate transmitted become; characterized by the following steps: Divide a total band by at least one threshold in subbands; and Select a transmission control scheme for each of the channels in accordance with the subband to which the for the channel suitable transmission rate belongs. Data transmission control method according to claim 1, wherein the number of the at least one threshold value One is, and the transmission control scheme applies a clock period based scheme on the subband which a larger bandwidth as the threshold, and a cell duration based scheme applies to the subband, which has a narrower bandwidth than has the threshold. Data transmission control method according to claim 1, wherein the number of the at least one threshold value One is, and that for transfer data transfer scheme used by data applies a Gleitfens ter scheme on the subband, which is a greater bandwidth as the threshold, and a cell duration based scheme applies to the subband, which has a narrower bandwidth than has the threshold. A system which controls a data transmission rate by controlling data transmitted to multiplex transmission channels so as to transmit data on each of the channels at a transmission rate suitable for the channel, characterized in that the system comprises: a band identification device ( 33 ), by which a determination is made of a subband to which the transmission rate suitable for each channel belongs, and which applies to each of the channels an identifier corresponding to the result of the determination, wherein a total band is subdivided into subbands by at least one threshold, a plurality of Control devices ( 31 . 32 . 41 ) associated with each of the subbands and controlling the data transfer; and a facility ( 34 ), one of the control devices ( 31 . 32 . 41 ), which controls data transmission on a channel in accordance with the identifier attached to the channel. The system of claim 4, wherein the number of the at least one threshold is one, and the controllers ( 31 . 32 . 41 ) a first control circuit ( 31 ) which applies a clock period-based scheme to the subband having a larger bandwidth than the threshold, and a second control circuit ( 32 ) applying a cell-time-based scheme to the subband having a narrower bandwidth than the threshold. The system of claim 4, wherein the number of the at least one threshold is one, and the controllers ( 31 . 32 . 41 ) a first control circuit ( 31 ) which applies a sliding window scheme to the subband having a larger bandwidth than the threshold, and a second control circuit ( 32 ) which applies a cell duration based scheme to the subband having a narrower bandwidth than the threshold.