DE69708215T2 - Analog to digital converter - Google Patents
Analog to digital converterInfo
- Publication number
- DE69708215T2 DE69708215T2 DE69708215T DE69708215T DE69708215T2 DE 69708215 T2 DE69708215 T2 DE 69708215T2 DE 69708215 T DE69708215 T DE 69708215T DE 69708215 T DE69708215 T DE 69708215T DE 69708215 T2 DE69708215 T2 DE 69708215T2
- Authority
- DE
- Germany
- Prior art keywords
- analog
- digital converter
- converter
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
- H03M1/202—Increasing resolution using an n bit system to obtain n + m bits by interpolation
- H03M1/203—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit
- H03M1/204—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
- H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
- H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/069—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy by range overlap between successive stages or steps
- H03M1/0695—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy by range overlap between successive stages or steps using less than the maximum number of output states per stage or step, e.g. 1.5 per stage or less than 1.5 bit per stage type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
- H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
- H03M1/167—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters
- H03M1/168—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters and delivering the same number of bits
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9608083A FR2750549B1 (en) | 1996-06-28 | 1996-06-28 | ANALOG-TO-DIGITAL CONVERTER |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69708215D1 DE69708215D1 (en) | 2001-12-20 |
DE69708215T2 true DE69708215T2 (en) | 2002-06-27 |
Family
ID=9493529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69708215T Expired - Lifetime DE69708215T2 (en) | 1996-06-28 | 1997-06-27 | Analog to digital converter |
Country Status (4)
Country | Link |
---|---|
US (1) | US6166674A (en) |
EP (1) | EP0817390B1 (en) |
DE (1) | DE69708215T2 (en) |
FR (1) | FR2750549B1 (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2789192B1 (en) | 1999-02-02 | 2001-04-20 | Thomson Csf | EARLY RETAIN FAST CHAINABLE ADDER |
US6826390B1 (en) * | 1999-07-14 | 2004-11-30 | Fujitsu Limited | Receiver, transceiver circuit, signal transmission method, and signal transmission system |
FR2797538B1 (en) * | 1999-08-13 | 2001-11-02 | Thomson Csf | SIGNAL FOLDING CIRCUIT, AND ANALOG-TO-DIGITAL CONVERTER SERIES INTERPOLATION CELL USING SUCH A CIRCUIT |
US6359579B1 (en) * | 2000-02-17 | 2002-03-19 | Advanced Micro Devices, Inc. | Digital logic correction circuit for a pipeline analog to digital (A/D) converter |
US6323800B1 (en) | 2000-02-17 | 2001-11-27 | Advanced Micro Devices, Inc. | Pipeline analog to digital (a/d) converter with lengthened hold operation of a first stage |
US6337651B1 (en) | 2000-02-17 | 2002-01-08 | Advanced Micro Devices, Inc. | Pipeline analog to digital (A/D) converter with relaxed accuracy requirement for sample and hold stage |
JP4320732B2 (en) * | 2004-01-26 | 2009-08-26 | 横河電機株式会社 | Cascade A / D converter |
JP4788532B2 (en) * | 2006-09-04 | 2011-10-05 | ソニー株式会社 | Folding circuit and analog-to-digital converter |
CN101076053B (en) * | 2007-06-21 | 2010-10-06 | 吴壬华 | Method and circuit for multi-channel photoelectric isolated voltage |
JP4627078B2 (en) * | 2007-10-25 | 2011-02-09 | ルネサスエレクトロニクス株式会社 | DIGITAL / ANALOG CONVERSION CIRCUIT, DATA DRIVER AND DISPLAY DEVICE |
KR20110028712A (en) * | 2009-09-14 | 2011-03-22 | 삼성전자주식회사 | Voltage range decision circuit |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4455613A (en) * | 1981-11-25 | 1984-06-19 | Gould Inc. | Technique of reconstructing and displaying an analog waveform from a small number of magnitude samples |
NL8701816A (en) * | 1987-08-03 | 1989-03-01 | Philips Nv | ELECTRICAL CIRCUIT WHICH CAN BE USED IN AN A / D CONVERTER. |
US5057841A (en) * | 1989-07-07 | 1991-10-15 | U.S. Philips Corporation | Analog-to-digital converter |
US5298814A (en) * | 1992-08-18 | 1994-03-29 | Micro Power Systems, Inc. | Active analog averaging circuit and ADC using same |
JPH0669800A (en) * | 1992-08-20 | 1994-03-11 | Fujitsu Ltd | A/d converter |
FR2699025B1 (en) * | 1992-12-04 | 1995-01-06 | Thomson Csf Semiconducteurs | Analog to digital converter. |
FR2700084B1 (en) * | 1992-12-30 | 1995-02-10 | Thomson Csf Semiconducteurs | Analog to digital converter with distributed blocker sampler. |
FR2722625B1 (en) * | 1994-07-18 | 1996-10-04 | Thomson Consumer Electronics | MULTI-COMPARISON A / D CONVERTER USING THE INTERPOLATION PRINCIPLE |
-
1996
- 1996-06-28 FR FR9608083A patent/FR2750549B1/en not_active Expired - Fee Related
-
1997
- 1997-06-27 DE DE69708215T patent/DE69708215T2/en not_active Expired - Lifetime
- 1997-06-27 EP EP97401509A patent/EP0817390B1/en not_active Expired - Lifetime
- 1997-06-30 US US08/885,959 patent/US6166674A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2750549B1 (en) | 1998-09-18 |
EP0817390B1 (en) | 2001-11-14 |
DE69708215D1 (en) | 2001-12-20 |
US6166674A (en) | 2000-12-26 |
EP0817390A1 (en) | 1998-01-07 |
FR2750549A1 (en) | 1998-01-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |