DE69523690T2 - Mikroprozessor mit Registerspeicher - Google Patents
Mikroprozessor mit RegisterspeicherInfo
- Publication number
- DE69523690T2 DE69523690T2 DE69523690T DE69523690T DE69523690T2 DE 69523690 T2 DE69523690 T2 DE 69523690T2 DE 69523690 T DE69523690 T DE 69523690T DE 69523690 T DE69523690 T DE 69523690T DE 69523690 T2 DE69523690 T2 DE 69523690T2
- Authority
- DE
- Germany
- Prior art keywords
- microprocessor
- register memory
- register
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
- G06F9/30127—Register windows
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/461—Saving or restoring of program or task context
- G06F9/462—Saving or restoring of program or task context with multiple register sets
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Microcomputers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6190447A JP2677202B2 (ja) | 1994-08-12 | 1994-08-12 | マイクロプロセッサ |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69523690D1 DE69523690D1 (de) | 2001-12-13 |
DE69523690T2 true DE69523690T2 (de) | 2002-08-01 |
Family
ID=16258290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69523690T Expired - Lifetime DE69523690T2 (de) | 1994-08-12 | 1995-08-14 | Mikroprozessor mit Registerspeicher |
Country Status (4)
Country | Link |
---|---|
US (1) | US5713038A (de) |
EP (1) | EP0697651B1 (de) |
JP (1) | JP2677202B2 (de) |
DE (1) | DE69523690T2 (de) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5778243A (en) * | 1996-07-03 | 1998-07-07 | International Business Machines Corporation | Multi-threaded cell for a memory |
US6223208B1 (en) * | 1997-10-03 | 2001-04-24 | International Business Machines Corporation | Moving data in and out of processor units using idle register/storage functional units |
US6145049A (en) * | 1997-12-29 | 2000-11-07 | Stmicroelectronics, Inc. | Method and apparatus for providing fast switching between floating point and multimedia instructions using any combination of a first register file set and a second register file set |
US7444641B1 (en) * | 1998-03-10 | 2008-10-28 | Agere Systems Inc. | Context controller having context-specific event selection mechanism and processor employing the same |
US6986141B1 (en) * | 1998-03-10 | 2006-01-10 | Agere Systems Inc. | Context controller having instruction-based time slice task switching capability and processor employing the same |
US6389449B1 (en) | 1998-12-16 | 2002-05-14 | Clearwater Networks, Inc. | Interstream control and communications for multi-streaming digital processors |
US7257814B1 (en) * | 1998-12-16 | 2007-08-14 | Mips Technologies, Inc. | Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors |
US7529907B2 (en) | 1998-12-16 | 2009-05-05 | Mips Technologies, Inc. | Method and apparatus for improved computer load and store operations |
US7035997B1 (en) | 1998-12-16 | 2006-04-25 | Mips Technologies, Inc. | Methods and apparatus for improving fetching and dispatch of instructions in multithreaded processors |
US7237093B1 (en) | 1998-12-16 | 2007-06-26 | Mips Technologies, Inc. | Instruction fetching system in a multithreaded processor utilizing cache miss predictions to fetch instructions from multiple hardware streams |
US6292888B1 (en) * | 1999-01-27 | 2001-09-18 | Clearwater Networks, Inc. | Register transfer unit for electronic processor |
US7020879B1 (en) * | 1998-12-16 | 2006-03-28 | Mips Technologies, Inc. | Interrupt and exception handling for multi-streaming digital processors |
US6487630B2 (en) * | 1999-02-26 | 2002-11-26 | Intel Corporation | Processor with register stack engine that dynamically spills/fills physical registers to backing store |
US6351808B1 (en) * | 1999-05-11 | 2002-02-26 | Sun Microsystems, Inc. | Vertically and horizontally threaded processor with multidimensional storage for storing thread data |
US6507862B1 (en) * | 1999-05-11 | 2003-01-14 | Sun Microsystems, Inc. | Switching method in a multi-threaded processor |
US6668285B1 (en) | 1999-05-12 | 2003-12-23 | Koninklijke Philips Electronics N.V. | Object oriented processing with dedicated pointer memories |
US7318090B1 (en) | 1999-10-20 | 2008-01-08 | Sony Corporation | Method for utilizing concurrent context switching to support isochronous processes |
AU2001273211A1 (en) | 2000-07-14 | 2002-01-30 | Clearwater Networks, Inc. | Instruction fetch and dispatch in multithreaded system |
KR100491323B1 (ko) * | 2002-03-13 | 2005-05-24 | (주) 네오시스트 | 독립 파이프라인에 의한 저장 방식을 갖는 전자 계산기 |
JP2005284646A (ja) | 2004-03-29 | 2005-10-13 | Toshiba Corp | マイクロプロセッサ |
JP2006092042A (ja) * | 2004-09-21 | 2006-04-06 | Sanyo Electric Co Ltd | 情報処理装置及びコンテキスト切り替え方法 |
WO2008023426A1 (fr) | 2006-08-24 | 2008-02-28 | Netcleus Systems Corporation | Dispositif de traitement de tâche |
US8938590B2 (en) | 2008-10-18 | 2015-01-20 | Micron Technology, Inc. | Indirect register access method and system |
US8209521B2 (en) | 2008-10-18 | 2012-06-26 | Micron Technology, Inc. | Methods of indirect register access including automatic modification of a directly accessible address register |
GB2605664B (en) * | 2021-09-30 | 2023-03-29 | Imagination Tech Ltd | Processor with hardware pipeline |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4627024A (en) * | 1983-07-21 | 1986-12-02 | Trw Inc. | Window-addressable memory circuit |
JPS6151243A (ja) * | 1984-08-20 | 1986-03-13 | Toshiba Corp | レジスタ式演算処理装置 |
JPS63156236A (ja) * | 1986-12-19 | 1988-06-29 | Toshiba Corp | レジスタ装置 |
JPH0769821B2 (ja) * | 1988-03-04 | 1995-07-31 | 日本電気株式会社 | 情報処理装置におけるバイパスライン制御方式 |
JP2655191B2 (ja) * | 1989-07-05 | 1997-09-17 | 三菱電機株式会社 | 演算処理装置 |
JPH0454652A (ja) * | 1990-06-25 | 1992-02-21 | Nec Corp | マイクロコンピュータ |
US5226142A (en) * | 1990-11-21 | 1993-07-06 | Ross Technology, Inc. | High performance register file with overlapping windows |
KR960001273B1 (ko) * | 1991-04-30 | 1996-01-25 | 가부시키가이샤 도시바 | 단일칩 마이크로컴퓨터 |
US5557766A (en) * | 1991-10-21 | 1996-09-17 | Kabushiki Kaisha Toshiba | High-speed processor for handling multiple interrupts utilizing an exclusive-use bus and current and previous bank pointers to specify a return bank |
JP2568017B2 (ja) * | 1992-03-12 | 1996-12-25 | 株式会社東芝 | マイクロプロセッサ及びそれを使用したデータ処理システム |
JP3110866B2 (ja) * | 1992-06-01 | 2000-11-20 | 株式会社東芝 | マイクロプロセッサ |
-
1994
- 1994-08-12 JP JP6190447A patent/JP2677202B2/ja not_active Expired - Fee Related
-
1995
- 1995-08-14 US US08/514,928 patent/US5713038A/en not_active Expired - Fee Related
- 1995-08-14 EP EP95112797A patent/EP0697651B1/de not_active Expired - Lifetime
- 1995-08-14 DE DE69523690T patent/DE69523690T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0697651A2 (de) | 1996-02-21 |
JPH0855028A (ja) | 1996-02-27 |
EP0697651A3 (de) | 1997-07-23 |
DE69523690D1 (de) | 2001-12-13 |
EP0697651B1 (de) | 2001-11-07 |
US5713038A (en) | 1998-01-27 |
JP2677202B2 (ja) | 1997-11-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |