DE69514075D1 - CMOS-Multiplexer für logische Variablen - Google Patents
CMOS-Multiplexer für logische VariablenInfo
- Publication number
- DE69514075D1 DE69514075D1 DE69514075T DE69514075T DE69514075D1 DE 69514075 D1 DE69514075 D1 DE 69514075D1 DE 69514075 T DE69514075 T DE 69514075T DE 69514075 T DE69514075 T DE 69514075T DE 69514075 D1 DE69514075 D1 DE 69514075D1
- Authority
- DE
- Germany
- Prior art keywords
- logical variables
- cmos multiplexer
- multiplexer
- cmos
- variables
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9412990A FR2726409B1 (fr) | 1994-10-28 | 1994-10-28 | Multiplexeur de variables logiques |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69514075D1 true DE69514075D1 (de) | 2000-01-27 |
DE69514075T2 DE69514075T2 (de) | 2000-08-24 |
Family
ID=9468356
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69514075T Expired - Fee Related DE69514075T2 (de) | 1994-10-28 | 1995-10-26 | CMOS-Multiplexer für logische Variablen |
Country Status (4)
Country | Link |
---|---|
US (1) | US5686856A (de) |
EP (1) | EP0709963B1 (de) |
DE (1) | DE69514075T2 (de) |
FR (1) | FR2726409B1 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6324679B1 (en) | 1997-06-03 | 2001-11-27 | Nec Usa, Inc. | Register transfer level power optimization with emphasis on glitch analysis and reduction |
CA2308820A1 (en) * | 2000-05-15 | 2001-11-15 | The Governors Of The University Of Alberta | Wireless radio frequency technique design and method for testing of integrated circuits and wafers |
DE10042380C1 (de) * | 2000-08-29 | 2002-02-21 | Infineon Technologies Ag | Basiselement für eine Multiplexerstruktur sowie entsprechende Multiplexerstruktur |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH524933A (fr) * | 1971-06-07 | 1972-06-30 | Centre Electron Horloger | Structure logique de division de fréquence |
US3753009A (en) * | 1971-08-23 | 1973-08-14 | Motorola Inc | Resettable binary flip-flop of the semiconductor type |
JPS5242507B2 (de) * | 1972-08-31 | 1977-10-25 | ||
SE383325B (sv) * | 1974-01-31 | 1976-03-08 | Stella Maskiners Forseljnings | Anordning vid ett hoj- och senkbart lyftorgan till lastfordon sasom truckar o.d. for fasthallning ovanifran av en av lyftorganet uppburen last |
CH613318A5 (de) * | 1977-07-08 | 1979-09-14 | Centre Electron Horloger | |
CH629921A5 (fr) * | 1977-07-08 | 1982-05-14 | Centre Electron Horloger | Structure logique de bascule bistable d. |
US4593390A (en) * | 1984-08-09 | 1986-06-03 | Honeywell, Inc. | Pipeline multiplexer |
JP2739964B2 (ja) * | 1988-09-28 | 1998-04-15 | 株式会社東芝 | クロック切替回路 |
US5140193A (en) * | 1990-03-27 | 1992-08-18 | Xilinx, Inc. | Programmable connector for programmable logic device |
US5198705A (en) * | 1990-05-11 | 1993-03-30 | Actel Corporation | Logic module with configurable combinational and sequential blocks |
US5012126A (en) * | 1990-06-04 | 1991-04-30 | Motorola, Inc. | High speed CMOS multiplexer having reduced propagation delay |
GB2267613B (en) * | 1992-06-02 | 1996-01-03 | Plessey Semiconductors Ltd | Programmable logic cell |
US5386154A (en) * | 1992-07-23 | 1995-01-31 | Xilinx, Inc. | Compact logic cell for field programmable gate array chip |
US5436574A (en) * | 1993-11-12 | 1995-07-25 | Altera Corporation | Universal logic module with arithmetic capabilities |
-
1994
- 1994-10-28 FR FR9412990A patent/FR2726409B1/fr not_active Expired - Fee Related
-
1995
- 1995-10-26 DE DE69514075T patent/DE69514075T2/de not_active Expired - Fee Related
- 1995-10-26 EP EP95402405A patent/EP0709963B1/de not_active Expired - Lifetime
- 1995-10-27 US US08/549,253 patent/US5686856A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5686856A (en) | 1997-11-11 |
FR2726409A1 (fr) | 1996-05-03 |
DE69514075T2 (de) | 2000-08-24 |
EP0709963B1 (de) | 1999-12-22 |
EP0709963A1 (de) | 1996-05-01 |
FR2726409B1 (fr) | 1996-12-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |