DE69419656D1 - Method for voltage testing of decoders and peripheral circuits in a memory matrix - Google Patents

Method for voltage testing of decoders and peripheral circuits in a memory matrix

Info

Publication number
DE69419656D1
DE69419656D1 DE69419656T DE69419656T DE69419656D1 DE 69419656 D1 DE69419656 D1 DE 69419656D1 DE 69419656 T DE69419656 T DE 69419656T DE 69419656 T DE69419656 T DE 69419656T DE 69419656 D1 DE69419656 D1 DE 69419656D1
Authority
DE
Germany
Prior art keywords
decoders
peripheral circuits
memory matrix
voltage testing
testing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69419656T
Other languages
German (de)
Inventor
David Charles Mcclure
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69419656D1 publication Critical patent/DE69419656D1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
DE69419656T 1993-04-30 1994-04-28 Method for voltage testing of decoders and peripheral circuits in a memory matrix Expired - Lifetime DE69419656D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/056,376 US5341336A (en) 1993-04-30 1993-04-30 Method for stress testing decoders and periphery circuits

Publications (1)

Publication Number Publication Date
DE69419656D1 true DE69419656D1 (en) 1999-09-02

Family

ID=22003982

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69419656T Expired - Lifetime DE69419656D1 (en) 1993-04-30 1994-04-28 Method for voltage testing of decoders and peripheral circuits in a memory matrix

Country Status (4)

Country Link
US (1) US5341336A (en)
EP (1) EP0622809B1 (en)
JP (1) JPH0757473A (en)
DE (1) DE69419656D1 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5530674A (en) * 1994-04-29 1996-06-25 Sgs-Thomson Microelectronics, Inc. Structure capable of simultaneously testing redundant and non-redundant memory elements during stress testing of an integrated circuit memory device
US5627787A (en) * 1995-01-03 1997-05-06 Sgs-Thomson Microelectronics, Inc. Periphery stress test for synchronous RAMs
US5592422A (en) * 1995-06-07 1997-01-07 Sgs-Thomson Microelectronics, Inc. Reduced pin count stress test circuit for integrated memory devices and method therefor
US5745420A (en) * 1995-07-31 1998-04-28 Sgs-Thomson Microelectronics, Inc. Integrated memory circuit with sequenced bitlines for stress test
US5619462A (en) * 1995-07-31 1997-04-08 Sgs-Thomson Microelectronics, Inc. Fault detection for entire wafer stress test
US5861660A (en) * 1995-08-21 1999-01-19 Stmicroelectronics, Inc. Integrated-circuit die suitable for wafer-level testing and method for forming the same
US5808947A (en) * 1995-08-21 1998-09-15 Sgs-Thomson Microelectronics, Inc. Integrated circuit that supports and method for wafer-level testing
US5557573A (en) * 1995-08-21 1996-09-17 Sgs-Thomson Microelectronics, Inc. Entire wafer stress test method for integrated memory devices and circuit therefor
US5689467A (en) * 1995-11-30 1997-11-18 Texas Instruments Incorporated Apparatus and method for reducing test time of the data retention parameter in a dynamic random access memory
US5745432A (en) * 1996-01-19 1998-04-28 Sgs-Thomson Microelectronics, Inc. Write driver having a test function
US5691950A (en) * 1996-01-19 1997-11-25 Sgs-Thomson Microelectronics, Inc. Device and method for isolating bit lines from a data line
US5802004A (en) * 1996-01-19 1998-09-01 Sgs-Thomson Microelectronics, Inc. Clocked sense amplifier with wordline tracking
US5845059A (en) * 1996-01-19 1998-12-01 Stmicroelectronics, Inc. Data-input device for generating test signals on bit and bit-complement lines
US5883838A (en) * 1996-01-19 1999-03-16 Stmicroelectronics, Inc. Device and method for driving a conductive path with a signal
US5848018A (en) * 1996-01-19 1998-12-08 Stmicroelectronics, Inc. Memory-row selector having a test function
US6072719A (en) 1996-04-19 2000-06-06 Kabushiki Kaisha Toshiba Semiconductor memory device
US5859442A (en) * 1996-12-03 1999-01-12 Micron Technology, Inc. Circuit and method for configuring a redundant bond pad for probing a semiconductor
US5877993A (en) * 1997-05-13 1999-03-02 Micron Technology, Inc. Memory circuit voltage regulator
US6081466A (en) * 1998-10-30 2000-06-27 Stmicroelectronics, Inc. Stress test mode entry at power up for low/zero power memories
US6535014B2 (en) 2000-01-19 2003-03-18 Lucent Technologies, Inc. Electrical parameter tester having decoupling means
US7405585B2 (en) * 2006-02-14 2008-07-29 Taiwan Semiconductor Manufacturing Co., Ltd. Versatile semiconductor test structure array

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0101107A2 (en) * 1982-07-19 1984-02-22 Motorola, Inc. Method of testing a semiconductor memory array
JPS59107493A (en) * 1982-12-09 1984-06-21 Ricoh Co Ltd Eprom memory device with test circuit
JP2603205B2 (en) * 1987-03-16 1997-04-23 シーメンス、アクチエンゲゼルシヤフト Multi-stage integrated decoder device
EP0413347A3 (en) * 1989-08-18 1991-06-05 Hitachi, Ltd. Semiconductor nonvolatile memory device
US5208776A (en) * 1990-07-31 1993-05-04 Texas Instruments, Incorporated Pulse generation circuit

Also Published As

Publication number Publication date
US5341336A (en) 1994-08-23
JPH0757473A (en) 1995-03-03
EP0622809A1 (en) 1994-11-02
EP0622809B1 (en) 1999-07-28

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Legal Events

Date Code Title Description
8332 No legal effect for de