DE69327858T2 - Semiconductor memory device with a test circuit - Google Patents
Semiconductor memory device with a test circuitInfo
- Publication number
- DE69327858T2 DE69327858T2 DE69327858T DE69327858T DE69327858T2 DE 69327858 T2 DE69327858 T2 DE 69327858T2 DE 69327858 T DE69327858 T DE 69327858T DE 69327858 T DE69327858 T DE 69327858T DE 69327858 T2 DE69327858 T2 DE 69327858T2
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- test circuit
- test
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/1201—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising I/O circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/26—Accessing multiple arrays
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11375692A JP3251637B2 (en) | 1992-05-06 | 1992-05-06 | Semiconductor storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69327858D1 DE69327858D1 (en) | 2000-03-23 |
DE69327858T2 true DE69327858T2 (en) | 2000-07-06 |
Family
ID=14620346
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69327858T Expired - Lifetime DE69327858T2 (en) | 1992-05-06 | 1993-05-06 | Semiconductor memory device with a test circuit |
Country Status (5)
Country | Link |
---|---|
US (1) | US5381372A (en) |
EP (1) | EP0569014B1 (en) |
JP (1) | JP3251637B2 (en) |
KR (1) | KR950008458B1 (en) |
DE (1) | DE69327858T2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0801401B1 (en) * | 1996-04-02 | 2003-08-27 | STMicroelectronics, Inc. | Testing and repair of embedded memory |
US6320803B1 (en) * | 2000-03-23 | 2001-11-20 | Infineon Technologies Ac | Method and apparatus for improving the testing, yield and performance of very large scale integrated circuits |
US6757209B2 (en) * | 2001-03-30 | 2004-06-29 | Intel Corporation | Memory cell structural test |
KR100437613B1 (en) * | 2001-10-23 | 2004-06-30 | 주식회사 하이닉스반도체 | Wide i/o dram macro type integrated test i/o apparatus |
KR20040101660A (en) * | 2003-05-26 | 2004-12-03 | 삼성전자주식회사 | Output buffer circuits having signal path use for test and the test method of the same |
US7246280B2 (en) * | 2004-03-23 | 2007-07-17 | Samsung Electronics Co., Ltd. | Memory module with parallel testing |
JP4954954B2 (en) * | 2008-08-07 | 2012-06-20 | パナソニック株式会社 | Semiconductor memory device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4541090A (en) * | 1981-06-09 | 1985-09-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device |
JPS60115099A (en) * | 1983-11-25 | 1985-06-21 | Fujitsu Ltd | Semiconductor storage device |
KR920001082B1 (en) * | 1989-06-13 | 1992-02-01 | 삼성전자 주식회사 | Broad parallel write circuit |
JP2717712B2 (en) * | 1989-08-18 | 1998-02-25 | 三菱電機株式会社 | Semiconductor storage device |
JP2603145B2 (en) * | 1990-03-09 | 1997-04-23 | 三菱電機株式会社 | Semiconductor integrated circuit device |
JP2730375B2 (en) * | 1992-01-31 | 1998-03-25 | 日本電気株式会社 | Semiconductor memory |
-
1992
- 1992-05-06 JP JP11375692A patent/JP3251637B2/en not_active Expired - Lifetime
-
1993
- 1993-05-03 KR KR1019930007567A patent/KR950008458B1/en not_active IP Right Cessation
- 1993-05-05 US US08/056,919 patent/US5381372A/en not_active Expired - Lifetime
- 1993-05-06 DE DE69327858T patent/DE69327858T2/en not_active Expired - Lifetime
- 1993-05-06 EP EP93107367A patent/EP0569014B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0569014B1 (en) | 2000-02-16 |
JP3251637B2 (en) | 2002-01-28 |
KR930024022A (en) | 1993-12-21 |
JPH05312918A (en) | 1993-11-26 |
KR950008458B1 (en) | 1995-07-31 |
DE69327858D1 (en) | 2000-03-23 |
EP0569014A2 (en) | 1993-11-10 |
EP0569014A3 (en) | 1997-04-09 |
US5381372A (en) | 1995-01-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |