DE69313587T2 - Control device for a display device that improves the voltage setting - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the invention

The invention relates to a control circuit for a flat panel display device, and more particularly to a control circuit for a display device that receives a digital image signal to generate a display image having gray levels in accordance with the received digital image signals.

2. Description of the relevant technology

Fig. 1 shows a data driver which is an example of a conventional control circuit for driving a display device which receives digital image data to produce a display image having gray levels corresponding to the received data. For the sake of simplicity of explanation, it is assumed here that the digital image data consists of two bits (D0, D1). This data driver supplies control voltages to N pixels (where N is a positive integer) on a scanning line selected by a scanning signal.

Fig. 2 shows a circuit which forms part of the data driver of Fig. 1. This circuit, designated by the reference numeral 20, supplies a drive voltage via a data line to pixel "n" (where n is an integer from 1 to N) of the above-mentioned N pixels present along the single scanning line. The circuit 20 comprises sampling (primary) flip-flops 21, each for receiving one bit of the digital image data (D₀, D₁), holding (secondary) flip-flops 22, also each for receiving one bit, a decoder 23 and four analog switches 24 to 27. The analog switches 24 to 27 are supplied with signal voltages V₀ to V₃ from four different voltage sources, respectively. D flip-flops or various other flip-flops can be used as sampling flip-flops 21.

The circuit 20 shown in Fig. 2 operates as follows. Upon receiving the leading edge of a sampling pulse Tsmpn corresponding to the pixel "n", the sampling flip-flops 21 obtain the digital image data (D0, D1) and hold the data thus obtained. When such image data sampling for the pixels 1 to N on a single scanning line is completed (i.e., when the sampling for one horizontal period is completed), an output pulse OE is given to the holding flip-flops 22. When the latch flip-flops 22 receive the output pulse OE, they receive the digital image data (D�0, D�1) from the sampling flip-flops 21, and they transmit the thus obtained digital image data to the decoder 23. The decoder 23 decodes each bit of the digital image data (D�0, D�1), and turns on one of the analog switches 24 to 27 in accordance with the respective values of the thus decoded bits. As a result, one of the signal voltages V�0 to V₃ from the four different voltage sources, which corresponds to the thus turned on switch 24, 25, 26 or 27, is output from the circuit 20.

A conventional data driver as described above requires 2n different voltage sources (where n is the number of bits constituting the digital image data). In other words, the number of voltage sources required doubles when the digital image data is expanded by one bit. For example, if the digital image data consists of 4 bits to produce a display image of 16 gray levels, the number of voltage sources required is 24 = 16. Similarly, if the digital image data consists of 5 bits to produce a display image of 32 gray levels, the number of voltage sources required is 25 = 32. In the case of digital image data of 6 bits to produce a display image of 64 gray levels, the number of voltage sources required is 26 = 64.

Such power sources are switched to a display device such as a liquid crystal panel via the analog switches of the data driver, which places a heavy load on the power sources. Thus, each power source must have sufficient performance to drive such a heavy load. The increase in the number of such high performance power sources is a major factor in increasing the manufacturing cost of the entire control circuit. Furthermore, since high performance power sources cannot be easily arranged inside the LSI circuit constituting the control circuit, they must be placed outside the LSI circuit. This means that signal voltages for driving the liquid crystal panel must be obtained from external power sources. to the LSI circuit. As a result, as the number of power sources increases, the number of input terminals of the LSI circuit must be increased accordingly. It is extremely difficult to manufacture an LSI circuit having such a large number of input terminals. Even if it were possible to manufacture such an LSI circuit, assembly or manufacturing problems would arise in mass-producing it; in practice, it is impossible to mass-produce such LSI circuits.

Japanese Unpublished Patent Application No. 4-129164 has proposed an oscillating voltage driving method and a control circuit using this method to solve the problem in the above-described conventional driving method in which the number of voltage sources required corresponds to the number of gray levels to be generated. In the proposed method and the control circuit, external voltage sources are provided to supply gray level reference voltages, which are used to further obtain a number of interpolated voltages, so that both the gray level reference voltages and the interpolated voltages are used to generate gray levels. Thus, the number of gray levels that can be generated is larger than that of the voltage sources in the control circuit. Various types of data drivers using this oscillating voltage driving method have been put into practical use.

Fig. 3 shows a circuit 30 forming part of a data driver, which is exemplary of the proposed control circuit described above using the oscillating voltage drive method.

Table 1 shows the relationship between the voltages V0 to V7 applied to a pixel by the circuit 30 and gray-scale reference voltages V0, V2, V5 and V7 respectively supplied from four voltage sources. As shown in Table 1, the four voltages V1, V3, V4 and V6 applied to the pixels by the circuit 30 are interpolated voltages (V0 + 2V2)/3, (2V2 + V5)/3, (V2 + 2V5)/3 and (2V5 + V7)/3 respectively obtained from the four gray-scale reference voltages V0, V2, V5 and V7. The gray level reference voltages V0, V2, V5 and V7 and the interpolated voltages V1, V3, V4 and V6 generated from them are all used to generate gray levels. This means that with this data driver, eight gray levels can be obtained from only four gray level reference voltages, each supplied by the four voltage sources. become. (Table 1)

As described above, the proposed control circuit using the oscillating voltage driving method is advantageous in that the number of gray levels that can be achieved is larger than that of the voltage sources. However, this conventional control circuit has problems as described below.

Fig. 4 shows the relationship between the voltage applied to a pixel by the circuit 30 described above and the resulting transmittance of the pixel. The problems to be solved by the invention are described by using the voltage V₀ as an example. The voltage V₀ is used to achieve the lowest transmittance, i.e. the highest gray level (black).

As shown in Fig. 4, in the region of high voltage levels that result in transmittances close to 0%, the transmittance gradually approaches 0% as the voltage increases. Accordingly, the transmittance approaches 0% as the absolute value of the voltage V0 is increased to a practically possible level. In the circuit 30, the gray-scale reference voltage V0 is used to obtain the interpolated voltage V1 as shown in Table 1, so that it is extremely difficult to separately set the gray-scale reference voltage V0 and the interpolated voltage V1. If the voltage V1 is set so that an appropriate gray level can be obtained by applying this voltage V1 to a pixel, the voltage V0 is determined in accordance with the voltage V1. Conversely, if the voltage V0 is increased to a practically possible level, the gray-scale reference voltage V1 is used to obtain the interpolated voltage V1. is set so that an appropriate gray level can be obtained by applying this voltage V₀ to the pixel, the voltage V₁ is determined in accordance with the voltage V₀. In this example, the voltage V₀ is used only to generate the interpolated voltage V₁. However, as the number of bits constituting a digital image signal increases, the number of interpolated voltages to be obtained from the voltage V₀ increases. This makes it much more difficult to separately set the voltage V₀ and the interpolated voltages generated from it.

Therefore, this conventional control circuit has the following defect: even if, for example, a slight increase in the voltage V₀ would further darken a black image (i.e., the image with the highest gray level) to obtain higher contrast in the entire display image, it is actually impossible to increase the voltage V₀ without adversely affecting the other gray levels, such as those obtained by interpolated voltages, and even a small increase in the voltage V₀ may affect the characteristics of the gray levels for the entire display image. Therefore, a display device using this conventional control circuit cannot produce a high-contrast display image. This problem also occurs in the case of the voltage V₇ used to obtain the highest transmittance, i.e., the lowest gray level (white).

Document EP-A-0 478 386, on which the preamble of claim 1 is based, discloses a control circuit for a display device which outputs either a grey level reference voltage or an interpolated voltage between two grey level reference voltages. The lowest grey level reference voltage is used to obtain the lowest grey level and is interpolated with the next lowest grey level reference voltage to obtain the to obtain the lowest gray level.

The invention provides a control circuit for a display device having pixels, said control circuit in use applying a voltage to a selected pixel and comprising first voltage output means for generating at least one interpolated voltage based on grey scale reference voltages supplied by said voltage output means, said interpolated voltage being intermediate between two grey scale reference voltages, and selectively applying said interpolated voltage or one of said grey scale reference voltages to said pixel to achieve a desired grey scale display; characterised in that said control circuit further comprises second voltage output means for selectively supplying a first voltage higher than the highest of said grey scale reference voltages or a second voltage lower than the lowest of said grey scale reference voltages to said pixel to achieve the highest or lowest grey scale display, respectively.

In one embodiment of the invention, the voltage applied to the pixels by the second voltage output device is used to achieve the highest gray level.

In another embodiment of the invention, the voltage applied to the pixels by the second voltage output device is used to achieve the lowest gray level.

Thus, the invention described herein enables the advantages of providing a control circuit for a display device in which a voltage for producing the highest or lowest gray level, or voltages for producing both the highest and lowest gray levels, are provided separately from gray level reference voltages, so that the voltage(s) for the highest and/or lowest gray level(s) can be set separately from the gray level reference voltages, enabling the display device to produce a display image with the highest possible contrast for a liquid crystal panel.

These and other advantages of the invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1 is a schematic diagram showing the circuit of a conventional data driver.

Fig. 2 is a schematic diagram showing a circuit constituent part of the conventional data driver of Fig. 1.

Fig. 3 is a schematic diagram showing a circuit constituent part of another conventional data driver.

Fig. 4 is a graph showing the relationship between the voltage applied to a pixel and the resulting transmittance of the pixel.

Fig. 5 is a schematic diagram showing a circuit forming a portion of a data driver that represents an exemplary control circuit according to the invention.

Fig. 6 shows the waveform of a signal t as input to the selection control circuit 53 shown in Fig. 5.

Fig. 7 is a schematic diagram showing a circuit forming a portion of a data driver representing another exemplary control circuit according to the invention.

Fig. 8 is a graph showing the relationship between the voltage applied to a pixel and the resulting transmittance of the pixel.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The invention will be further described with reference to examples. Here, a matrix type liquid crystal display device is used as a display device to be controlled by a control circuit according to the invention. However, it should be noted that the control circuit according to the invention can also be used with other types of display devices.

Fig. 5 shows the structure of a circuit SO which forms part of a data driver illustrating a control circuit according to the invention. Circuit 50 corresponds to pixel "n" of N pixels present along each scanning line in a display device (where N is a positive integer and n is an integer from 1 to N). In this example, digital image data consists of three bits (D0, D1, D2).

The circuit 50 includes sample (primary) flip-flops 51 and hold (secondary) flip-flops 52, both for receiving and maintaining the digital image data. The circuit 50 also includes a selection control circuit 53, four analog switches 55 to 58 to which different gray-scale reference voltages are supplied, and an analog switch 54 to which a voltage different from the gray-scale reference voltages is supplied. The selection control circuit 53 individually turns the analog switches 54 to 58 on or off to control the on/off state thereof. The selection control circuit 53 receives a signal t. The output of the circuit 50 is connected to a data line (not shown) so that the voltage j output from the circuit 50 is supplied to the pixel "n" via the data line.

The term "grayscale reference voltage" is defined here as a voltage used to obtain at least one interpolated voltage by the oscillating voltage driving method as disclosed in the above-mentioned Japanese Patent Application No. 4-129164.

Next, the operation of the circuit 50 will be described with reference to Fig. 5. Upon receiving the leading edge of a sampling pulse Tsmpn corresponding to the pixel "n", the sampling flip-flops 51 receive the respective bits of the digital image data (D0, D1, D2) and hold the data thus obtained, thereby completing the sampling operation for the image data corresponding to the pixel "n". In the data driver, such image data sampling is carried out for all the above-mentioned N pixels as exist along a single scanning line (i.e., one sampling corresponding to one horizontal period is carried out). At the time when the sampling corresponding to one horizontal period is completed, an output pulse OE is given to the holding flip-flops 52. Upon receiving the output pulse OE, the latch flip-flops 52 receive the digital image data (D�0, D�1, D�2) from the sampling flip-flops 51, and also output the received digital image data to the selection control circuit 53. This selection control circuit 53 is provided with input terminals D�0, D�1, and D�2 and output terminals S�0', S�0, S�2, S₅, and S₇. The three bits of a digital image data (D�0, D�1, D₂) are respectively input to the input terminals D�0, D�1 and D�2 are input to the selection control circuit 53, respectively. This selection control circuit 53 outputs the control signals for turning on or off the analog switches 54 to 58, respectively, to control the on/off state thereof, through the output terminals S�0', S�0, S�2, S₅ and S₇. The analog switches 55 to 58 are supplied with respective gray scale reference voltages V�0, V₂, V₅ and V₇ having different voltage levels, respectively. The analog switch 54 is supplied with a voltage V�0' different from the gray scale reference voltages. The relationship between the levels of these voltages is as follows: V�0'> V�0 > V₂ > V₅ > V₇. Each of these voltages is only output to the data line when the corresponding analog switch 54, 55, 56, 57 or 58 is turned on.

Table 2 is a logic table showing the relationship between the input and output signals of the selection control circuit 53. The first section of Table 2 (i.e., the first three columns from the left) show the values of three bits as input to the input terminals d₂, d₁ and d₀ of the selection control circuit 53, respectively. The second section of Table 2 (i.e., the next five columns) show the values of control signals as output from the output terminals S₀', S₀, S₂, S₅ and S₇ of the selection control circuit 53, respectively. Each of the analog switches 54 to 58 is turned on when it receives a control signal of value 1 from the output terminal S₀', S₀, S₂, S₅ or S₇. to which it is connected, and it turns off when it receives a control signal with value 0 from the output terminal to which it is connected. Each blank space in the second section of Table 2 shows that the value of the control signal is . Each value "t" shows that the control signal has value 1 when the value of signal t is 1, and that the control signal has value 0 when the value of signal t is 0. Conversely, indicates that the control signal has value 0 when the value of signal t is 1, and that the control signal has value 1 when the value of signal t is 0. (Table 2)

Fig. 6 shows the waveform of the signal t described above. The signal t is a pulse signal that periodically changes between the values 0 and 1 with a duty cycle of 1:2. More precisely, the ratio of the time in which the signal t has the value 0 to the time in which the signal t has the value 1 is 1:2.

Next, the operation of the selection control circuit 53 will be described with reference to Table 2.

For example, when the values of the three bits input to the input terminals d₂, d₁ and d₀ are 0, 0 and 1, respectively, the control signals output from the output terminals S₀ and S₂ have the values of the signal t, respectively. When the signal t has the value 1, the analog switch 56 connected to the output terminal S₂ is turned on, with the other analog switches turned off, allowing the gray scale reference voltage V₂ to be output from the circuit 50 to the data line. When the signal t has the value 1, the analog switch 56 connected to the output terminal S₂ is turned on, with the other analog switches turned off, allowing the gray scale reference voltage V₂ to be output from the circuit 50 to the data line. value of 0, the value of 1 becomes, so that the analog switch 55 connected to the output terminal S₀ is turned on with the other analog switches being turned off, whereby the gray-scale reference voltage V₀ can be output from the circuit 50 to the data line. Since the value of the signal t periodically changes between the values 0 and 1 as described above, the voltage output from the circuit 50 to the data line becomes an oscillating voltage which oscillates between the gray-scale reference voltages V₀ and V₂ at the same cycle as that of the pulse signal t. The oscillating voltage thus applied to the pixel via the data line is an interpolated voltage whose level is given as follows: (V₀ + 2V₂)/3, which is between the voltage levels of the gray-scale reference voltages V₀ and V₂.

In the same manner as described above, oscillating voltages oscillating between the gray-scale reference voltages V2 and V5 and between the gray-scale reference voltages V5 and V7 are output from the circuit 50 to the data line and applied to the pixel, respectively. These oscillating voltages applied to the pixel are also interpolated voltages whose levels are between the voltage levels V2 and V5 and between the voltage levels V5 and V7, respectively. Therefore, since the gray-scale reference voltages V0, V2, V5 and V7 are all used to obtain interpolated voltages, they cannot be set separately from the interpolated voltages.

On the other hand, when all three bits input to the input terminals d2, d1 and d0 of the selection control circuit 53 are 0, a control signal of 1 is output from the output terminal S0' of the selection control circuit 53, so that the analog switch 54 connected thereto is turned on. The other analog switches 55 to 58 remain turned off. As a result, the voltage V0' is output from the circuit 50 to the data line. The circuit V0' is not used to generate any oscillating voltage, so that it can be set separately from all other voltages. Therefore, the highest gray level obtained using the voltage V0' can be darkened without affecting the other gray levels, whereby the display device can produce a display image with the highest contrast.

Fig. 7 shows the structure of a circuit 70 which forms part of a data driver which is exemplary of another control circuit according to the invention. The circuit 70 applies a voltage to the Pixel "n" of the N pixels present along each scanning line in the display device. The configuration of the circuit 70 is the same as that of the circuit 50 of Fig. 51 except that a selection control circuit 73 in the circuit 70 is provided with another output terminal S₇' which is connected to an analog switch 59 to which another voltage V₇' is supplied. The voltage V₇' is different from all of the gray scale reference voltages V₀, V₂, V₅ and V₇ and also from the voltage V₀'. The relationship between the levels of these voltages is as follows: V₇'> V₀ > V₂ > V₅ >V₇>V₇'. Detailed description of the other construction of the circuit 70 is omitted here.

In the same way as for the voltage V₀' in the circuit 50 of Fig. 5, the voltage V₇' can be set separately from the other voltages. Therefore, the lowest gray level obtained by the voltage V₇' can be set separately from the other gray levels. This will be described in detail below with reference to Table 3.

Table 3 is a logic table showing the relationship between the input and output signals of the selection control circuit 73. As shown in Table 3, when the values of all three bits input to the input terminals d₂, d₁, and d₀ of the selection control circuit 73 are 1, a control signal of 1 is output from the output terminal S₇' of the selection control circuit 73, so that the analog switch 79 connected thereto is turned on. The other analog switches 74 to 78 remain off. Accordingly, the circuit 70 outputs the voltage V₇' to the data line. The voltage V₇' is not used to obtain any oscillating voltage, so that it can be set separately from the other voltages. (Table 3)

Fig. 8 shows the relationship between the voltage applied to the pixel by the above-described inventive control circuit comprising the circuit 70 of Fig. 7 and the resulting transmittance of the pixel. As can be seen from Fig. 8, the voltage V0' is made higher than the highest gray level reference voltage V0, while the voltage V7' is made lower than the lowest gray level reference voltage V7. Accordingly, the voltages V0' and V7 are used to obtain the highest and lowest gray levels, respectively. As described above, since the voltages V0' and V7' can be adjusted separately from the other voltages, the highest and lowest gray levels obtained by them, respectively, can be adjusted without affecting the other gray levels. As a result, the display device using this control circuit can produce a display image with the highest possible contrast for a liquid crystal panel.

As described above, according to the invention, only the voltage V0 for producing the highest gray level, or the two voltages V0' and V7' for producing the highest and lowest gray levels, respectively, are provided so that they can be adjusted separately from the other voltages. Alternatively, only the voltage V7' for producing the lowest gray level may be provided so that it can be adjusted separately from the other voltages. In this case too, a display image with high contrast can be obtained in the display device.

According to the invention, one or two additional voltages (i.e., the above-mentioned voltages which can be independently set to produce the highest and/or lowest gray level) are supplied to the LSI circuit constituting the control circuit (i.e., the data driver), so that the number of terminals of the LSI circuit and the number of analog switches in the data driver increase accordingly. However, this increase can never be substantial. For example, to produce a display image of 64 gray levels from 6-bit digital image data, the conventional control circuit using the oscillating voltage driving method requires nine voltage sources. To produce the same display image, a control circuit according to the invention using an additional voltage which can be independently set to produce the highest or lowest gray level requires only one additional voltage source, i.e., ten voltage sources. Since the number of voltage sources is only increased from nine to ten, the number of input terminals of the LSI circuit is only increased from nine to ten, and the number of analog switches is only increased by one for each output terminal of the data driver. This shows that the increase in the number of terminals of the LSI circuit and the number of analog switches due to the increase in the number of voltage sources in the control circuit according to the invention is extremely small.

As described above, according to the invention, one or two voltages other than the gray level reference voltages are provided so that they can be set independently. Therefore, a voltage for producing the highest or lowest gray level or voltages for producing both the highest and lowest can be set independently of the other voltages. This enables a display image with the highest possible contrast for a liquid crystal panel to be produced while retaining the advantage of the oscillating voltage driving method in which the number of achievable gray levels is greater than that of the voltage sources.

Various other modifications will be apparent to and can be readily made by those skilled in the art. Accordingly, the scope of the invention should not be limited to the above detailed description, but rather by the appended claims.

Claims (1)

1. A control circuit for a display device having pixels, said control circuit in use applying a voltage to a selected pixel and comprising first voltage output means for generating at least one interpolated voltage based on grayscale reference voltages supplied by said voltage output means, said interpolated voltage being between two grayscale reference voltages, and selectively applying said interpolated voltage or one of said grayscale reference voltages to said pixel to achieve a desired grayscale display; characterized in that said control circuit further comprises second voltage output means for selectively supplying a first voltage higher than the highest of said grayscale reference voltages or a second voltage lower than the lowest of said grayscale reference voltages to said pixel to achieve the highest or lowest grayscale display, respectively.