DE69128017D1 - DISTRIBUTED COMPUTER SYSTEM - Google Patents

DISTRIBUTED COMPUTER SYSTEM

Info

Publication number
DE69128017D1
DE69128017D1 DE69128017T DE69128017T DE69128017D1 DE 69128017 D1 DE69128017 D1 DE 69128017D1 DE 69128017 T DE69128017 T DE 69128017T DE 69128017 T DE69128017 T DE 69128017T DE 69128017 D1 DE69128017 D1 DE 69128017D1
Authority
DE
Germany
Prior art keywords
computer system
distributed computer
distributed
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69128017T
Other languages
German (de)
Other versions
DE69128017T2 (en
Inventor
Hugo Simpson
Eric Campbell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MBDA UK Ltd
Original Assignee
Matra Bae Dynamics UK Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matra Bae Dynamics UK Ltd filed Critical Matra Bae Dynamics UK Ltd
Application granted granted Critical
Publication of DE69128017D1 publication Critical patent/DE69128017D1/en
Publication of DE69128017T2 publication Critical patent/DE69128017T2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
DE69128017T 1990-04-12 1991-04-12 DISTRIBUTED COMPUTER SYSTEM Expired - Lifetime DE69128017T2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB909008366A GB9008366D0 (en) 1990-04-12 1990-04-12 Data interaction architecture(dia)for real time embedded multi processor systems
PCT/GB1991/000578 WO1991016681A1 (en) 1990-04-12 1991-04-12 Computers

Publications (2)

Publication Number Publication Date
DE69128017D1 true DE69128017D1 (en) 1997-11-27
DE69128017T2 DE69128017T2 (en) 1998-02-19

Family

ID=10674368

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69128017T Expired - Lifetime DE69128017T2 (en) 1990-04-12 1991-04-12 DISTRIBUTED COMPUTER SYSTEM

Country Status (6)

Country Link
US (1) US5469549A (en)
EP (1) EP0477364B1 (en)
JP (1) JPH04507160A (en)
DE (1) DE69128017T2 (en)
GB (2) GB9008366D0 (en)
WO (1) WO1991016681A1 (en)

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US5442758A (en) * 1993-07-19 1995-08-15 Sequent Computer Systems, Inc. Apparatus and method for achieving reduced overhead mutual exclusion and maintaining coherency in a multiprocessor system utilizing execution history and thread monitoring
JP3490131B2 (en) * 1994-01-21 2004-01-26 株式会社ルネサステクノロジ Data transfer control method, data processor and data processing system
JP3385091B2 (en) * 1994-05-13 2003-03-10 三菱電機株式会社 Exclusive control device between computers
US5706439A (en) * 1994-09-27 1998-01-06 International Business Machines Corporation Method and system for matching packet size for efficient transmission over a serial bus
US6330583B1 (en) * 1994-09-09 2001-12-11 Martin Reiffin Computer network of interactive multitasking computers for parallel processing of network subtasks concurrently with local tasks
GB2308686A (en) 1995-12-20 1997-07-02 British Aerospace Integrated circuits for multi-tasking support in single or multiple processor networks
US6484208B1 (en) 1996-10-15 2002-11-19 Compaq Information Technologies Group, L.P. Local access of a remotely mirrored disk in a computer network
KR100240572B1 (en) * 1996-12-05 2000-01-15 윤종용 Multiprocessor system sharing program memory
US5961639A (en) * 1996-12-16 1999-10-05 International Business Machines Corporation Processor and method for dynamically inserting auxiliary instructions within an instruction stream during execution
US6212542B1 (en) 1996-12-16 2001-04-03 International Business Machines Corporation Method and system for executing a program within a multiscalar processor by processing linked thread descriptors
JPH117427A (en) 1997-06-13 1999-01-12 Takashi Minamitani Asynchronous digital system, asynchronous data pass circuit asynchronous digital signal processing circuit, and asynchronous digital signal processing method
US6014690A (en) * 1997-10-24 2000-01-11 Digital Equipment Corporation Employing multiple channels for deadlock avoidance in a cache coherency protocol
US6519686B2 (en) * 1998-01-05 2003-02-11 Intel Corporation Information streaming in a multi-process system using shared memory
US6018780A (en) * 1998-05-19 2000-01-25 Lucent Technologies Inc. Method and apparatus for downloading a file to a remote unit
US6263390B1 (en) * 1998-08-18 2001-07-17 Ati International Srl Two-port memory to connect a microprocessor bus to multiple peripherals
US6170041B1 (en) * 1998-09-24 2001-01-02 Integrated Silicon Soulution, Inc. Integrated circuit memory with a bus transceiver
JP2000231546A (en) * 1999-02-12 2000-08-22 Univ Hiroshima Shared memory
US7100000B1 (en) * 1999-05-28 2006-08-29 International Business Machines Corporation System and methods for processing audio using multiple speech technologies
US6282144B1 (en) 2000-03-13 2001-08-28 International Business Machines Corporation Multi-ported memory with asynchronous and synchronous protocol
US6799317B1 (en) 2000-06-27 2004-09-28 International Business Machines Corporation Interrupt mechanism for shared memory message passing
DE10303095A1 (en) * 2003-01-27 2004-08-12 Infineon Technologies Ag Data processing device
JP2005050286A (en) * 2003-07-31 2005-02-24 Fujitsu Ltd Network-node machine and information network system
DE102006048379B4 (en) * 2006-10-12 2008-11-06 Infineon Technologies Ag Method for throughput control of an electronic circuit and corresponding throughput control and associated semiconductor circuit
US7774286B1 (en) * 2006-10-24 2010-08-10 Harris Curtis L GPSTP with multiple thread functionality
US8135879B2 (en) * 2009-04-03 2012-03-13 National Instruments Corporation Four-slot asynchronous communication mechanism with increased throughput
US8775516B2 (en) * 2010-03-26 2014-07-08 Seiko Epson Corporation Projector system and connection establishment method
US8667230B1 (en) 2010-10-19 2014-03-04 Curtis L. Harris Recognition and recall memory

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FR1490612A (en) * 1966-06-14 1967-08-04 Progress S P A Lattice beam for reinforcement of reinforced concrete construction elements
US3566363A (en) * 1968-07-11 1971-02-23 Ibm Processor to processor communication in a multiprocessor computer system
FR2291545A1 (en) * 1974-02-20 1976-06-11 Honeywell Bull Soc Ind CONTROL DEVICE FOR DATA TRANSFERS BETWEEN CENTRAL PROCESSING UNITS
US4264953A (en) * 1979-03-30 1981-04-28 Honeywell Inc. Virtual cache
US4414624A (en) * 1980-11-19 1983-11-08 The United States Of America As Represented By The Secretary Of The Navy Multiple-microcomputer processing
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
EP0114839B1 (en) * 1982-06-28 1991-02-06 CAE-Link Corporation A high performance multi-processor system
IT1151683B (en) * 1982-07-06 1986-12-24 Honeywell Inf Systems ASYNCHRONOUS BUS MULTIPROCESSOR SYSTEM WITH LOADING OF MICRO INSTRUCTIONS FROM WORK MEMORY
US4648035A (en) * 1982-12-06 1987-03-03 Digital Equipment Corporation Address conversion unit for multiprocessor system
EP0389001B1 (en) * 1983-04-25 1997-06-04 Cray Research, Inc. Computer vector multiprocessing control
US4901230A (en) * 1983-04-25 1990-02-13 Cray Research, Inc. Computer vector multiprocessing control with multiple access memory and priority conflict resolution method
US4547880A (en) * 1983-05-13 1985-10-15 Able Computer Communication control apparatus for digital devices
US4567560A (en) * 1983-09-09 1986-01-28 Westinghouse Electric Corp. Multiprocessor supervisory control for an elevator system
NL8501143A (en) * 1985-04-19 1986-11-17 Philips Nv COMMUNICATION SYSTEM EQUIPPED WITH A FIRST-IN-FIRST-OUT BUFFER.
US4720780A (en) * 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
CA1285658C (en) * 1986-03-20 1991-07-02 Paul Yursis Cpu channel to cpu channel extender
US4845744A (en) * 1986-10-16 1989-07-04 American Telephone And Telegraph Company, At&T Bell Laboratories Method of overlaying virtual tree networks onto a message passing parallel processing network
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GB8711991D0 (en) * 1987-05-21 1987-06-24 British Aerospace Asynchronous communication systems
US5179665A (en) * 1987-06-24 1993-01-12 Westinghouse Electric Corp. Microprocessor information exchange with updating of messages by asynchronous processors using assigned and/or available buffers in dual port memory
US5027271A (en) * 1987-12-21 1991-06-25 Bull Hn Information Systems Inc. Apparatus and method for alterable resource partitioning enforcement in a data processing system having central processing units using different operating systems
JPH02310664A (en) * 1989-05-26 1990-12-26 Hitachi Ltd Communication system using shared memory
US5167028A (en) * 1989-11-13 1992-11-24 Lucid Corporation System for controlling task operation of slave processor by switching access to shared memory banks by master processor
US5123094A (en) * 1990-01-26 1992-06-16 Apple Computer, Inc. Interprocessor communications includes second CPU designating memory locations assigned to first CPU and writing their addresses into registers

Also Published As

Publication number Publication date
DE69128017T2 (en) 1998-02-19
GB9008366D0 (en) 1990-06-13
WO1991016681A1 (en) 1991-10-31
US5469549A (en) 1995-11-21
GB9107865D0 (en) 1991-05-29
JPH04507160A (en) 1992-12-10
GB2244356B (en) 1994-08-31
EP0477364A1 (en) 1992-04-01
EP0477364B1 (en) 1997-10-22
GB2244356A (en) 1991-11-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MBDA UK LTD., STEVENAGE, HERTFORDSHIRE, GB