DE69108442T2 - Pixel depth converter for a computer video display device. - Google Patents

Pixel depth converter for a computer video display device.

Info

Publication number
DE69108442T2
DE69108442T2 DE1991608442 DE69108442T DE69108442T2 DE 69108442 T2 DE69108442 T2 DE 69108442T2 DE 1991608442 DE1991608442 DE 1991608442 DE 69108442 T DE69108442 T DE 69108442T DE 69108442 T2 DE69108442 T2 DE 69108442T2
Authority
DE
Germany
Prior art keywords
display device
video display
pixel depth
computer video
depth converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE1991608442
Other languages
German (de)
Other versions
DE69108442D1 (en
Inventor
Steven Philip Larky
Alan Wesley Peevers
Clair Joe Christopher St
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69108442D1 publication Critical patent/DE69108442D1/en
Publication of DE69108442T2 publication Critical patent/DE69108442T2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/14—Display of multiple viewports
DE1991608442 1990-05-16 1991-04-15 Pixel depth converter for a computer video display device. Expired - Fee Related DE69108442T2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US52420190A 1990-05-16 1990-05-16

Publications (2)

Publication Number Publication Date
DE69108442D1 DE69108442D1 (en) 1995-05-04
DE69108442T2 true DE69108442T2 (en) 1995-10-05

Family

ID=24088207

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1991608442 Expired - Fee Related DE69108442T2 (en) 1990-05-16 1991-04-15 Pixel depth converter for a computer video display device.

Country Status (3)

Country Link
EP (1) EP0457039B1 (en)
JP (1) JPH0792660B2 (en)
DE (1) DE69108442T2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0572024A2 (en) * 1992-05-27 1993-12-01 Kabushiki Kaisha Toshiba Multimedia display control system for storing image data in frame buffer
CA2108730C (en) * 1992-12-07 1999-10-12 James Corona Apparatus for, and methods of providing a universal format of pixels and for scaling fields in the pixels
US5608864A (en) * 1994-04-29 1997-03-04 Cirrus Logic, Inc. Variable pixel depth and format for video windows
US6069613A (en) * 1997-10-16 2000-05-30 Phoenix Technologies Ltd. Basic input-output system (BIOS) read-only memory (ROM) including expansion table for expanding monochrome images into color image
US7502063B2 (en) * 2004-08-09 2009-03-10 Aptina Imaging Corporation Camera with scalable resolution
EP2362962A1 (en) * 2008-12-01 2011-09-07 Marvell World Trade Ltd. Bit resolution enhancement

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53114617A (en) * 1977-03-17 1978-10-06 Toshiba Corp Memory unit for picture processing
US4689807A (en) * 1985-11-06 1987-08-25 Texas Instruments Incorporated Linked cell discharge detector having improved response time
US4885576A (en) * 1986-04-02 1989-12-05 International Business Machines Corporation Soft copy display of facsimile images
WO1987007973A1 (en) * 1986-06-18 1987-12-30 Technology Inc., 64 A display processor
US4910687A (en) * 1987-11-03 1990-03-20 International Business Machines Corporation Bit gating for efficient use of RAMs in variable plane displays
US4916654A (en) * 1988-09-06 1990-04-10 International Business Machines Corporation Method for transfer of data via a window buffer from a bit-planar memory to a selected position in a target memory

Also Published As

Publication number Publication date
EP0457039A3 (en) 1992-05-06
EP0457039A2 (en) 1991-11-21
JPH07114371A (en) 1995-05-02
JPH0792660B2 (en) 1995-10-09
DE69108442D1 (en) 1995-05-04
EP0457039B1 (en) 1995-03-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee