DE69034174T2 - Semiconductor device and method for its production - Google Patents

Description

These The invention relates to a semiconductor device and a method for producing such a semiconductor device, and in particular a device in the form of an integrated circuit (IC) with a improved resistance across from a failure caused by mechanical stress, and a method of manufacturing such an IC device.

With a remarkable development in miniaturization and the increased Degree of integration of semiconductor devices, such as Memory IC devices powered by D-RAMs (Dynamic Random Access Memory) Access), the size of active areas (functional Areas) and a connection of such active areas made progressively smaller. That is, as the number of active Areas on a semiconductor chip with a certain size increases (i. H. a reduction in the size of the active Ranges), must be the size of the connections for connecting these active areas to each other necessarily be reduced or relocated to multiple levels.

There the interconnections are formed in a smaller size whose characteristic requirements are limited even more. That is, in addition to the problems of reduced electrical resistance, causing voltage drops an electromigration resistance as a result of the application of high Current densities, an ohmic Contact and contact at respective active areas or Shrinkage sections of interconnections, adhesions Insulation films (insulating layers), must also have the resistance across from a failure caused by mechanical stress, considered become.

One Failure that is caused by mechanical stresses is a mismatch the thermal expansion coefficient between a polycrystalline Metal or a single crystal metal containing the electrode lead forms a passivation film for covering such a polycrystalline Attributed to metal or a single crystal metal. A through mechanical stress induced failure is a phenomenon in that that the electrode line during the use of a semiconductor device as a result of a thermal Tension that is caused when the passivation film on high Temperatures for whose training is heated and then cooled to room temperature, precipitates.

The is called, a failure caused by mechanical stresses is a conduit fault, caused in the course of a discharge of thermal stress as a result of mismatch of thermal expansion coefficients between the electrode line and the passivation film. It occurs at grain boundaries and it is found out that the destroyed (cut) surface a (111) Level for the case of an Al-Si line is.

In the case a multilayer wire also has a hole (a contacting hole) arranged in an insulating layer between different Conductive layers is arranged, and this contacting hole is filled with a conductive material, for. B. by a Vorspannungs-dusting chemical vapor deposition (CVD) process, a CVD-W process, or a CVD-Al method to achieve inter-line connections. However, as the line width becomes narrower, so does the diameter of the contact hole narrow and this causes a current flows with high density to the interconnections, thereby the problem is posed that the electromigration resistance is worsened.

in the With regard to electromigration resistance to be improved must, when the electrode line is increasingly smaller, are experiments for arranging the electrode line with a single crystal metal z. In Japanese Unexamined Patent Application No. 37050/1989. However, the electrode lead, which is formed of a single crystal metal, in view of Impurity elements of the passivation film, with which the surface of the Electrode line is covered, a diffusion of a gas, and a moisture resistance and a resistance across from a caused by mechanical stresses failure of the electrode line not sufficiently reliable.

As a measure for improving the resistance to failure of the polycrystalline electrode line caused by mechanical stress, efforts have been made to suppress thermal stress by forming the passivation film at low temperatures, and efforts have been made around its grain boundaries to reinforce where voids occur by using an alloy represented by a lead with an Al-Si-Cu alloy to thereby precipitate an intermetallic compound at these grain boundaries. ever but these have not been satisfactory so far.

It are other electrode line arrangements. For example, reveal the Japanese unchecked Patent Applications Nos. 308348/1989 and 47951/1988 an arrangement, in which a polycrystalline metal electrode line with a metal high melting point or silicide or nitride covered with a high melting point metal. However, diffused in such an arrangement, the coated metal with high Melting point through the grain boundaries of the polycrystalline metal, whereby the specific resistance of the electrode line increases or its electromigration resistance and its resistance across from a failure caused by mechanical stress as a result the failures is improved at the grain boundaries. As a result, the electrode line tends to their reliability too to lose. For the case of an electrode lead with W coating on a lead, which was formed of an Al 2 wt% Si alloy, did not become Line failure of the coated W film is observed, while obvious line failures the Al-Si wire inside during Tests for detected a failure caused by mechanical stresses were confirmed, which confirmed has been that the electrode line was not sufficiently reliable.

Regarding the improvement of electromigration resistance, attention has been paid to the crystal orientation of a thin film forming the electrode line. The relationship between the electromigration resistance and the integrated intensity ratio (f ₍₁₁₁₎ / f ₍₂₀₀₎ ) of the (111) plane to the (200) plane, as determined by X-ray measurement, indicates that the larger the ratio, the better Electromigration resistance is (S. Vaidya et al., "Thin Solid Film", 75 (1981), pp. 253 et seq.) However, this publication does not refer to the extent of (111) orientation itself and, moreover, does not discuss resistivity at all a failure caused by tension.

As described above, it is to further reduce the sizes of Elements and an increase the degree of integration of the conventional Semiconductor devices desirable, that the problems are not just the provision of the electrode lead with sufficient electromigration resistance and resistance across from a failure caused by tension, but also the provision of adequate security measures for the worsened electromigration resistance and worsened resistance across from a voltage induced failure as a result of a Diffusion of impurities and water from the coated passivation film solved become.

Further the electrode line must be highly malleable, highly resistant to various forms thermal and chemical treatments during manufacturing processes, and be easy to manufacture or education to by to enable that highest reliable Consistent semiconductor devices are obtained.

With respect to the means for depositing a single crystal film, a method such as an ion beam sputtering method, a thermal CVD method, or an ion cluster beam deposition method is generally used to directly deposit a metal film on a (111) Si substrate, and this metal film is e.g. , B. exposed to a photo-etching process to form a pattern in a line. However, since it is difficult to deposit a given single crystal film on an interlayer insulating film such as SiO ₂ , and the relation between the crystal orientation and the single crystal conduction direction in the actual process is neglected, the procedure for depositing the single crystal electrode line is also a problem of worsened electromigration resistance and deteriorated resistance to failures caused by mechanical stress.

A The object of the present invention is therefore a semiconductor device to be provided with an electrode line whose electromigration resistance and their resilience across from failures, which are caused by mechanical stresses, improved are.

A Another object of the present invention is a semiconductor device to provide the reduction in the size of an active area, d. H. a high density arrangement.

Yet Another object of the present invention is a semiconductor device to provide that is functionally highly reliable.

Yet Another object of the present invention is a method to provide for easy manufacturing of a semiconductor device, that's the reduction in size of a active area allowed, d. H. a high density arrangement.

Yet Another object of the present invention is a method to provide for easy manufacturing of a semiconductor device, the highest reliable is functional.

The The present invention matches a semiconductor device with the claim 1 ready.

In show the drawings:

1 Fig. 10 is a plan view showing an example of an exemplary electrode line patterned on a semiconductor device according to the present invention;

2 . 4 . 6 . 8th . 10 . 11 . 15 . 16 . 18 . 20 . 22 . 23 and 36 characteristic diagrams each comparing the reliability evaluated on a semiconductor device in accordance with an example useful for understanding the invention and that of a comparative example;

3 (a) to (E) . 5 (a) to (E) , and 21 (a) to (E) ; 26 (a) to (E) . 30 (a) to (D) , and 31 (a) to (F) Cross-sectional views, each schematically showing the manufacturing process steps, useful for understanding the present invention;

7 Fig. 12 is a cross-sectional view showing another example of a semiconductor device useful for understanding the present invention;

9 (a) and (B) schematic views each showing the longitudinal cross-sectional view of the electrode line of a semiconductor device after the reliability evaluation;

12 . 24 . 25 . 32 . 33 . 34 and 35 Cross sectional views each showing the arrangement of the main portion of a thin film forming device used in forming a thin film for the electrode line of a semiconductor device useful for understanding the present invention;

13 Fig. 11 is a plan view showing an example of a stepped electrode line of a semiconductor device useful for understanding the present invention;

14 a cross-sectional view of the main portion of the semiconductor device, useful for understanding the present invention;

17 a characteristic diagram comparing the reliability evaluated on a semiconductor device according to the present invention and that of a comparative example;

19 (a) and (B) Cross-sectional views, each schematically showing a failure mechanism of the electrode line of a semiconductor device;

27 and 28 Cross sectional views each showing an example of the arrangement of a holder body or a cover of a semiconductor substrate; used in the formation of an electrode line thin film in a method of manufacturing a semiconductor device useful for understanding the present invention; and

29 Fig. 12 is a schematic view showing the manufacturing mode of an electrode line single crystal film in a method of manufacturing a semiconductor device useful for understanding the present invention.

In the semiconductor device, a single crystal electrode line which forms the electrode line which does not contain grain boundaries tends less to failure caused by mechanical stress. Of course, the electrode lead, which is formed of a single crystal metal, is subject to a mechanical stress that gradually relaxes in some form over the passage of time becomes. The research conducted by the inventor and others indicates that the stress applied to the electrode line made of a single crystal metal is relieved in the form of flaw formation. However, in the case where the closely packed plane of the single crystal metal is formed parallel to the conduit, it has been found that the defects extend only along the conduit direction and that there are no defects extending beyond the conduit growth.

Therefore can be a laminated electrode lead with an excellent resistance across from a failure caused by mechanical stress Arranging a single-crystal electrode line in such a Be obtained that the closely packed crystal plane of the Electrode line forming crystal parallel to the line direction runs. Although the arrangement, the most effective for improving the resistance across from is a failure caused by mechanical stress, the closely packed plane parallel to the longitudinal direction of the In this case, an arrangement, at the the closely packed plane and the longitudinal direction of the Lead an angle of 20 ° or less form, also a notable improvement in the resistance across from a failure caused by mechanical stress, provide. Angle of 10 ° or less represent an even better resilience to one Failure caused by mechanical stresses ready.

Even though the direction of the arrangement of interconnections of a semiconductor device in reality Diverse, the safety factor can be a resilience across from a failure caused by mechanical stress, with respect to the semiconductor device as a whole that can be the direction of a line that is the longest of the lines with different lengths, as a longitudinal direction of the lines for the semiconductor device and by arranging the tightly packed plane so around 20 ° or less with every line that defines the longitudinal direction, to form, and in addition by providing a thicker line width for any one Line orthogonal to such a line, which is the longitudinal Direction defined. For example, pure Al becomes a single crystal wiring material used. Since pure Al has the fcc structure, the angle becomes which is formed between the different directions of lines always connecting the individual elements (active areas) maintained at 60 °, so that each one of them Leads her longitudinal direction parallel to her tightly packed May have arranged level, giving the ability is improved, a voltage-induced failure unbearable.

Further does that Deposition of polycrystalline parts on or below or next to a single crystal line that causes defects be original on the single crystal lead to develop in these polycrystalline Sharing grows, which allows vacancies from the Single-crystal conduction eliminating the main line section form and localized bottlenecks be prevented by lines. Thus, an increase in the line resistance and reliability are prevented can be improved.

If Al polycrystalline metal is used, then the resistance across from a failure caused by mechanical stress Electrode lead increased by the arrangement that the normal Direction of the closely packed (111) plane of respective crystal grains 80 ° or less with that of the floor surface the line (the surface, in contact with the side of the active area through an insulating layer is) forms.

The closely packed level that could meet the above requirement in particular, the (111) plane one, the 60 ° or less with the plane which is normal to the longitudinal direction of the line. The term "narrow packed plane ", as it is often used here, is meant to be a level meaning that meets the requirement described above, and such a conduit is defined as a "highly oriented conduit".

It it goes without saying that any fcc structured single crystal conduction, which is different from those made of pure Al, as described above, as well as the improvement of the resistance across from a failure caused by mechanical stress, can contribute.

In other crystal structures, such as a closely packed plane bcc structure of (110) or a hcp structure with the tightly packed plane of (0001), the similar effects can be obtained by arranging that the closely packed Level 20 ° or less with the longitudi forms the normal direction of conduction and that the normal conduction direction of the close-packed plane of the grains of the polycrystalline line forms 80 ° or less with that of the bottom surface of the line (the surface which is in contact with the side of the active region through an insulating layer). Resistance to stress induced failure based on the crystal orientation rule can also be applied to single layer interconnects.

In the case, arranged at the interconnections in a multi-layered form are, can an excellent electromigration resistance and durability across from a failure caused by mechanical stresses thereby be achieved that recesses and projections of a z. B. rectangular, triangular, or trapezoidal Profile on the surface be provided a conductive layer, the specific Resistance 200 μΩ · cm or less in the lower layer or on the surface of a Insulation layer in the lower layer is. Because such Arrangement on the lower layer the orientation of a conductive Layer that is to be formed as an upper layer could improve. Consequently become the recesses and projections (grooves) described above preferably formed in the following manner: The bottom surface is parallel to the semiconductor substrate; the side wall surfaces form approximately 90 ° or less with the bottom surface; the groove width is approximately 0.5 to 1.5 μm; the depth is approximately 500 to 1500 Å; and the groove spacing is approximately 0.5 to 1.5 μm.

In the case a multilayer electrode line in which the lower layer surface is a is closely packed plane, which is oriented, and the normal line direction the tightly packed level 10 ° or less with that of the bottom surface of the bottom pipe of the upper one It is preferred that one of the layers forming the Forming a multilayer line of Al, Cu, Au, Ag or their alloys, consist.

In the present invention, illustrative materials include for forming an electrode lead such that the closely packed plane is parallel to the longitudinal direction of the lead:
fcc structured pure Al, Al-Cu, Al-Ti, Al-Cr, Al-Ta, Al-Mg, Al-In, Al-Li, pure Cu, Cu-Be, Cu-Ag, pure Au, Au-Pt Au-Ag, Au-Pd, Au-Cu, pure Ag, or bcc structured pure W. When the above-described alloys are used, it is desirable that the amount of addition of a solvent be within a range that allows one completely solid solution is formed. In this case, 1% by weight of Si may be contained as a solvent. In the interest of construction, it is desirable that the closely packed plane enter the upper surface; ie, the conduit is formed from a film of single crystal material oriented in the close packed plane.

It it is confirmed been that, then, if a heat-resistant metal or its silicide, nitride, oxide or carbide on the single crystal metal line or the highest oriented polycrystalline line is stacked to a reliability Make sure they are not only effective when using the electrode lead is formed of a single crystal metal with no grain boundary.

That is, Ti was applied to a silicon wafer surface with a thermally oxidized film by a sputtering method, and Al was applied to this Ti layer. The silicon wafer thus processed was then subjected to a thermal treatment at 450 ° C for 1 hour. As a result, Ti was detected on the surface of the Al layer. The analysis of Ti contained within the Al layer indicated a Ti separation in the grain boundary. In the similar manner, TiN was applied to a silicon wafer surface with a thermally oxidized film by a reactive sputtering method, and Al was coated on this TiN layer. The thus processed silicon wafer was then subjected to a thermal treatment at 450 ° C for 1 hour. The result, which is similar to the above result, was obtained. Further, an Al-0.5 wt% Cu alloy was deposited on a silicon wafer surface with a thermally oxidized film by the sputtering method, and Ta was again applied to the Al-0.5 wt% Cu alloy layer by the sputtering method. The thus processed silicon wafer was then subjected to a thermal treatment at 450 ° C for 1 hour. An analysis of the texture of the 1-0.5 wt% Cu alloy after such a thermal treatment indicated that TaCu _{2 was} precipitated at the grain boundary.

On the other hand, a single crystal Al was grown directly on a silicon wafer surface by a thermal CVD method using tri-isobutyl-aluminum (TIBA, [(CH ₃ ) ₂ CH-CH ₂ ] ₃ Al) as a material, and Ti was coated on the Al Layer applied. The thus processed silicon wafer was then subjected to a thermal treatment at 450 ° C for 1 hour. An analysis of the interface between the Al layer and the Ti layer showed no evidence that both layers reacted with each other.

In the present invention, illustrative materials for forming an electrode lead include by such an arrangement that the normal conduction direction of the closely packed plane of individual grains of a substance forming the electrode line is 80 ° or less with that of the electrode line bottom surface (the surface in contact with the side of the active region through an insulating layer fcc is structured pure Al, Al-Cu, Al-Ti, Al-Cr, Al-Ta, Al-Mg, Al-In, Al-Li; and their alloys; pure Cu, Cu-Be, Cu-Ag, and their alloys; pure Au, Au-Pt, Au-Ag, Au-Pd, Au-Cu, and their alloys; and pure Ag; or bcc structured pure W.

If the alloys described above are used it desirable that the amount of an addition of a solvent within the range that allows a completely fixed solution is formed. In this case, 1% by weight of Si as a solvent be included.

embodiments of the present invention and examples useful for understanding the Invention will now be described.

EXAMPLE 1 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film was formed in a thickness of 4000 Å on the surface of a (111) silicon substrate having active regions by a TIBA-based thermal CVD method. After identifying the crystal orientation thereof by an X-ray assisted Laue method, an electrode lead became 0.5 μm wide and 1 m long, as in FIG 1 shown, patterned and arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. A P-doped SiO ₂ (PSG) film further comprising a SiN film (by a plasma CVD method) was deposited 5,000 Å and 7,500 Å thick, respectively, to coat the surface of the silicon substrate with the electrode line thus patterned. The silicon substrate thus processed was then subjected to a high temperature test at 150 ° C. The curve A in 2 displays the results of the test. No line failure was observed at 150 ° C even after the lapse of 3000 hours.

For the purpose of comparison, an electrode lead formed under the same conditions except that it was formed of polycrystalline Al was subjected to the same high-temperature test. The results are as with a curve a in 2 shown.

EXAMPLE 2 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film 2 became 4000 Å thick on the surface of a (111) silicon substrate 1 formed with active areas by a TIDA-based thermal CVD method. Then, after identifying the crystal orientation thereof by an X-ray based Laue method, a W film was formed 3 on the single crystal Al film 2 1500 Å thick applied by a sputtering process, as in 3 (a) shown. Thereafter, an electrode line was patterned 0.5 μm wide and 1 m long so that the (111) plane could be parallel to the longitudinal direction of the line ( 3 (b )). Then there was a second W movie 3 ' 1500 Å thick applied by a tungsten fluoride-based CVD method ( 3 (c) ).

The thus arranged W film 3 ' was subjected to a highly anisotropic dry etching process to form a W-coated single crystal Al line ( 3 (d) ).

The silicon substrate formed with an electrode lead had a PSG film 4 5000 Å thick and further a SiN film 5 7500 Å thick by a plasma CVD method ( 3 (e) ) and was then subjected to a high temperature test at 150 ° C. The curve B in 4 displays the results of the test. No line failure was observed at 150 ° C even after the lapse of 3000 hours. Here, the term "line failure" is defined to be a time when the rate of increase in the wiring resistance exceeds 15%.

For comparison purposes, an electrode line formed under the same conditions except for being formed of polycrystalline Al was subjected to the same high-temperature test. The results are as in curve b in 4 shown. As apparent from the comparison, the electrode line comprising a single-crystal Al film showed excellent resistance to failure caused by mechanical stress.

Further, both interconnections were subjected to an electromigration test at 200 ° C. at a current density of 5 × 10 ⁶ / cm ² . While not a single line failure was detected in the electrode line comprising the single-crystal Al film, the electrode line of the comparative example fell after the Ab Run from 3000 hours.

EXAMPLE 3 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film 2 became 4000 Å thick on the surface of a (111) silicon substrate 1 formed with active areas by a TIBA-based thermal CVD method. Then, after identifying the crystal orientation thereof by an X-ray based Laue method, a Ti film was formed 6 on the single crystal Al film 2 1500 Å thick applied by a sputtering method, as in 5 (a) shown. Thereafter, an electrode line was patterned 0.5 μm wide and 1 m long so that the (111) plane could be parallel to the longitudinal direction of the line ( 5 (b) ). Then a TiN movie 7 7500 Å thick by a reactive Aufstäubungsverfahren applied ( 5 (e) ).

The thus arranged TiN film 7 was subjected to a highly anisotropic dry etching process to obtain a TiN-coated single crystal Al line ( 5 (d) ) to build.

The silicon substrate formed with an electrode lead had a PSG film 4 5000 Å thick and further a SiN film 5 7500 Å thick by the plasma CVD method ( 5 (e) ) and was then subjected to a high temperature test at 150 ° C. The curve C in 6 displays the results of the test. No line failure was observed at 150 ° C even after the lapse of 3000 hours. Here again, the term "line dropout" is defined to be a time when the rate of rise in line resistance exceeds 15%.

For comparison purposes, an electrode line formed under the same conditions except for being formed of polycrystalline Al was subjected to the same high-temperature test. The results are as with the curve e in 6 shown. As apparent from the comparison, the electrode line comprising the single-crystal Al film had excellent resistance to failure caused by stress.

Further, both interconnections were subjected to an electromigration test at 200 ° C. at a current density of 5 × 10 ⁶ / cm ² . While no single line failure was detected in the electrode line comprising the single crystal Al film, the electrode line of the comparative example precipitated after the lapse of 3000 hours.

EXAMPLE 4 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film 2 became 4000 Å thick on the surface of a (111) silicon substrate 1 formed with active areas by a TIBA-based thermal CVD method.

The single crystal Al film 2 was then subjected to a reactive ion etching process to form a 1 μm transmission. Thereafter, a SiN interlayer insulating film was formed 5 ' 8000 Å thick formed by a plasma CVD method and a contact hole 8th with a diameter of about 0.8 microns was then successively arranged by PEP and a dry chemical etching process.

After the contact hole 8th was arranged, the oxide film and the like from the bottom of the contacting hole 8th etched back and a single crystal Al film 2a was then formed again by the thermal CVD method and patterned into a line of 1 μm in width to thereby obtain a semiconductor device having such a multilayer line as in the cross-section of FIG 7 shown. In this case, the surface of the single-crystal Al film was used 2 which was exposed to the removal of the oxide film and the like as a nucleus for epitaxial growth. Thus, the Al film was also on the SiN layer 5 ' was formed, a single crystal construction.

For comparison purposes became a semiconductor device under the same conditions created, except that the contact hole through a thermal CVD was arranged without the back etching process to go to form the Al movie or was etched back and then dusted up, um to form the Al movie.

One hundred samples each of EXAMPLE 2 of the two-layer type and the comparative example formed as described above were prepared and subjected to evaluation of electromigration resistance at the contacting hole portion at 200 ° C with a current density of 5 x 10 ⁶ A / cm ² at the Contact hole section exposed. Upon detecting a line failure in half of the samples in which Al was filled in the contacting hole by a sputtering method, the supply of current was stopped and the contacting hole portion of each sample was observed.

The Contact hole of the samples according to EXAMPLE 4 had the single crystal Al grown from the Al line in the lower layer and at all no defects were detected within the contacting hole. On the other hand, in the samples, Al was in the contact hole filled by a dusting process, the contacting hole was not completely filled and thus showed 50 of 100 samples a line failure at the Al thin sections on the lateral Sides of the contact hole. In the samples, the Al in the contact hole filled by the thermal CVD method without passing through the back process to go was the grain size of Al as small as about 0.2 μm and a number of defects were observed at the grain boundaries. A line failure was noted at the contact hole section in 25 out of 100 samples recorded.

EXAMPLE 5 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film was formed 4000 Å thick on the surface of a (111) silicon substrate having active regions by a TIBA-based thermal CVD method. After identifying the crystal orientation thereof by an X-ray assisted Laue method, an electrode line as a pattern was then 0.5 μm wide and 1 m long in such a shape as in FIG 1 are shown, patterned and arranged so that the (111) plane of the single crystal Al film could be parallel to the longitudinal direction of the conduit. A boron and phosphorous-doped glass was deposited to coat the single crystal electrode line as an interlayer insulating film, and a bonding hole was disposed under this glass layer to connect the line. Thereafter, Al was applied to the glass layer 8000 Å thick by a sputtering method. Further, the deposited Al was patterned into a 1 μm wide and 1 m long line. Thereafter, a PSG film was deposited thereon at 5,000 Å thick and further a plasma SiN film 7500 Å thick as a protective film to thereby prepare a sample for a high-temperature test.

Then, this sample was subjected to a high-temperature test while exposed to the air at 150 ° C. The curve D in 8th shows the results of the test. No line failure was observed at 150 ° C even after the lapse of 3,000 hours in the single crystal Al electrode line of the lower layer.

For the purpose of comparison, a polycrystalline Al line whose bottom layer was applied by a sputtering method was processed into the dimensions similar to those of the present embodiment and then subjected to a similar high-temperature test. The curve D in 8th shows the results of the test. A line failure has been detected in this polycrystalline Al line, and therefore, it can be seen that the single crystal electrode line is superior in resistance to failure caused by mechanical stress to the polycrystalline electrode line.

EXAMPLE 6 USEFUL TO UNDERSTANDING THE INVENTION

After SiO _{2 was} deposited 8000 Å thick on a (100) silicon substrate having active regions, a (111) oriented polycrystalline Al film was formed 2000Å thick by a DC magnetron sputtering method, and an Al 3 wt% Mg alloy film was successively deposited thereon in 2000 Thick applied. Thereafter, the thus processed silicon substrate was sintered at 450 ° C for 15 minutes, the cross section of which was then subjected to transmission electron microscopy (TEM). While the grain size of the polycrystalline Al film was on the order of several microns, the grain size of the Al-3 wt% Mg alloy film was 1 to 3 mm.

By using the grains of the Al-Mg alloy film as a seed, a laser beam was then irradiated by moving in one direction. As a result, a single crystal almost 4 cm ² grew on the portion irradiated by the laser beam. This section was used as a pattern in an electrode lead of 0.5 μm width and 1 m length in the shape similar to 1 is structured. After applying a PSG film thereon to 5000 Å thick and further to a plasma SiN film 7500 Å thick, the electrode line was subjected to a high-temperature test at 150 ° C in air for 2000 hours.

For comparison purposes, a (111) oriented single crystal Al film was formed 4000Å thick on the surface of a (111) silicon substrate having active regions by a TIBA-based thermal CVD method, and the thus-arranged substrate became a pattern similar to the above processed, a PSG and plasma SiN films were formed thereon, and then subjected to a similar high-temperature test gene.

In As a result, the single crystal Al line fell as shown in EXAMPLE 6 did not look, but showed flaws at every several 10 to several 100 microns.

on the other hand showed for the case of the laminated lead with the polycrystalline Al and the single crystal Al-Mg of the polycrystalline Al lead portion not only flaws at every several microns, but also a line failure. However, the single crystal Al-Mg alloy line section had in the Upper layer no defects and was thus perfectly formed. This is because the application of the polycrystalline Al under the single-crystal Al electrode line allowed for voltages both within the single crystal sections as well as the polycrystalline ones Sections selectively into the grain boundaries of the polycrystalline section are expelled as defects, causing this mechanical Tensions are relieved. Therefore, the single-crystal Al electrode line could in the upper portion containing no grain boundaries, the Tensions without any damage loosen, whereby a predetermined line function is executed perfectly.

EXAMPLE 7 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film was formed 2000 Å thick on the surface of a (111) silicon substrate having active regions by a TIBA-based thermal CVD method. After identifying the crystal orientation thereof by an X-ray assisted Laue method, a polycrystalline Al film was deposited 2000 Å thick by a DC magnetron sputtering method (sputtering method). Thereafter, an electrode line as a pattern was 0.5 μm wide and 1 m long in such a shape as in 1 are shown, arranged and arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a PSG film was deposited 5000 Å thick and further a SiN film 7000 Å thick by a plasma CVD method to coat the silicon substrate formed with the electrode line, which was then subjected to a high temperature test at 150 ° C in air for 3000 hours has been.

For the purpose of comparison, a single crystal Al film was formed 4000Å thick on the surface of a (111) silicon substrate having active regions by the same TIBA-aided thermal CVD method patterned in an electrode line having dimensions similar to those of the present embodiment (however orientation was ignored) and was subjected to a similar high temperature test. The results of the test are shown in Table 1. The 9 (a) and (B) Fig. 15 are cross-sectional views of the pipe sections after the test was carried out. Although no line failure was detected in the single-crystal Al line of the comparative example, a defect became 9a with such a shape as in 9 (a) shown, observed. On the other hand, in the two-layer electrode line of EXAMPLE 7, in which a polycrystalline Al layer was deposited on the single crystal Al wiring layer, the Al polycrystalline wiring layer was shown 10 not just a number of wedge-shaped flaws 9b , as in 9 (b) but also a line failure, where, however, not a single defect and no conduction failure was detected in the single crystal conduction layer, thus maintaining its conduction function as specified. This is because the stress was selectively relieved at the grain boundaries of the polycrystalline wiring layer, thereby protecting the single crystal wiring layer.

TABLE 1

The Polycrystalline electrode line, at least above or next to the single crystal electrode line can be arranged from a material of either the same Kind like the single crystal electrode lead or another Be formed kind.

EXAMPLE 8 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single-crystal Al film was formed 4000 Å thick on the surface of a (111) silicon substrate having active regions by a TIBA-based thermal CVD method. After identifying the crystal orientation thereof by an X-ray assisted Laue method, a polycrystalline Al film was formed 3000 Å thick on the single-crystal Al film by a DC magnetron sputtering method. Further, a resist solution was applied to the substrate thus formed for development, and the polycrystalline Al film was partially etched so as to obtain a structure in which the polycrystalline Al film was partially laminated. Then, an electrode lead was patterned 0.5 μm wide and 1 m long in such a shape as shown in FIG 1 and was arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, PSG and then plasma SiN ₂ films were deposited 5000 Å thick and 7500 Å thick, respectively, to coat the silicon substrate formed with the electrode line, which was then subjected to a high-temperature test at 150 ° C in air for 3000 hours. The length of the polycrystalline Al film on the single-crystal Al was 1 μm, and the pitch between the polycrystalline Al films was 3 μm.

For comparison purposes Also, a single crystal Al electrode line was made by the same Method and similar in dimensions formed to the above (however, the orientation was no Attention paid) and was a similar high-temperature test subjected. Thereafter, three 1 cm long pieces were randomly sampled (sample Numbers 1 to 3), along the 1 m long pipe, and the number of flaws in every piece were counted. The results are shown in Table 2. Many defects were observed in the single crystal Al line of Comparative Example. However, the electrode line according to EXAMPLE 8 showed that the polycrystalline Al film was partially arranged on the single crystal Al wire, Defects in the polycrystalline Al part, but at all no defect in the single-crystal Al lead part, thereby the given conductivity was perfectly maintained. The reason is that the tensions in the single-crystal electrode line selectively in defects at the grain boundaries of the partially arranged polycrystalline Al metal were developed, which made it possible that the single crystal Al electrode line, which does not have grain boundaries contains relieve the mechanical stresses without any damage.

TABLE 2

Of the polycrystalline metal part in contact with the single crystal Al electrode line can be arranged from a material of either the same Kind like the single crystal electrode line exist as for the case of the above example, or of a different kind.

EXAMPLE 9 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Cu film was formed 2000 Å thick on the surface of a (111) silicon substrate having active regions by a thermal CVD method using bis-hexafluoroacetylacetonate-copper (Cu (HFA) ₂ ). After identifying the crystal orientation thereof by an X-ray assisted Laue method, a (100) oriented single crystal Al film was formed 2000 Å thick on the surface of the single crystal Cu film by a TIBA-assisted CVD method. Thereafter, an electrode lead was patterned 0.5 μm wide and 1 m long into such a shape as in 1 and arranged so that the Cu (111) plane could be parallel to the longitudinal direction of the conduit. Then, a PSG film and further a plasma SiN film were deposited 5000 Å thick and 7500 Å thick, respectively, to coat the silicon substrate formed with the electrode line to thereby prepare a sample for a high-temperature test.

The Sample was subjected to a high temperature test at 150 ° C in the air. When a comparative example was a polycrystalline Al lead through a conventional one Similar in terms of dimensions formed to those of EXAMPLE 9 and a similar one Subjected to high temperature test.

As a result, the single crystal laminated lead of EXAMPLE 9 did not show any lei failure at 150 ° C even after the expiry of 1000 hours. On the other hand, the polycrystalline Al of the comparative example began to show a line failure and defects after the lapse of 30 hours, and when 2000 hours had elapsed, all its lines had failed. The results are in 10 in which the curve E indicates the characteristic of EXAMPLE 9, whereas the curve e indicates that of the comparative example.

EXAMPLE 10 USEFUL TO UNDERSTANDING THE PRESENT INVENTION

One (111) oriented first single crystal Al thin film became 2000 Å thick the surface of a (111) silicon substrate with active regions by a TIBA-based thermal CVD method formed. After identifying the crystal orientation of which by an X-ray-assisted Laue Method, a (100) oriented second single-crystal Al thin film became 2000 Å thick the surface of the first single crystal Al thin film through the TIBA-based formed thermal CVD method.

The difference in orientation between the first and second crystal layers was controlled by changing the growth rate of each of the single crystal Al thin films. Thereafter, an electrode lead of 0.5 μm wide and 1 m long was patterned as shown in FIG 1 and arranged so that the Al (111) plane of the single crystal thin film of the upper layer was parallel to the longitudinal direction of the line. Thereafter, a PSG film and further a plasma SiN film were deposited 5000 Å and 7500 Å thick, respectively, to coat the silicon substrate formed with the electrode line to prepare a sample for a high temperature test.

The Sample was subjected to a high temperature test at 150 ° C in the air. When a comparative example was one about a thermal CVD process manufactured single crystal Al electrode with a single layer similar in dimensions formed to those of the present embodiment (however was the orientation and the like paid no attention) and became a similar one Exposed to high temperature test.

In As a result, the single-layered single crystal lead began of the comparative example to show a line failure after 10000 hours had elapsed, whereas where the single-crystal multilayer line according to the present Invention at all showed no failure.

In The arrangement as shown in EXAMPLES 9 and 10 became a Single crystal multilayer line, that does not contain grain boundaries, used and every line became a different crystal orientation given, which even if one causes a line failure Notch in a lead grows, the desired electric conductivity through the other wire with a different crystal orientation could be maintained, so that it is possible the unfavorable To suppress the effect of the notch developed within the lead. If the line was used with such an arrangement could therefore a resistance across from failures, which are caused by mechanical stresses, noteworthy to be controlled.

Even though the single crystal electrode line as several layers as often as required can be two or three layers are preferred. It is further desirable, that the line of the first layer parallel their closely packed plane has been arranged to the longitudinal direction of the conduit. The desirable orientation relationship between the first and second lines is such that: the <111> plane is 30 ° in a fcc / fcc structure oriented; the <110> level 45 ° in one bcc / bcc structure is rotated; the <111> fcc plane is 45 ° in relation to the <111> bcc level in the fcc / bcc Structure is rotated; the <111> fcc plane is 30 ° in relation to the <0001> hcp level in one fcc / hcp structure is rotated. However, it is in a bcc / hcp structure desirable, that the <100> bcc level is 30 ° in terms of turned to the <1121> level. Here, a satisfactory effect can be obtained, so long as the angle is within ± 10 °, or preferably ± 5 °. It is desirable that a similar one Relationship for the other third layer met is. However, it goes without saying that the orientational relationship among these crystal structures, not the examples as above specified, limited is.

EXAMPLE 11 USEFUL TO UNDERSTANDING THE PRESENT INVENTION

A (111) oriented single crystal Al thin film was formed 2000 Å thick as a first layer on the surface of a (111) silicon substrate having active regions by a TIBA-based thermal CVD method. The lower layer temperature at the time the first thin film was formed was 430 ° C and the growth rate was 8000 Å / min. After identifying the crystal orientation of the individual Crystal Al film with the substrate by a refraction method, a single crystal Cu thin film ((111) oriented) was 2000 Å thick (substrate temperature: 400 ° C) on the surface of the first single crystal Al thin film by a vacuum evaporation method and a single crystal Al film ((111) oriented) was applied thereon 2000 Å thick as a second layer in a manner similar to that in the first layer. Then, an electrode lead was 0.5 μm wide and 1 m long in such a shape as in 1 shown patterned and arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a PSG film and further a plasma SiN film of 5,000 Å and 7,500 Å thick, respectively, were coated to coat the substrate formed with the electrode line, which was then subjected to a high temperature test at 150 ° C in the air.

As a comparative example, a polycrystalline Al line prepared by the conventional DC magnetron sputtering method was formed in dimensions similar to those of EXAMPLE 11 by a conventional method and then subjected to a similar high-temperature test. As with the curve F in 11 As shown in Example 11, the single-crystal Al multilayer wire did not show a single line failure at 150 ° C after the lapse of 5000 hours, whereas the polycrystalline Al wire of the comparative example started line failures and defects only after 30 minutes. had expired, as shown by the curve f, and all lines thereof failed when 2000 hours had elapsed.

EXAMPLE 12 USEFUL TO UNDERSTANDING THE INVENTION

A (100) oriented single crystal Al-Si thin film was formed 2000 Å thick as a first layer on the surface of a (100) silicon active region substrate by a TIBA and silane-based thermal CVD method. The undercoat temperature at the time the first thin film was formed was 370 ° C, and the growth rate was 8000 Å / min. After identifying the crystal orientation of the single-crystal Al-Si thin film with the substrate by a diffraction method, Au was oriented 2000 Å thick (100) (substrate temperature: 400 ° C) on the surface of the first single-crystal Al-Si thin film by a vacuum Evaporation method was applied, and a single-crystal Al-Si film ((100) oriented) was applied thereon 2000 Å thick as a second layer in a manner similar to that in the first layer. Then, an electrode lead 0.5 μm wide and 1 m long was patterned as such as in FIG 1 and arranged so that the (100) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a PSG film and further a Si-enriched plasma SiN film, which is more susceptible to mechanical stress, were deposited 5000 Å and 15000 Å thick, respectively, to coat the silicon substrate formed with the electrode line, which was then subjected to a high-temperature test at 150 ° C was exposed in the air. As a comparative example, a single-layered single-crystal Al line manufactured by a thermal CVD method was formed in dimensions similar to those of EXAMPLE 12 by a conventional method, and was subjected to a similar high-temperature test.

In As a result, the single crystal Al lead began with a single Layer of the comparative example to show a line failure, after the 10000 hours test had ended, whereas the 10000 hours test Single-crystal Al multilayer wire according to EXAMPLE 12 at all showed no line failure.

As from EXAMPLES 5 and 12, when a single crystal thin film, formed of a material other than the multilayer single crystal thin film is between the layers of the multilayered single crystal thin film when laminating the single crystal lines has been arranged, can a notch when it grows be suppressed by the presence of this intermediate film. If the electrode line has such an arrangement, it exists at all no need the crystal orientation relationship between restrict the single-crystal lines, thereby allowing that such an arrangement is applied to different materials becomes. A suitable interposed thin film material is one, whose electrical resistance is smaller than that of the single-crystal line is. Illustrative combinations of the electrode line forming Materials include: (pure Al or Al alloy / pure Cu / pure Al or an Al alloy), (pure Cu or a Cu alloy / pure Ag / pure Cu or a Cu alloy), (pure W or a W alloy / pure Ag, pure W or a W alloy), and (pure Al or an Al Alloy / pure Au / pure W or W alloy).

The Electrode lead materials and the combinations of materials for the first and second line and the thin film arranged between them can not be limited to those above have been described.

EXAMPLE 13 USEFUL TO UNDERSTANDING THE INVENTION

A Si substrate with active regions and a thin SiO ₂ film disposed thereon were prepared. Then, a stepped pattern and a thin film forming apparatus whose main structure was formed in cross section in FIG 12 shown is produced.

The Si substrate 1 was on an electrostatic adsorbent substrate holder 12 held within the graded pattern and the thin film forming apparatus 11 was arranged. While the graded pattern and the thin film forming device 11 was evacuated to 10 ^-10 Torr, TIBA was passed through the surface of the Si substrate 1 adsorbed on the electrostatic adsorbent substrate holder 12 was held. Thereafter, TIBA was irradiated by an electron beam 14 from an electron gun 13 , whose beam diameter has been summarized to several angstroms, on the surface of the Si substrate 1 dissolved to form adjacent Al strips of 3 Å width and 8 Å in each cycle while the scan direction is through a deflection coil 15 was controlled. Thereafter, similar operation was carried out by a 90 ° rotation of the scanning direction to thereby obtain a lattice structure having a quaternary symmetry whose plan view in FIG 13 is shown.

Then it was from a K-cell 16 Al disposed within the graded pattern and the thin film forming apparatus, Al on the surface of the Si substrate 1 applied in ten atomic layers. After checking that each of these layers was a single crystal through a reflection type electronic diffractometer 17 , a (100) oriented single crystal Al film was formed 4000Å thick by a TIBA-based thermal CVD method. The underlayer temperature in this case was 430 ° C and the growth rate was 8000 Å / min.

The single-crystal Al film thus formed by the thermal CVD method was processed into an electrode lead of 0.5 μm width and 1 m length as in 1 and was arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000Å thick PSG layer was formed 4 and a 7000 Å thick plasma SiN layers 5 sequentially on the electrode line 18 to thereby form a semiconductor device having a cross section as in FIG 14 shown to form.

For the purposes of comparison, another semiconductor device was fabricated under the same conditions except that the electrode line 18 was made of a polycrystalline Al film obtained by a DC magnetron sputtering method.

These semiconductor devices were subjected to a high-temperature test at 150 ° C., the results of which are described in US Pat 15 are shown. In the figure, the curve G shows the characteristic of the example 13 in which no single line failure was indicated even after the lapse of 10,000 hours, whereas in the curve g indicating the characteristic of the comparative example, line failure defects were detected only after 30 hours had elapsed and all lines after 2000 hours had failed.

EXAMPLE 14 USEFUL FOR UNDERSTANDING THIS INVENTION

A Si substrate with active regions and a thin SiO ₂ film disposed thereon were prepared. Then, a stepped pattern and a thin film forming apparatus whose main arrangement was formed in cross section in FIG 12 shown (but the electrode gun was replaced by an ion source).

The Si substrate 1 was on an electrostatically bonded substrate holder 12 disposed within the graded pattern and the thin film forming apparatus 11 , held. While the graded pattern and the thin film forming device 11 was evacuated to 10 ^-10 Torr, TIBA was passed through the surface of the Si substrate 1 resting on the electrostatic adsorbent substrate holder 12 was held, adsorbed. Thereafter, TIBA was dissolved by an ion beam 14a from an ion source 13a , whose beam diameter was summarized at 1000 Å, on the surface of the Si substrate 1 was blasted to form adjacent Al strips of 1000 Å width and 2 μm in a repeated cycle while the scan direction was through a deflection coil 15 was controlled.

Then it was from a K-cell 16 Al disposed within the graded pattern and the thin film forming apparatus, Al on the surface of the Si substrate 10 applied in ten atomic layers. After checking that each of these layers was a single part, by an electronic one Reflection refraction measuring device 17 , a (111) oriented single crystal Al film was formed 4000Å thick by a TIBA-based thermal CVD method. The underlying temperature in this case was 430 ° C and the growth rate was 8000 Å / min.

The single-crystal Al film thus formed by the thermal CVD method was placed in an electrode lead of 0.5 μm width and 1 m length as in FIG 1 is shown, processed and arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000 Å thick PSG layer was formed 4 and a 7500 Å thick plasma SiN layer 5 sequentially on the electrode line 18 thereby to prepare a semiconductor device having a cross section as in FIG 14 has shown.

For comparison purposes, another semiconductor device was fabricated under the same conditions, except that the electrode line 18 from a polycrystalline Al film obtained by a DC magnetron sputtering method.

These semiconductor devices were subjected to a high-temperature test at 150 ° C., the results of which are described in US Pat 16 are shown. In the figure, the curve H showed the characteristic of the present EXAMPLE in which no single line failure was exhibited even after the lapse of 10000 hours, whereas in the curve h showing the characteristic of the comparative example, line drop defects were detected after only 30 hours had elapsed, and all lines failed after 2000 hours had elapsed.

EMBODIMENT 1

In the present embodiment has an electrode lead formed of a lower layer, whose crystal structure is hexagonal, and those in a multi-layered structure was trained, the ratio of c-axis to the a-axis of the hexagonal system set to 1.60 or more.

First, Ti, Zr, Mg, Zn, AlN or NbN was deposited 500 Å thick on a silicon substrate having active regions, and an 8000 Å thick SiO ₂ film was formed thereon by thermal oxidation. Then, an Al-1 wt% Si-0.5 wt% Cu film was deposited 4000 Å thick thereon by a DC magnetron sputtering method to form such a laminated film as shown below. The AlN and NbN films were formed by a reactive sputtering process.
Al-Si-Cu / Ti / SiO ₂
Al-Si-Cu / Zr / SiO ₂
Al-Si-Cu / Mg / SiO ₂
Al-Si-Cu / AlN / SiO ₂
Al-Si-Cu / Zn / SiO ₂
Al-Si-Cu / NbN / SiO ₂

The formed laminated films had 2θ (Al (111)) fixed by one X-ray diffraction measurement and the orientation distribution of Al (111) was determined by controlling measured by θ. The orientation distribution of the Al (111) showed the following full Width at half maximum, as shown in Table 3, on. In the table is also the ratio the c axis to the a axis of the hexagonal layer on the thermally oxidized layer is arranged, d. H. the surface (lower layer), with which Al-Si-Cu was in contact, also indicated. Here can the chemical composition of nitrides outside of stoichiometric Be requirements.

TABLE 3

As Table 3 shows the full width at half maximum of each Al-Si-Cu film whose c / a ratio of the hexagonal system Is 1,600 or more, 1 to 2 °, making them smaller than the full width at half maximum of Al-Si-Cu films whose c / a ratio is less than 1.600, which is 6 to 8 °. Thus, the Al-Si-Cu film is the highest (111) oriented.

The Al-Si-Cu / Ti / SiO ₂ film and the Al-Si-Cu / Mg / SiO ₂ film among the above samples were formed in interconnections each 0.5 μm wide and 1 m long as in 1 shown, designed as a pattern. Thereafter, a 5000Å thick PSG layer and a 7500Å thick plasma SiN layer were formed sequentially on the surfaces formed with the electrode line, thereby forming semiconductor devices.

These semiconductor devices thus produced were subjected to a high-temperature test at 150 ° C. for 4000 hours, the results of which are described in US Pat 17 are shown. In the figure, the curve I indicates the characteristic of the present embodiment in which no line failure was detected at all, even after the lapse of 4000 hours, whereas the curve i indicating the characteristic of the comparative example shows a line drop ratio of 50%. was observed after 4000 hours had elapsed.

In the case where each of the above-described laminated films was further multilayered as stated below, an effect or function similar to the above was observed.
Al-Si-Cu / Zr / Ti / SiO ₂
Al-Si-Cu / Mg / Ti / SiO ₂
Al-Si-Cu / AlN / Ti / SiO ₂
Al-Si-Cu / Zn / Ti / SiO ₂
Al-Si-Cu / NbN / Ti / SiO ₂

If the electrode lead of the above laminated structure of Al, Ag, Au, Cu or an alloy of two or more of the above elements was formed, could also be an effect or a function similar to the be observed above.

EXAMPLE 15 USEFUL TO UNDERSTANDING THE INVENTION

One Al film was 4000 Å thick by a Vakuumaufdampfunsverfahren on the surface of a (100) Silicon substrate formed with active areas and a thermally oxidized layer was formed thereon. The thus formed Film was an epitaxially grown polycrystalline film at the Al <100> in the same orientation as the silicon substrate was <100>. All normal lines of the closely packed {111} plane of the Al polycrystalline Films made 80 ° or less with the floor area the line, d. H. the normal conduction of the silicon substrate.

The Al polycrystalline film was processed into an electrode lead of 0.5 μm width and 1 m length as in 1 shown. Thereafter, a 5000Å thick PSG layer and a 7500Å thick plasma SiN layer were sequentially deposited on the surface formed with the electrode line to fabricate a semiconductor device.

For comparative purposes, an Al polycrystalline film was also prepared by a sputtering method. The grains of this film were oriented <111> and 7% of the grains had an angle> 80 ° formed between the normal conduction direction of the closely packed plane and the bottom surface of the line, ie the normal conduction direction of the silicon substrate surface. This Al polycrystalline film was processed into an electrode lead of 0.5 μm width and 1 m length, as in 1 shown. Thereafter, a 5000 Å thick PSG layer and a 7500 Å thick plasma SiN layer were sequentially deposited on the surface formed with the electrode line to thereby manufacture semiconductor devices.

The semiconductor devices thus produced were subjected to a high-temperature test at 150 ° C over 3000 Hours exposed, the results of which in 18 are shown. In 18 the curve J indicates the characteristic of the present embodiment in which no line failure was exhibited even after the elapse of 3000 hours, whereas in the curve j, the characteristic of the comparative example is shown, the percentage error percentage being 70%.

The growth of voids was observed after the semiconductor devices were overhauled after the above test, the results of which are schematically shown in FIGS 19 (a) and (B) are shown. As in 19 (a) For example, in the case of the present embodiment in which the polycrystalline line was epitaxially grown in the <100> orientation, the growth of voids was detected, but no line failure was observed. On the other hand, the comparative example had voids growing along the closely packed plane substantially vertical to the conduction bottom surface, and the conduction failed through the slit-like defects.

EXAMPLE 16 USEFUL TO UNDERSTANDING THE INVENTION

A 200 Å thick Zn layer, a 500 Å Zn layer and a 4000 Å Al film were sequentially applied to the surface of a magnetron sputtering process Silicon substrate formed with active areas and a 8000 Å thick thermally oxidized layer was formed thereon and then at 450 ° C for 15 minutes sintered. While the silicon substrate temperature at the time the Zr film grows was left to stand at room temperature, 100 ° C, 200 ° C, 300 ° C and 500 ° C were other processes performed at room temperature.

The above laminated films were processed into an electron line of 0.5 μm width and 1 m length as in 1 shown. When the electrode line was subjected to X-ray diffraction measurement under this condition, Al (111) was oriented, reflecting the closely packed plane of the fcc structure s; and Zr was (002) oriented, which is the close packed plane of the hcp structure. The orientation distribution of Al and Zr was measured by fixing 2θ and driving only θ (θ scanning) by the X-ray diffraction to thereby measure the angle between the normal line direction of the closely packed plane of Al and Zr and that the line bottom surface is formed. The results are shown in Table 4.

TABLE 4

As Table 4 shows, when the substrate temperature at the time to which the Zr film was formed, changed, then this also does the crystal orientation distribution of Zr and Al.

After that became 5000Å thick sequentially PSG layer and a 7500 Å thick Plasma SiN layer sequential applied on the surface formed with the electrode line, to thereby form semiconductor devices.

These semiconductor devices were subjected to a high-temperature test at 150 ° C. for 4000 hours, the results of which are as in 20 shown. In 20 Curves K ₁ , K ₂ , K ₃ , K ₄ and K ₅ are displayed in accordance with the room temperature, 100 ° C, 200 ° C, 300 ° C and 500 ° C. In this laminated wiring structure, no line failure was detected at all in the case where the angle formed between the normal line direction Zr closely packed plane and that of the line bottom direction is 10 ° or less.

EXAMPLE 17 USEFUL TO UNDERSTANDING THE INVENTION

A 200 Å thick B-layer, a 500 Å Zr or Ti layer, a 4000 Å thicker Al film were sequentially processed by a sputtering method on the surface of a Silicon substrate formed with active areas and a 8000 Å thick thermally oxidized layer was formed thereon and then at 450 ° C for 15 minutes sintered. While the silicon substrate temperature at the time the W and Zr or the Ti films were grown to room temperature, 100 ° C, 200 ° C and 300 ° C set was, other processes were carried out at room temperature.

The above laminating films were processed into an electrode lead of 0.5 μm width and 1 m length, as in 1 shown. When the electrode line was subjected to X-ray diffraction measurement under this condition, Al (111) was oriented, which is the close-packed plane of the fcc structure; and Zr or Ti was oriented (001), which is the closely packed plane of the hcp structure. The orientation distribution of Al, Zr and Ti was measured by fixing 2θ and driving only θ (θ scanning) by an X-ray diffraction measurement to thereby measure the angle that exists between the normal line direction of the closely packed plane of Al, Zr and Ti and that of the line bottom surface is formed. The results are shown in Table 5. The values shown on the left in the table are for the Al / Zr / W / SiO ₂ / Si structure, while those on the right are for the Al / Ti / W / SiO ₂ / Si structure.

TABLE 5

After that became 5000Å thick sequentially PSG layer and a 7500 Å thick Plasma SiN layer applied sequentially on the surface formed with the electrode line, thereby to manufacture semiconductor devices.

These Semiconductor devices were subjected to a high temperature test at 150 ° C over 4000 Hours exposed, the results of which are also in Table 5 are shown. In this laminated line structure, no Line failure at all for the Case detects that the angle between the normal line direction the closely packed plane of Zr or Ti, which form the lower layer, and that of the line bottom direction is formed, 10 ° or less is.

EXAMPLE 18 USEFUL TO UNDERSTANDING THE INVENTION

A 200 Å thick D layer, a 500 Å AlN layer and a 4000 Å Al film were sequentially passed through a sputtering process on the surface of a Silicon substrate formed with active areas and a 8000 Å thick thermally oxidized layer was formed thereon.

The above laminated films were processed into an electrode lead of 0.5 μm width 1.5 μm in length as in 1 shown. When the electrode line was subjected to X-ray diffraction measurement under this condition, Al (111) was oriented, which is the close-packed plane of the fcc structure; and Al-N was (0001) oriented, which is the close packed level of the hcp structure. The orientation distribution of Al and AlN was measured by fixing two θ and driving only θ (θ scanning) by X-ray diffraction to thereby measure the angle between the normal line direction of the closely packed plane Al and AlN and that the line bottom surface is formed.

The Results are that AlN was 4 ° and that Al was also 4 °.

Thereafter, a 5000 angstrom thick PSG layer and a 7500 Angstrom thick plasma SiN Layer applied sequentially on the surface formed with the electrode line to form semiconductor devices.

When These semiconductor devices undergo a high temperature test at 150 ° C over 4000 Hours exposed, showed the Al line on the AlN layer some flaws, but not a single line failure was observed.

For comparison purposes, a 2000 Å thick MoSi ₂ and a 4000 Å Al layer were formed on the thermally oxidized layer by a sputtering method. As a result of X-ray diffraction MoSi _{2 was} not oriented and Al was oriented (111). The angles formed between the normal conduction direction of the Al layer (111) (the closely packed plane) and that of the line bottom surface were distributed in the range of 20 ° or more. This Al layer was processed into an electrode lead of 0.5 μm width and 1 m length, as in 1 shown.

After that became 5000Å thick sequentially PSG layer and a 7500 Å thick Plasma SiN layer sequential formed on the surface formed with the electrode line, whereby semiconductor devices were produced.

When these semiconductor devices were subjected to a high temperature test at 150 ° C for 4000 hours, the Al line on the MoSi ₂ layer exhibited a number of voids and line failure, and the percentage of voids after the lapse of 4000 hours was 85 %.

EXAMPLE 19 USEFUL TO UNDERSTANDING THE INVENTION

A 200 Å thick Ti layer, a 500 Å thick TiN layer, a 4000 Å thicker Al film were sequentially processed by a magnetron sputtering method on the surface a silicon substrate formed with active areas and a 8000 Å thick thermally oxidized layer was formed thereon.

The above laminated films were processed into an electrode lead of 0.5 μm width and 1 m length, as in 1 shown. When the electrode line was subjected to X-ray diffraction measurement under this condition, Al (111) was oriented, which is the close-packed plane of the fcc structure; and Ti was oriented (002), which is the close packed plane of the hcp structure. The orientation distribution Al and Ti were measured by fixing 2θ and only driving θ (θ scanning) by an X-ray diffraction measurement to thereby measure the angle between the normal line direction of the closely packed plane and Al and Ti and that the line bottom surface is formed.

The Results are that Ti was 5 ° and that Al was also 6 °.

After that became 5000Å thick sequentially PSG layer and a 7500 Å thick Plasma SiN layer applied on the surface formed with the electrode line, then subjected to a high temperature test at 150 ° C for over 4000 hours has been. As a result, the Al line on the Ti layer actually showed no defects on.

For comparison purposes, a 2000 Å thick MoSi ₂ layer and a 4000 Å thick Al layer were formed on the thermally oxidized layer by a sputtering method. As a result of X-ray diffraction, MoSi _{2 was} not oriented and Al was oriented (111). The angles formed between the normal line direction of the Al layer (111) (the closely packed plane) and that of the line bottom surface were distributed in the range of 20 ° or more. This Al layer was processed into an electrode lead of 0.5 μm width and 1 m length, as in 1 shown. Thereafter, a 5000Å thick PSG layer and a 7500Å thick plasma SiN layer were sequentially deposited on the surface formed with the electrode line, which was then subjected to a high temperature test at 150 ° C for 4000 hours. As a result, the Al line on the MoSi ₂ layer showed a number of voids and line failure, and the percentage of voids after the lapse of 4,000 hours was 85%.

As from EXAMPLES 16 and 19, when a layer having Clock orientation on the bottom side of the electrode line between is arranged horizontally, so that the angle between the normal Direction of the line bottom surface and those of the narrow packed plane of a material that forms the electrode line, is formed, can be within a predetermined range, then can be the crystal orientation of the Al phase, which is the electrode line forms, be improved, reducing the total line failure is prevented.

EXAMPLE 20 USEFUL TO UNDERSTANDING THE INVENTION

A 2000 Å thick Cu layer 19 was prepared as a first metal layer by a magnetron sputtering method on the surface of a (100) silicon substrate 1 formed with active areas and a 8000 Å thick thermally oxidized layer 1a was formed on it ( 21 (a) ). The magnetron sputtering conditions were: a power output of 500 W, a pressure of 4 × 10 ^-3 Torr and a deposition time of 15 seconds.

The thus applied Cu film 19 was subjected to X-ray diffraction measurement to identify its crystal orientation. As a result, the Cu film was 19 oriented so that the <111> plane is vertical to the silicon substrate 1 and its full width at the maximum of the (111) diffracted wave measured by a θ scan method was 8-10 °.

Then a 0.5 μm wide and 0.1 μm deep recess (groove) 20 at a distance of 0.1 μm on the first metal layer (Cu film) 19 formed by a reactive etching process to thereby make the surface irregular ( 21 (b) ).

A 3000 Å Al film 10 was as a second metal layer on the irregular surface of the Cu film by a DC magnetron sputtering method ( 21 (c) ) applied. The deposition conditions in this case were similar to those in forming the first metal layer, except that the deposition time was 22.5 seconds. In 21 denotes a reference numeral 21 a contact hole filling material.

Then The formed Al film was subjected to a thermal treatment by rapid thermal annealing process at 500 ° C for 30 seconds exposed. If the crystal orientation of the Al film by a X-ray diffraction measurement (Θ-scanning) measured, then the full width was at the maximum of the (111) Refraction line approximately 1,6 °, what was a satisfactory orientation.

The laminated film was processed into an electrode lead of 0.5 μm width and 1 m length, and a 5000 Å thick PSG layer and a 7500 Å thick plasma SiN layer were sequentially deposited on the lead surface, which were then subjected to a voltage-induced breakdown test was suspended. The results of this are shown with the curve L in 22 shown. In the curve, the curve indicates 1 the results of a similar stress-induced failure test carried out on an electrode line for comparison which was identical, except that the surface of the first metal layer was not made irregular.

When the 0.5 μm-wide electrode line was subjected to an electromigration test with a current density of 5 × 10 ⁶ Å / cm ² at 200 ° C, its resistance was increased. This increase in resistance contributed to an improvement in life of about a factor of 10 times as long as the conventional Al-Si-Cu electrode line.

at the above arrangement, the recess or the irregularities, the on the surface of the first metal layer are formed, such shapes as rectangular, triangular or trapezoidal assume in cross section. Its width may be about 0.5-1.0 μm, its depth about 500-1000 Å and you Distance about 1.0-1.5 μm.

Further include in the above representations preferred metals for forming the second metal layer Al, Ag, Au and Cu and generally one, which of the same crystal system as the metal of the first Metal layer is and has a lower melting point than this having.

EXAMPLE 21 USEFUL TO UNDERSTANDING THE INVENTION

A 1000 Å thick TiN (resistivity: 200 μΩ · cm) layer was formed as a first metal layer by a DC magnetron sputtering method on the surface of a (100) silicon active region substrate, and an 8000 Å thick thermally oxidized layer was deposited thereon educated. The DC magnetron sputtering conditions were: a power output of 500 W, a pressure of 10 × 10 ^-3 Torr and a deposition time of 20 seconds.

The thus deposited TiN film was subjected to X-ray diffraction measurement to identify its crystal orientation. As a result, the TiN film was oriented such that the <111> plane was vertical to the silicon substrate 1 and whose full width at the maximum of the (111) diffracted wave measured by a scanning method was 8-10 °.

Then a 0.5 μm wide and 0.1 μm deep groove (recess) 20 formed at a pitch of 1 μm on the first metal layer (TiN film) by a reactive etching process, thereby making the surface irregular.

One 3000 Å thicker Al film was used as a second metal layer on the irregular surface of the TiN film applied by a DC magnetron sputtering method. The application conditions in this case were similar to those when forming the first metal layer, except that the application time was 30 seconds.

Then The formed Al film was subjected to a thermal treatment by fast thermal annealing process at 500 ° C for 60 seconds exposed. If the crystal orientation of the Al film by a X-ray diffraction measurement (Θ-scanning) was measured, then the full width was at the maximum of the (111) diffraction line approximately 1,8 °, what was a satisfactory orientation.

Of the laminated film was in an electrode lead of 0.5 μm width and 1 m in length processed and a 5000 Å thick PSG layer and a 7500 Å thick Plasma SiN layer were sequentially applied on the line surface, then exposed to a failure test with induced voltages has been. In the figure, the curve n denotes the results of a similar one with voltage induced failure tests, for an electrode lead executed for comparison was identical, except that the surface of the first metal layer was not made irregular.

When the 0.5 μm-wide electrode line was subjected to an electromigration test with a current density of 0.5 × 10 ⁶ A / cm ² at 150 ° C, its resistance was increased. This increase in resistance contributed to the improvement in life of about a factor of 10 times as long as the conventional Al-Si-Cu electrode line.

In the above arrangement, the groove (recess) or the irregularities, the on the surface the first metal layer are formed, such shapes as rectangular, triangular or trapezoidal assume in cross section. Its width may be about 0.5-1.0 μm, its depth about 500-1000 Å and you Distance about 1.0-1.5 μm.

Further include in the above representations preferred metals for forming the second metal layer (the conductive layer) Al, Ag, Au and Cu and generally a metal, which of the same crystal system like the metal of the first metal layer, its more specific Resistance 200 μΩ · em or less, and one melting point lower than this metal comprising the first metal layer. It is desirable that the second Metal layer of a thermal treatment at a temperature from 100-200 ° C lower as its melting point is exposed to it with a satisfied providing orientation. The second metal layer should be thermally treated for approximately 30 seconds to 5 minutes for the case of lamp annealing, and about 20 to 40 minutes in case an annealing in an electric arc furnace.

EXAMPLE 22 USEFUL TO UNDERSTANDING THE INVENTION

A silicon substrate having active regions and a 5,000 Å thick amorphous oxide layer formed thereon was prepared, and this silicon substrate was supported on a substrate holder 12a inside a vacuum vessel 22 placed in a thin film forming apparatus whose main portion is in cross section in FIG 24 is shown. After the vacuum vessel 22 was evacuated to 1 × 10 ^-10 Torr, the surface of the silicon substrate was heated to 1000 ° C and cleaned.

Thereafter, the temperature of the silicon substrate was set at 250 ° C, a temperature for forming a thin film. While Al is from a molecular beam petroleum (MBE) evaporation source 23 with a heater 23a was evaporated, became an electric discharge chamber 24 was evacuated to about 1 × 10 ^-5 Torr and a voltage was applied to an electric discharge electrode 25 to thereby start an electric discharge to dissolve the vaporized Al in a monoatomic (monatomic) form. Then, the Al dissolved in a monoatomic form was deposited on the silicon substrate by sealing 26 was opened. The electric discharge conditions were: a discharge gap voltage of 1 kV and a discharge current of 400 mA.

The Al film to be formed was grown at a growth rate of 10 μm / h with a high-energy reflection type electron diffractometer 17 during which its crystallinity was immediately observed. The thus formed Al film was exposed to a transmission electron microscope, the result of which was a satisfactory single crystal film with no defects. The surface of the Al single-crystal film was in contact with the amorphous oxide layer forming the close-packed plane.

The thus-formed single-crystal Al film was formed into an electrode lead of 0.5 μm width and 1 m length as in 1 and was arranged so that the closely packed plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000Å thick PSG layer and a 7500Å plasma SiN layer were formed sequentially on the surface formed with the electrode line, which was then subjected to a high temperature test at 150 ° C. The electrode line thus formed showed no line failure even after the lapse of 10,000 hours.

For comparison purposes, when a conventional MBE method was used in growing the single crystal Al and forming the Al film, the growth rate was 1 μm / h at the substrate temperature set at 400 ° C, thereby resulting in a longer time in the manufacture of semiconductor devices.

EXAMPLE 23 USEFUL TO UNDERSTANDING THE INVENTION

A silicon substrate having active regions and a 5,000 Å thick amorphous oxide layer formed thereon was prepared, and this silicon substrate was supported on a substrate holder 12a inside a vacuum vessel 22 placed in a thin film forming apparatus whose main portion is in cross section in FIG 24 is shown. After the vacuum vessel 22 was evacuated to 1 × 10 ^-10 Torr, the surface of the silicon substrate was heated to 1000 ° C and cleaned. Then, ozone were introduced, allowing the pressure inside the vacuum vessel 22 was increased to about 1 × 10 ^-8 Torr, and hydrogen adsorbed on the surface of the silicon substrate was replaced by oxygen.

Thereafter, the temperature of the silicon substrate was set at 250 ° C, a temperature for forming a thin film. While Al from an MBE evaporation source 23 with a heater 23a was evaporated, became an electric discharge chamber 24 was evacuated to about 1 × 10 ^-5 Torr, and a voltage was applied to an electric discharge electrode 25 thereby to initiate an electric discharge for dissolving the vaporized Al into a monoatomic form. Then, the Al dissolved in a monoatomic form was applied to the silicon substrate by opening a shutter 26 applied. The electric discharge conditions were: a discharge gap voltage of 1 kV and a discharge current of 400 mA.

The Al film to be formed was measured with a high energy reflection electron diffractometer 17 while the crystallinity was observed immediately for the first 10 atomic layers, and thereafter at a growth rate of 1-10 μm / h. The thus formed Al film was exposed to a transmission electron microscope, the result of which indicates that it is a satisfactory single crystal film having no film sites. The surface of the Al single crystal film was in contact with the amorphous oxide layer forming the close-packed plane.

The thus-formed single crystal Al film was inserted into an electrode lead of 0.5 μm width and 1 m length as in 1 and was arranged so that the closely packed plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000Å thick PSG layer and a 7500Å thick plasma SiN layer were formed sequentially on the surface formed with the electrode line, which was then subjected to a high temperature test at 150 ° C. The electrode line thus formed showed no line failure even after the lapse of 10,000 hours.

For comparison purposes became a conventional one MBE process for growing the single crystal Al and the Forming the Al film used. No single crystal Al grew up calmly.

EXAMPLE 24 USEFUL TO UNDERSTANDING THE INVENTION

A silicon substrate having active areas and a 5,000 Å thick amorphous oxide layer formed thereon was prepared, and this silicon substrate was placed on a substrate holder 12a inside a vacuum vessel 22 a thin film forming device laid, the main portion in cross section in 25 is shown. After the vacuum vessel 22 was evacuated to 1 × 10 ^-10 Torr, the surface of the silicon substrate was heated to 1000 ° C and cleaned.

Thereafter, the temperature of the silicon substrate was set at 250 ° C, a temperature for forming a thin film. While Al from an MBE evaporation source 23 with a heater 23a was evaporated, became an electric discharge chamber 24 was evacuated to about 1 × 10 ^-5 Torr and a voltage was applied to an electric discharge electrode 25 thereby to initiate an electric discharge for dissolving the vaporized Al in a monoatomic form. Then it was opened by opening a lock 26 causes the Al vapor, which is dissolved in a monoatomic form, to pass through a mass spectrograph 25 goes. Only a single atom with a single energy was separated; and the separated single atom was deposited on the silicon substrate. The electric discharge conditions were: a discharge gap voltage of 1 kV and a discharge current of 400 mA. In 25 denotes a reference numeral 28 a power supply for the accelerator electrode and 29 a power supply for the deceleration electrode.

The Al film to be formed was grown at a growth rate of 10 m / h with a high energy reflection type electron refractometer 17 while its crystallinity was immediately observed. The thus-formed Al film was exposed to a transmission electron microscope, the result of which was a satisfactory single crystal film with no defect. The surface of the Al single crystal film was in contact with the amorphous oxide layer forming the close-packed plane.

The thus-formed single crystal Al film was processed into an electrode lead of 0.5 μm width and 1 m length, as in 1 and was arranged so that the closely packed plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000Å thick PSG layer and a 7500Å thick plasma SiN layer were formed sequentially on the surface formed with the electrode line, which was then subjected to a high temperature test at 150 ° C. The electrode line thus formed showed no line failure even after the lapse of 10,000 hours.

For comparison purposes became a conventional one MBE process for growing the single crystal Al and the Forming the Al film used. No single crystal Al grew up calmly.

In the case of a semiconductor device operating under the same conditions as those of EXAMPLE 16 using the device as shown in FIG 25 was produced, an effect similar to that of the EXAMPLE embodiment was obtained.

EXAMPLE 25 USEFUL TO UNDERSTANDING THE INVENTION

As in 26 (a) is shown, other than that for forming a predetermined active area 1b on a P-type silicon substrate 1 was masked and then doped with As in amounts of about 10 ¹⁷ / cm ² to form an active area 1b for a drain to form. Then, as in 26 (b) showed an approximately 200 Å thick gate oxide film 1a on the silicon substrate 1 formed by a thermal oxidation on which a polycrystalline silicon film about 4000 Å thick as a gate electrode 1c was applied by a CVD method, which then into a gate electrode 1c was processed by photolithography.

An SiO ₂ film became 8000 Å thick on the gate electrode thus formed 1c and the silicon substrate 1 applied by a CVD method at atmospheric pressure, as in 26 (c) to thereby form a passivation film 30 and then this passivation film became 30 which is on the other area than the gate electrode 1c was formed, removed by photolithography.

Then, as in 26 (d) showed a 4000 Å thick Al film 2 on the silicon substrate 1 formed by a TIBA-based thermal CVD method in setting the substrate temperature at 430 ° C and the gas temperature at 250 ° C. If the Al film so formed 2 was identified by an X-ray supported Laue method, a single crystal on the silicon substrate 1 educated.

Thereafter, oxygen ions were passed through the single crystal Al film 2 accelerated to the other area than any active area 1b on the silicon substrate 1 implanted in amounts of about 10 ²¹ / cm ² . The silicon substrate was then subjected to a thermal treatment to oxidize the ion-implanted part and the crystallinity of the Al film 2 , whose orientation ver by an ion implantation was being oxidized. Thus, as in 26 (e) shown an insulation layer 31 formed from a mixture of Al ₂ O ₃ and SiO ₂ adjacent to the interface between the single crystal Al film 2 and the silicon substrate 1 is formed.

After separating each active area 1b through the mixed insulation layer 31 became the single crystal Al film 2 on the gate electrode 1c formed by photolithography and the single crystal Al film 2 on the silicon substrate 1 was processed into an electrode lead. Then, boron and boron-doped silicate glass were deposited by the atmospheric pressure CVD method to form an interlayer insulating film and a passivation film 32 to thereby form a semiconductor device.

When the semiconductor device thus formed is subjected to a high-temperature test at 150 ° C was exposed, the electrode leads showed no line failure at all, even after the lapse of 3000 hours. Thus, it has been proven that the single crystal Al lead film has excellent resistance across from a failure caused by mechanical stress, having.

For comparison purposes, an Al film was first formed by forming the SiO ₂ insulation layer 31 to separate each active area 1b formed by the CVD method and then by growing the Al film by the thermal CVD method thereon. In this case, it was impossible to obtain a single crystal Al; and only the polycrystalline Al grew up. Another semiconductor device in which the formed Al film was processed into an electrode line in an arrangement similar to the above showed a number of voids, including Al film electrode line failure in a 150 ° C high temperature test.

In this EXAMPLE, after the predetermined gate electrode was arranged and the insulating film was formed on the gate electrode and the like, the Al film and the like were grown by thermal CVD methods on the silicon substrate with the insulating film and the active regions around the insulating film before the Si-O ₂ insulation layer was formed to separate the active regions. Since the semiconductor substrate, for example, a silicon substrate, has a cubic structure, the single-crystal Al-film, which is of a similar crystal system, can be easily and accurately formed and thus serves as an Al line with excellent resistance to dropouts caused by mechanical stresses are caused.

EXAMPLE 26 USEFUL TO UNDERSTANDING THE INVENTION

This EXAMPLE also relates to a method of making a Semiconductor device and in particular for forming a single-crystal electrode line. To a single crystal electrode line on a conductive surface of a semiconductor substrate To form the process involves growing a metal single crystal film the process that a single crystal formed element in Contact with the conductive surface of the semiconductor substrate comes and causing a single crystal material on it is deposited so that it is in contact with such an element is, and the subsequent process to grow up the enraged Single crystal material from the side where the material in contact with the element is.

At the Forming this EXAMPLE, it is necessary, as described above, that causes the element made of a single crystal is in contact with the surface forming the conductor of the semiconductor substrate to come, and a suitable, made of a single crystal Element includes a holder body for supporting the semiconductor substrate or a cover with a through hole or a window arranged on the semiconductor substrate.

The 27 (a) to (E) show examples of the structure of the holder body for supporting the semiconductor substrate. A metal single crystal holder body 33 in 27 (a) has a recess part 33 on its upper surface for insertion of the semiconductor substrate 1 in there and on the semiconductor substrate 1 , which is an amorphous insulation layer 1a has arranged thereon, is in this recess part 33a inserted. The metal single crystal holder body 33 in the 27 (b) to (E) has a holder 33b arranged so as to project from its periphery and to the semiconductor substrate 1 is to be inserted with the formed on the surface amorphous insulation layer.

Using such a holder body, a single crystal material is applied to the surface of the semiconductor substrate by e.g. As a thermal CVD method, a dusting or a vacuum evaporation applied. As a result, a part of the grown film is also formed on the support body from which the crystal develops and extends to a grown film on the insulating layer of the semiconductor substrate to thereby form a single crystal over the entire surface. When the grown film is cut out at the interface between the holder body and the semiconductor substrate, e.g. By a laser beam after a predetermined film has been formed, a semiconductor substrate having a single-crystal conductive metal thin film formed thereon can be obtained. The 28 and 29 show examples of a single crystal cover 34 with a variety of perforations or windows 34a which are arranged on the surface of the semiconductor substrate. The through holes or windows 34a are formed in an inverted cone so that the cover can be separated from the semiconductor substrate after the single crystal material has been deposited.

If Such a cover is used is the single crystal film islanded on the surface of the semiconductor substrate. By removing the cover thereafter and by applying thereafter the single crystal material z. B. a thermal CVD method, a dusting or a vacuum evaporation, and by exposing the thus-processed substrate to a thermal Treatment, a given single crystal film can be applied to the insulation layer of the semiconductor substrate.

More specific examples will now be made with reference to the 30 (a) to (D) described.

A silicon substrate having active regions and an approximately 5000 Å-thick SiO ₂ film formed thereon was prepared, and an Al single-crystal cover (thickness: 1 mm, through-hole diameter: 1 mm, through-hole interval: 3 mm). whose structure is as in the 28 and 29 shown was covered on it. Then, a 1000 Å thick Al film was formed 2 island-shaped on the silicon substrate 1 by a TIBA-based thermal CVD method with a substrate temperature of 430 ° C and a gas temperature of 250 ° C and then subjected to a thermal treatment at 500 ° C for 30 minutes. By this thermal treatment, a single crystal grew within the Al film deposited on the part in contact with the cover.

Then a photoresist layer was made 35 arranged by a photo-etching process, as in 30 (a) shown; an etching process to thereby form an island-shaped Al single crystal film, as in 30 (b) shown. Thereafter, an oxide on the surface of the islet Al single crystal film was removed by a sputtering etching process. Then, a 7000 Å thick non-single crystal Al film was formed 10 ( 30 (c) ) on the silicon substrate 1 heated to 430 ° C again formed by the TIBA-assisted thermal CVD method with a gas temperature of 250 ° C and then subjected to a thermal treatment at 500 ° C for 30 minutes. By this thermal treatment, a single crystal was grown from the single crystal Al film and a single crystal Al film extended over the entire surface of the oxide layer 1a of the silicon substrate 1 , as in 30 (d) shown. the single crystal Al film 2 showed excellent orientation and had no grain boundary. After the single crystal Al film 2 on the silicon substrate 1 was processed into an electrode line, boron and phosphorus doped silicate glass was deposited on the electrode line and the like by a CVD method at atmospheric pressure, and an interlayer insulating film and a passivation film were formed to fabricate a semiconductor device.

The thus formed semiconductor device was subjected to a high-temperature test from 50 ° C exposed and show at all no line failure, even after the lapse of 3000 hours. Thus it was verified that the Single crystal Al lead film excellent resistance across from failures, which are caused by mechanical stresses and the like, having.

In the above description, a similar effect was obtained when using an amorphous layer containing P-doped SiO ₂ , boron and phosphorus-doped SiO ₂ or plasma SiN in place of SiO ₂ as an insulating layer on the silicon substrate.

EXAMPLE 27 USEFUL TO UNDERSTANDING THE INVENTION

As in 31 (a) were a 4000Å thick single crystal Al film 2 and also a 5000Å thick PSG film 4 sequentially on a (111) silicon substrate 1' which was heated to 430 ° C by a TIBA-supported thermal CVD method with a gas temperature of 250 ° C. On the other hand, as in 31 (b) showed a silicon substrate 1 made the 5000 Å thick PSG film 4 formed on the surface on which a predetermined active area 1b was arranged. These silicon substrates 1 and 1' were bonded by an epoxy adhesive so that the PSG films 4 and 5 contacted each other and then joined by fusion at a temperature lower than the melting point of Al.

Then, the silicon substrate became 1' That's the single crystal Al movie 2 deposited thereon, subjected to a lapping process to the silicon substrate 1' to cut, and then a chemical etching to the silicon substrate 1' completely remove ( 31 (c) ). After that, as in 31 (d) was shown a photoresist layer 35 on the exposed surface of the Al single crystal film 2 formed, and a contact hole 21 corresponding to the active area 1b on the silicon substrate 1 was arranged by a process of reactive ion etching ( 31 (d) ).

With the contact hole 21 was opened Al 2 ' arranged to the contact hole 21 by a thermal CVD method ( 31 (e) ), the difference in growth rate between the photoresist layer 35 and the active area 1b of the silicon substrate 1 was advantageously exploited. Then the photolock layer became 35 removed by a reactive ion etching process and the Al single crystal film 2 which was exposed by the reactive ion etching was processed into a 1 μm wide electrode line ( 31 (f) ,

After the single crystal Al-film 2 was processed into the electrode line, a PSG glass film and further an SiN film were sequentially deposited to a thickness of 5,000 Å and 7,500 Å, respectively, on the surface formed with the electrode line by a CVD method at atmospheric pressure, to thereby produce a semiconductor device ,

The thus formed semiconductor device was subjected to a high-temperature test at 150 ° C exposed and showed at all no line failure, even after the lapse of 3000 hours. Thus it is confirmed have been that the single crystal Al lead film excellent resistance across from a failure caused by mechanical stress and the like.

The present EXAMPLE was made by placing a metal single crystal film, which forms the electrode line, on the surface of a support substrate achieved so as to transfer, which advantageously the Fusion characteristic of an insulating layer with a relative low melting point formed on the metal single crystal film surface was.

EXAMPLE 28 USEFUL TO UNDERSTANDING THE INVENTION

The The present EXAMPLE also relates to the formation of an electrode lead and its main feature is that: the surface of a semiconductor substrate is treated by an ozone or oxygen plasma; a monoatomic Layer formed from a film-forming material on the treated surface is formed as an underlayer; and the film-forming material applied to the monoatomic layer by a CVD method becomes.

First, a single-crystal thin-film forming device whose schematic structure was shown in cross-section in FIG 32 shown is produced. This device included a surface treatment chamber 36 , an Atomic Beam Petroleum (ABE) chamber 37 and a CVD chamber 38 , where the chambers 36 . 37 . 38 through shut-off valves 39 are divided, and a semiconductor substrate 1 allowed for a treatment, between the chambers 36 . 37 . 38 and to be transported between the chamber and the environment.

The surface treatment chamber 36 includes a gas supply inlet 36a for supplying an ozone gas and the like and a gas outlet 36b , The ABE chamber 37 has a source of evaporation 37a and a single-atom discharge electrode 37b on. The CVD chamber 38 is of a conventional construction.

A silicon substrate 1 with active regions and a 3000 Å thick amorphous oxide layer (SiO ₂ ) on the surface thereof was prepared and became an ozone environment within the surface treatment chamber 36 exposed for 10 minutes. By this treatment, the free compound terminated by the hydrogen atom of the SiO ₂ film was cut off to be replaced by an oxygen atom and to remove the hydrogen atom in the form of H ₂ O.

Then, the thus-surface-treated silicon substrate became 1 in the ABE chamber 37 through the shut-off valve 39 transported into it. After the ABE chamber 37 was evacuated to 5 × 10 ^-10 Torr, the silicon substrate 1 heated to 400 ° C and Al was evaporated and on the silicon substrate 1 in amounts equivalent to a monatomic layer applied by the ABE cell.

After the application of the monoatomic layer, the thus processed silicon substrate became 1 in the Al-CVD chamber 38 through the shut-off valve 39 transported, and an Al film was almost 4000 Å on the silicon substrate 1 which was heated to 450 ° C by a TIBA-based thermal CVD method with a gas temperature of 250 ° C. The TIBA in the formation of the Al film was from a tank 30a , made gaseous by bubble formation, and introduced onto the surface of the silicon substrate in the form of a molecular flow, during which its temperature passes through a heating cell 38b was controlled.

Al film (film), on a silicon substrate 1 Was deposited from a reflection electron diffraction measurement and a transmission electron microscopy of its crystal orientation. As a result, a single crystal film showed excellent (111) and no grain boundary was observed.

Of the Single-crystal Al film was deposited in an electrode lead was processed and a PSG glass film and then a SiN film respectively 5000 Å and 7500 Å thick on the surface formed with the electrode line the CVD method with atmospheric Pressure were applied, subjected to a high temperature test at 150 ° C. As a result, there was no line failure on the electrode line, even after the lapse of 3000 hours, and it was confirmed that the single crystal Al lead film has excellent resistance across from a failure caused by mechanical stress and the like.

In the present EXAMPLE, the metal single crystal film constituting the electrode line was formed of Al. However, when Al was replaced by Cu, the similar results were obtained. The similar results were also obtained when the single crystal film was formed by a cluster ion beam (ICB) evaporation method in which a cluster of 10 ² to 10 ⁴ atoms is generated, ionized, and then accelerated into a monatomic layer on the surface of the silicon substrate Evaporation is formed.

EXAMPLE 29 USEFUL TO UNDERSTANDING THE INVENTION

First, a thin film forming apparatus whose schematic construction was described in 33 shown is produced. The main section of this device comprises a vacuum vessel 22 , a substrate holder 12a placed in an upper section of the vacuum vessel 22 is arranged, an MBE evaporation source 23 placed in a lower section of the substrate holder 12a is arranged, a cracker 39 that is between the MBE evaporation source 23 and the substrate holder 12a is arranged and a closure 26 ,

The cracker 39 includes, as in 34 shown on an enlarged scale, a cylindrical turbine chamber 39b with a heater 39a , solid multi-stage impellers 39e that are inside the turbine chamber 39b are arranged so that they are orthogonal to the axial line of the turbine chamber 39b are, a rotary impeller 39e which is rotated at high speeds by a motor which is radially on a rotary shaft 39d and between the fixed impellers 39e and the like is arranged. Thus, as in 35 shown are the cross-sectional profiles of the fixed impeller 39e and the rotary impeller 39e inclined to be so opposite to each other. Since the probability that a vaporized gas will be dissolved into atoms, is increased, and if z. B. the rotary impeller 39e is rotated in a circumferential direction, as shown by the arrow A, therefore, a suction force is generated in a direction of the arrow B by a pumping action, whereby a flow of the atoms of a film-forming substance from the evaporation source 23 to the substrate holder 12a is caused.

In the present EXAMPLE, an amorphous oxide film formed 5000 Å thick on a silicon substrate (single crystal) having a predetermined active area on the surface thereof was coated on the substrate holder 12a inside the vacuum vessel 22 placed the device described above, and then the vacuum vessel 22 evacuated to 1 × 10 ^-10 Torr. Then, the silicon substrate was heated to 1000 ° C and cleaned, and then ozone was introduced into the vacuum vessel so that the pressure therein would be about 1 × 10 ^-8 Torr, and hydrogen adsorbed on the surface of the silicon substrate was replaced with oxygen , Thereafter, the silicon substrate was heated to 250 ° C; Al was through the MBE evaporation source 23 evaporated; and the turbine chamber 39b was evacuated to approximately 1 × 10 ^-7 Torr while the surface temperature of the solid impeller 39c and the rotary shaft 39d to 700 ° C ge which is higher than the melting point of Al. As the rotary impeller 39e was activated to rotate so that its peripheral speed was 10000 rpm, which is a thermal speed, then became the shutter 26 opened just below the silicon substrate, and film formation was started while applying a mechanical energy to the vaporized Al from the evaporation source 23 through the cracker 39 was given.

The formation process was carried out while the crystallinity of Al that formed was with the high energy reflection electrode diffractometer 17 observed immediately. The first 10 atomic layers were formed while the growth was examined layer by layer; after that, provisions were made so that the formation process could proceed at a film-forming speed of 1-10 μn / hr, as in the case of formation of the single-crystal substrate. When the Al film thus prepared was subjected to transmission electron microscopy, it was indicated that the single crystal Al film had no defects at all.

The single-crystal Al film was inserted into an electrode lead of 0.5 μm width and 1 m length as in 1 is shown, processed and arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000Å thick PSG glass layer and then a 7500Å thick plasma SiN layer were sequentially deposited on the surface formed with the electrode line, which was then subjected to a high temperature test at 150 ° C. The result was that there was no line failure at all, even after the lapse of 1000 hours.

EXAMPLE 30 USEFUL TO UNDERSTANDING THE INVENTION

An Si substrate having active regions and a thin SiO ₂ film disposed thereon was prepared. Then, a graded pattern forming apparatus and thin films were produced whose main construction is in cross section in FIG 12 is shown.

The Si substrate 1 was on an electrostatically binding substrate holder 12 held within the educational device 11 was arranged for graded patterns and thin films. While the education device 11 for graded patterns and thin films was evacuated to 10 ¹⁰ Torr, TIBA became monomolecular in shape through the surface of the Si substrate 1 adsorbed on the electrostatic adsorbent substrate holder 12 was held. Thereafter, TIBA became by irradiating an electron beam 14 , whose beam diameter was summarized to several angstroms, on the surface of the Si substrate 1 and a terrace of adjacent Al strips of 3 Å width and 8 Å in a repeating cycle was formed, while the scanning direction through a deflection coil 15 was controlled.

Then it was from a K-cell 16 Al arranged on the surface of the Si substrate within the graded pattern thin film forming apparatus 1 applied in 10 atomic layers. After confirming that each of these layers was a single crystal through an electronic reflection diffraction measuring system 17 , the thus-processed silicon substrate was transported in a CVD apparatus (not shown). The graded pattern thin film forming apparatus and the CVD apparatus were connected to each other through a shut-off valve.

A (100) oriented single crystal Al film became 4000 Å thick on the Si substrate 1 formed inside the CVD apparatus formed by a TIBA-based thermal CVD method. The undercoat temperature in this case was 430 ° C and the film growth rate was 8000 Å / min. When the orientation relationship of the single-crystal Al film thus formed with the substrate was identified by diffraction measurement, a single crystal was observed. Further, no grain boundary and no crystalline defects such as lamination defects were found by a transmission electron microscopy.

The single-crystal Al film thus formed by the thermal CVD method was placed in an electrode lead of 0.5 μm width and 1 m length as shown in FIG 1 is shown, processed and arranged so that the (111) plane could be parallel to the longitudinal direction of the conduit. Thereafter, a 5000Å thick PSG layer and a 7500Å thick plasma SiN layer were formed sequentially on the surface formed with the electrode line, which was then subjected to a high temperature test at 150 ° C. As a result, no line failure occurred even after the lapse of 10,000 hours.

EXAMPLE 31 USEFUL TO UNDERSTANDING THE INVENTION

An Si substrate having active regions and a thin SiO ₂ film disposed thereon was prepared. Then, an education device for graded patterns and thin films, whose main construction is in cross section in FIG 12 shown, prepared.

The Si substrate 1 was on an electrostatically binding substrate holder 12 held within the educational device 11 was arranged for graded patterns and thin films. While the education device 11 for graded patterns and thin films was evacuated to 10 ^-10 Torr, monosilane (SiH ₄ ) became monomolecular in shape through the surface of the Si substrate 1 resting on the electrostatic adsorbent substrate holder 12 was held, adsorbed. Thereafter, monosilane became by irradiating an ion beam 14a , whose diameter was summed up to 5000 Å, on the surface of the Si substrate 1 and a terrace of juxtaposed Al strips of 5000 Å width and 2 μm in a repeating cycle was formed while the scan direction was through a deflection coil 15 was controlled.

Then it was from a K-cell 16 Al arranged on the surface of the Si substrate within the graded pattern thin film forming apparatus 1 applied in 10 atomic layers. After confirming that each of these layers was a single crystal through an electronic reflection diffractometer 17 , the thus-processed silicon substrate was transported into a CVD apparatus (not shown). The graded pattern thin film forming apparatus and the CVD apparatus were connected to each other through a shut-off valve.

A (100) oriented single crystal Al film became 4000 Å thick on the Si substrate 1 formed within the CVD apparatus by a monosilane-based thermal CVD method. The undercoat temperature in this case was 360 ° C and the growth rate was 500 Å / min. Since defects were present in the single crystal Si film immediately after lamination, the single crystal Si film was subjected to thermal treatment at 900 ° C for 30 minutes within the CVD apparatus. Then, the orientation relationship of the single-crystal Al film thus formed with the substrate was identified by diffraction measurement. The result was that a single crystal was observed. Further, neither a grain boundary nor any crystalline defects such as lamination defects were found by a transmission electron microscopy.

As can be seen from EXAMPLES 30 and 31 when a single crystal film for one Electrode line by placing a thin oxide layer on the surface of a Semiconductor substrate, for example, a silicon substrate formed becomes a monomolecular layer which is a film-forming atom contains adsorbed to form a step or terrace that as a nucleus of a crystal serves, and this monomolecular layer is dissolved, to form a monoatomic layer. Through the above process can be a satisfactory single crystal layer with a given Crystal orientation can be obtained. Thus, the monomolecular Layer not only by an electron beam or an ion beam, but also by irradiation of electromagnetic waves, such as X-rays and ultraviolet rays.

If Further, a straight step is used as a nucleus formation site becomes, grows a crystal into a pattern so that the most densely packed surface is parallel to the surface of the semiconductor substrate. If a pattern has two stages, the orthogonal to each other, includes growing a crystal such that the raised surface (100) is oriented. To have a crystal plane with a higher dimension too a pattern can be used which is geometric is analogous to the lattice site of such a crystal plane. In the case, that a single crystal thin film on the entire surface grown out of a relatively extensive semiconductor substrate Furthermore, a cyclic pattern may be used which is geometrically analogous to the lattice site of the crystal plane.

EXAMPLE 32 USEFUL TO UNDERSTANDING THE INVENTION

A Si substrate having active areas and an approximately 8000 Å thick SiO ₂ film formed thereon was prepared. A charging potential was cyclically applied to the SiO ₂ film of the Si substrate by irradiating an electron beam at an accelerated voltage of 20 kV. Thereafter, an approximately 4000 Å thick Al film was applied thereto by a DC magneton sputtering method. The sputtering conditions were: a power output of 500 W, a vacuum degree of 1 × 10 ^-3 , and a sputtering time of 30 seconds.

The above-applied Al film was subjected to X-ray diffraction measurement to identify the crystal orientation of the thus-deposited Al film. The result was that the Al film was oriented so that its <111> plane was vertical to the surface of the substrate and its full width at the maximum of the (111) diffracted line measured by a θ scanning method was 1-2 degrees , For comparison purposes, an Al film was grown on the SiO ₂ film without irradiating the electron beam (no cyclic charging potential was applied), and its full width at the maximum of the (111) diffracted line was measured. The result was 6 to 8 °.

The thus-formed single-crystal Al film was processed into an electrode line of 1.0, 0.6, or 0.4 μm width and 1 m length as in 1 shown. After a 5000 A thick PSG layer was deposited, the surface formed with the electrode line was subjected to a high-temperature test at 150 ° C, the results of which are shown in FIG 36 are shown. In the figure, the curve N indicates the characteristic of the present embodiment, while the curve n indicates the characteristic of the comparative example. As apparent from the figure, the present embodiment exhibited excellent resistance to stress-induced failures.

When an electrode line whose width was set to 3.3 μm was subjected to an electromigration test with a current density of 5 × 10 ⁶ A / cm ² at 200 ° C., its resistance was measured. From such a result, it was assumed that the life of the electrode line would be about 10 times as long as that of the conventional Al electrode line.

In the present EXAMPLE, the similar result was obtained when the above-described electrode line was replaced by a contact layer formed by arranging a contact hole on the 8000 Å-thick SiO ₂ film formed on the Si substrate and then a charging potential the SiO ₂ film was given by irradiating electron beam in the similar manner as above, thereby causing growth of Al to fill the contact hole.

In In the case of the present EXAMPLE, it is possible to use a conductive film with an aligned predetermined crystal orientation, by arranging a lead-forming metal film after one Insulating layer (film) was given a charging potential.

EXAMPLE 33 USEFUL TO UNDERSTANDING THE INVENTION

A (111) oriented single crystal Al film was formed 4000 Å thick on a (111) Si substrate with active regions by a TIBA-based thermal CVD method. Then, oxygen was implanted by ion implantation at an implantation energy of 400 KeV and in amounts of 10 ⁹ cm ² so that the oxygen could have a peak adjacent to the junction between the Al film and the Si substrate. In this ion implantation, the angle of implantation was set at 8 ° to prevent channeling.

To the oxygen implantation became the silicon substrate thus processed a thermal treatment at 450 ° C for 30 min. in a thermal Vacuum treatment furnace exposed. Then the Al film surface got through an upflow etched back, and Cu, Mg or Ti was etched on the Surface with applied different amounts by a Aufsträubung. After a thermal treatment at 450 ° C for 40 hours in the thermal vacuum treatment furnace to thereby homogenize the etched surface, For example, the silicon substrate processed so far was subjected to a Rutherford backscatter (RBS) process exposed. As a result, the composition of the Al film, as shown in Table 6.

The RBS analysis detects channeling, proving that the Al film was a single piece. Further, it has been observed that the implanted oxygen has evolved into Al ₂ O ₃ and SiO ₂ at the Al / Si interface.

TABLE 6

An Al single-crystal alloy film, which was isolated from the Si substrate by the above-described oxide film, was processed in a 0.5 μm wide and 1 m long electrode line as shown in FIG 1 and arranged so that the (111) plane was parallel to the longitudinal direction of the pipe. Then, a 5000Å thick PSG layer and a 7500Å plasma Sin layer were sequentially formed on the surface formed with the electrode line sequentially to thereby manufacture semiconductor devices.

When the semiconductor devices thus formed a high-temperature test at 150 ° C were exposed, the percentage of defects was on both Semiconductor devices 0%, even after the lapse of 10,000 hours. Table 6 also shows the line formability ⊙: excellent, O: satisfactory, X: bad) and the number of defects per unit length (pieces / cm).

In any of the above-described samples, the preferred compositions are from the viewpoint of moldability: Al-Cu alloy single crystal: 0.5 at% Cu or less Al-Ti alloy single crystal: 0.1 at% Ti or less Al-Mg Alloy Single Crystal: 0.5 at% Mg or less

Further For example, a method of preparing a single crystal alloy be such that a CVD gas is introduced at the time to which the CVD film is to be formed, or it may be an ion implantation be. When homogenizing the applied film after a thermal Treatment, the film can be an electron beam vapor deposition process or a resistance heating evaporation process, instead of a dusting (Sputtering).

Claims (3)

A semiconductor device comprising: a semiconductor substrate having active regions electrically insulated from each other on a predetermined surface thereof and an electrode line disposed on the semiconductor substrate through an insulating layer, the electrode line comprising a lamination of electrode line layers comprising a metal polycrystal layer consisting of crystal grains and wherein at least 95% of the crystal grains are arranged so that the normal direction of the closely packed planes of the crystal grains is 80 ° or less with the normal line direction of the bottom surface of the electrode line, and a second polycrystal layer provided below the metal polycrystal layer, the second one Polycrystalline layer a hexago having a crystal-like structure. A semiconductor device according to claim 1, wherein said relationship the c axis to the a axis of the hexagonal crystal is 1.60 or more is. A semiconductor device according to claim 2, wherein said second polycrystalline layer comprises Mg or AlN.