DE69027868T2 - Datenverarbeitungssystem mit Mitteln zur Zustandserkennung der Befehle empfangenden Datenverarbeitungseinrichtung - Google Patents

Datenverarbeitungssystem mit Mitteln zur Zustandserkennung der Befehle empfangenden Datenverarbeitungseinrichtung

Info

Publication number
DE69027868T2
DE69027868T2 DE69027868T DE69027868T DE69027868T2 DE 69027868 T2 DE69027868 T2 DE 69027868T2 DE 69027868 T DE69027868 T DE 69027868T DE 69027868 T DE69027868 T DE 69027868T DE 69027868 T2 DE69027868 T2 DE 69027868T2
Authority
DE
Germany
Prior art keywords
data processing
device receiving
status detection
receiving commands
processing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027868T
Other languages
English (en)
Other versions
DE69027868D1 (de
Inventor
Joseph Richard Mathis
Richard Raphael Oehler
Carl Zeitler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69027868D1 publication Critical patent/DE69027868D1/de
Publication of DE69027868T2 publication Critical patent/DE69027868T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
DE69027868T 1989-01-13 1990-01-10 Datenverarbeitungssystem mit Mitteln zur Zustandserkennung der Befehle empfangenden Datenverarbeitungseinrichtung Expired - Fee Related DE69027868T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29778089A 1989-01-13 1989-01-13

Publications (2)

Publication Number Publication Date
DE69027868D1 DE69027868D1 (de) 1996-08-29
DE69027868T2 true DE69027868T2 (de) 1997-02-06

Family

ID=23147712

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69027868T Expired - Fee Related DE69027868T2 (de) 1989-01-13 1990-01-10 Datenverarbeitungssystem mit Mitteln zur Zustandserkennung der Befehle empfangenden Datenverarbeitungseinrichtung

Country Status (4)

Country Link
US (1) US5444854A (de)
EP (1) EP0378398B1 (de)
JP (1) JPH0623966B2 (de)
DE (1) DE69027868T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5647056A (en) * 1992-11-18 1997-07-08 Canon Information Systems, Inc. Method and apparatus for managing access to a networked peripheral
US5860022A (en) * 1994-07-26 1999-01-12 Hitachi, Ltd. Computer system and method of issuing input/output commands therefrom
US5715475A (en) * 1994-12-29 1998-02-03 Intel Corporation Topological identification and initialization of a system for processing video information
US9282023B2 (en) * 2014-04-17 2016-03-08 Moxa Inc. Resistance arranging system and method based on RS-485 network

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3488633A (en) * 1964-04-06 1970-01-06 Ibm Automatic channel apparatus
US3833930A (en) * 1973-01-12 1974-09-03 Burroughs Corp Input/output system for a microprogram digital computer
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
US4604693A (en) * 1981-07-31 1986-08-05 Norand Corporation System and method for communication between nodes of a closed loop local communication path
US4514823A (en) * 1982-01-15 1985-04-30 International Business Machines Corporation Apparatus and method for extending a parallel channel to a serial I/O device
US4631666A (en) * 1982-10-25 1986-12-23 Burroughs Corporation Data transfer network for variable protocol management
US4593375A (en) * 1983-05-16 1986-06-03 Data General Corporation Read-write processor with internal diagnostic data path
JPS6020258A (ja) * 1983-07-15 1985-02-01 Nec Corp 入出力命令変換方式
GB8329509D0 (en) * 1983-11-04 1983-12-07 Inmos Ltd Computer
US4807109A (en) * 1983-11-25 1989-02-21 Intel Corporation High speed synchronous/asynchronous local bus and data transfer method
US4821174A (en) * 1984-03-20 1989-04-11 Westinghouse Electric Corp. Signal processing system including a bus control module
JPH07104826B2 (ja) * 1984-12-07 1995-11-13 日本電気株式会社 転送制御装置
US4751634A (en) * 1985-06-14 1988-06-14 International Business Machines Corporation Multiple port communications adapter apparatus
US4888684A (en) * 1986-03-28 1989-12-19 Tandem Computers Incorporated Multiprocessor bus protocol
US4876664A (en) * 1987-08-26 1989-10-24 Allen-Bradley Company, Inc. Programmable controller with a dual intermodule message system
US4885684A (en) * 1987-12-07 1989-12-05 International Business Machines Corporation Method for compiling a master task definition data set for defining the logical data flow of a distributed processing network

Also Published As

Publication number Publication date
EP0378398A3 (de) 1991-04-17
EP0378398B1 (de) 1996-07-24
EP0378398A2 (de) 1990-07-18
JPH02230450A (ja) 1990-09-12
US5444854A (en) 1995-08-22
DE69027868D1 (de) 1996-08-29
JPH0623966B2 (ja) 1994-03-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee