DE69012714T2 - Printer with thermal push button. - Google Patents

Abstract

A thermal print head (20) includes a plurality, e.g., three delay shift registers (31,32,33) operating by a clock-controlled shift scan to receive dot print signals (D) from a dot print signal generating circuit (10). The delay registers (31,32,33) have a number of addresses corresponding to the number of dot print elements (21) in the printer head (20). The dot print signals (D) from the delay shift registers (31,32,33) are applied to an OR gate (34) connected to shift registers (24) for the dot print elements (21). With this construction, the shift scan cycle it is set so that t </= T/(n + 1), where T is the least print cycle under normal printing conditions and n is the number of delay shift registers (31,32,33). The real time signals are obtained by sampling an analogue wave as a digitized value and counting the number of clock pulse needed to equal this digitized value, at which time a signal is given.

Description

The present invention relates to a thermal print head circuit including a thermal print head carrying linearly arranged dot or matrix printing elements to which are applied printing signals from shift registers undergoing clock-controlled shift scanning and having a number of addresses corresponding to the number of dot or matrix printing elements, a dot printing signal generating circuit being provided for outputting a dot printing signal just when the number of clock pulses, e.g. as counted by a counter, equals the level, e.g. in digitized form, of each of a series of input signals, e.g. by scanning a waveform, the printer being arranged to effect simultaneous, single-cell dot printing in accordance with the dot printing signals stored in the shift registers in response to the print command signals.

In a typical arrangement of this type of thermal print head used to produce dot printing with a high resolution force, e.g. by analog waveform sampling, the dot printing signals are fed at high speed to the shift registers built into the thermal print head and the dot printing elements can in principle be actuated at a corresponding speed.

In reality, however, the printing speed is so limited that the dot printing elements exothermically heat up to a heat sensitive card or recording.

According to this invention, a thermal print head circuit comprises: a thermal print head provided with a plurality of linearly arranged dot or matrix printing elements to which print shift registers are connected for clock-controlled shift scanning and which has a number of addresses corresponding to the number of dot elements; and

a dot print signal generating circuit for outputting dot print signals when the number of clock pulses from a clock reset for each scanning cycle is equal to the level of each of a series of input signals, and the print head is arranged to effect simultaneous one-line dot printing of the dot print signals loaded into and held in predetermined addresses of the print shift registers by shift scanning for each dot print shift scanning cycle, characterized by:

a plurality of serially connected delay shift registers undergoing synchronous clocked shift scanning into which the dot print signals output from the dot print signal generating circuit are input, each such register having a number of addresses corresponding to the number of dot print elements and operative to output a plurality of successive time delayed counterparts of each dot print signal; and

an OR circuit to which are applied the time-delayed counterparts of the dot pressure signals output from the delay shift registers and to which are applied the current real-time dot pressure signals, the cycle time of the clock-controlled shift scanning sequence of the shift registers being set according to the equation t = T/ (n+1), where T is the shortest printing cycle sufficient to cause the dot pressure signals to normally respond and n is the number of serially connected delay shift registers, and wherein the output signals of the OR circuit are supplied to the print shift registers of the thermal print head.

The present invention provides a thermal print head having improved resolving power through a noticeable improvement in the response speed of the dot printing elements by adding some electrical circuitry.

An embodiment of a thermal print head according to the present invention will now be described in more detail with reference to the accompanying drawings.

It shows:

Fig. 1 is a diagram useful for understanding the principle of the present invention;

Fig. 2 is a schematic diagram of an electrical circuit representing an embodiment according to the invention; and

Fig. 3(a) and 3(b) are diagrams useful in the operation of the embodiment of the invention shown in Fig. 2 and also the operation sequence according to the prior art.

As shown in Fig. 1, if n = 2 and t = T/3, during the shortest pressure cycle T with respect to the real time pressure D₱₁, D�0, D₁, D₂, etc., signals of the input waveform A are generated, which generate from the signal D�0 obtained during the sampling (o) two levels of interpolation pressure signals D�01 and D�02 which are successively delayed by the shift sampling cycles in which the interpolation of serially connected Delay shift registers are shifted. In the same way, connections of interpolation point pressure signals ... D₱₃�1, D₱₃�2; D₱�2₁, D₱₂₂; D₱₁₁, D₱₁₂; D₱₁₁, D₱₁₂; D₁₁, D₁₂; D₃₁, D₃₂... with respect to the real time pressure signals ...D₋₃, D₋₂, D₋₁, D₋₁, D₋₂, ... during the preceding and subsequent displacement sampling sequences for samples (-3), (-2), (-1), (0), (1), etc.

The shift registers of the thermal print head from the OR circuit are loaded with the dot print signals D-11 from the previous shift scan cycle (-1) and the dot print signals D-22 from the second previous shift scan cycle (-2), which have already been generated before the shift scan cycle (0) to form the dot print signal D0. Immediately after this shift scan is achieved, a one-line print is carried out simultaneously by the dot print elements. In this way, at the next shift scan for the scan (1) cycle, the first interpolation dot print signal D�01 delayed by one shift scan cycle t is printed, and at the subsequent shift scan cycle, the second interpolation dot print signal D�02 delayed by two shift scan cycles t is printed. Specifically, the thermal print head acts on the printing process at a speed three times as high as the shortest print cycle T with respect to the input waveform A. Even if each heating time is short, the driving process for the printing element is performed three times during the shortest print cycle T. As a result, the heating time typically increases, thereby performing printing with a higher resolving power under such conditions, so that any decrease in the setting properties is compensated.

With reference to Fig. 2, a circuit diagram of the thermal print head according to the invention is shown schematically.

In Fig. 2, numeral 10 generally denotes a dot pressure signal generating circuit for converting an analog waveform signal B to be input into a dot pressure signal. The circuit 10 is composed of an AC/DC converter 11 for digitizing the analog waveform signal B by sampling, a counter 12 for counting the number of clock pulses from the clock K for controlling the shift sampling, and a digital comparator 13 for outputting a coincidence signal as a dot pressure signal at a Hi level (logic 1) when the counted number of clock pulses corresponds to the digitized sample value of the waveform signal B generated by the AC/DC converter 11.

A thermal print head, generally designated 20, consists of 2048 exothermic elements or dot printing elements shown as resistors, gates 22 corresponding to elements 21 opening in response to print command signals, a latch circuit 23 for outputting latch signals for the addresses of the corresponding gates, and a shift register outputting to the latch circuit the dot printing signals corresponding to their addresses.

One cycle of the clock K is set to 0.25us (4 MHz), whereby one shift sampling cycle, i.e., the cycle in which the latch signal and the print command signal are generated, is determined as follows: 0.25us x 2048 = 512us. On the other hand, the shortest cycle at which the dot printing elements 21 normally respond is given by approximately 512us x 4 = 2048us.

Reference numerals 31 to 33 denote data interpolation shift registers, each of 2048 stages, with three shift registers being serially connected to separate parallel outputs. To be specific, the shift register 31 functions to hold, at the appropriate addresses, by shift scanning, the Hi level (logic 1) of the print signals applied thereto during each shift scanning by the dot print signal generating circuit 10. The shift registers 32 and 33 are arranged to receive, at the appropriate addresses, dot print signals transferred thereto in sequence from the corresponding stages of the preceding shift registers under the control of the clock K. 34 denotes an OR circuit for inputting the dot pressure signals, which receives directly from the dot pressure signal generating circuit 10 the delayed dot pressure signals from the parallel outputs of the three interpolation or delay shift registers 31 to 33.

The following description refers to the operation of the thermal print head constructed in this way.

At the first cycle, that is, at sample (0) for the four shift scanning cycles occurring during the shortest printing cycle of 2048 µs, the dot printing signal generating circuit 10 receives the input waveform signals B and thereafter generates the dot printing signals D₀ as an instantaneously digitized value corresponding thereto when the number of clock pulses counted by the counter 12 is equal to that of the digitized value. The real-time dot printing signals D₀ from sample 0 are again supplied in parallel to the OR circuit 34 and the shift register 31. The signal D₀ is therefore output in the form of the one-sample delayed dot printing signal D₀₁ from the shift register 31 during the next shift scanning cycle (1) and is thereafter fed into the shift register 32. During the following scan (2), the signal D₀ is also output in the form of a dot print signal D₀₂ delayed by two scans from the shift register 32 and is thereafter loaded into the shift register 33. During the shift scan cycle (3), the signal D₀ is output as a dot print signal D₀₃ delayed by three scans from the last shift register 33. The respective output signals from all three registers are thereafter applied in parallel to the OR circuit 34.

In this way, three shift sampling cycles sequentially generate time-delayed counterparts of the corresponding real-time pressure signals from the previous sampling cycles in a progressively changing manner. That is, each real-time signal is in turn converted into time-delayed counterpart signals as it is replaced by the next real-time signal in sequence, and so on.

In the same way, from the delay shift registers 31 to 33, the first interpolation dot print signal D-11 from the first preceding shift sampling cycle (-1), the interpolation dot print signal D-22 from the second preceding shift sampling cycle (-2), and the dot print signal D-33 from the third preceding shift sampling cycle (-3), which have already been generated at the time of generating the real-time dot print signals D-0, are loaded into the print shift register 24 via the OR circuit 34 by shift scanning. Thereafter, the signals D-0, D-11, D-22, and D-33 are shift scanned. in the latch circuit 23 in response to the latch signals generated immediately after each displacement scan. Thereafter, the dot printing elements 21 receive the latched held signals and function to cause simultaneous single-line printing.

As described above in connection with the data D0, the interpolation data D01, D02 and D03 are generated for each displacement sample at a speed four times the smallest or shortest of the previously known print cycle of 2048 µs, thereby sequentially performing the print drive process four times faster.

As a result, printing is carried out with an essentially trouble-free density, although the exothermic response of the corresponding point printing cycles decreases. For example, a limiting resolving power corresponds to the shortest printing cycle of 2048 us based on the usual procedure if a normal density is to be ensured.

In the above embodiment, the thermal print head 20 itself has a known structure, but behaves as if it were a new thermal print head incorporating interpolation registers. The dot print signal generating circuit may also be constructed in various forms and may include, for example, a CPU unit for data processing.

As stated above, according to the invention it is possible to perform printing at a higher speed than a typical maximum speed of a prior art thermal print head by simply adding circuit elements, thereby achieving printing having an improved resolving power.

Claims (1)

Thermal print head circuit comprising: a thermal print head (20) which is provided with a plurality of linearly arranged dot or matrix printing elements (21) to which print shift registers (23) are connected for clock-controlled shift scanning, and which has a number of addresses which corresponds to the number of dot elements (21); and a dot print signal generating circuit (10) for outputting dot print signals when the number of clock pulses from a clock reset for each scanning cycle is equal to the level of each of a series of input signals, and the print head (10) is arranged to effect, for each dot print shift scanning cycle, simultaneous one-line dot printing of the dot print signals loaded into and held in predetermined addresses of the print shift registers by shift scanning, characterized by: a plurality of serially connected delay shift registers (31,32,33) undergoing synchronous clock-controlled shift scanning into which the dot printing signals output from the dot printing signal generating circuit (10) are input, each such register (31,32,33) having a number of addresses corresponding to the number of dot printing elements and operative to output a plurality of successive time-delayed counterparts of each dot printing signal; and an OR circuit (34) to which the time-delayed counterparts of the dot printing signals output from the delay shift registers (31,32,33) and to which the current real-time dot printing signals are applied, the cycle time of the clock-controlled shift scanning sequence of the shift registers being set according to the equation t ≤ T/ (n+1), where T is the shortest printing cycle sufficient to cause the dot printing signals to respond normally and n is the number of serially connected delay shift registers (31,32,33), and the output signals of the OR circuit are supplied to the printing shift registers (34) of the thermal print head (20).