DE68924639D1 - Matrix memory, which includes standard blocks, standard sub-blocks, a redundant block and redundant sub-blocks, and integrated circuit, which contains a plurality of such matrix memories. - Google Patents
Matrix memory, which includes standard blocks, standard sub-blocks, a redundant block and redundant sub-blocks, and integrated circuit, which contains a plurality of such matrix memories.Info
- Publication number
- DE68924639D1 DE68924639D1 DE68924639T DE68924639T DE68924639D1 DE 68924639 D1 DE68924639 D1 DE 68924639D1 DE 68924639 T DE68924639 T DE 68924639T DE 68924639 T DE68924639 T DE 68924639T DE 68924639 D1 DE68924639 D1 DE 68924639D1
- Authority
- DE
- Germany
- Prior art keywords
- blocks
- sub
- redundant
- standard
- matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000011159 matrix material Substances 0.000 title 2
- 230000015654 memory Effects 0.000 title 2
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
- G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8900026A NL8900026A (en) | 1989-01-06 | 1989-01-06 | MATRIX MEMORY, CONTAINING STANDARD BLOCKS, STANDARD SUBBLOCKS, A REDUNDANT BLOCK, AND REDUNDANT SUBBLOCKS, AND AN INTEGRATED CIRCUIT CONTAINING MULTIPLE OF SUCH MATRIX MEMORIES. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68924639D1 true DE68924639D1 (en) | 1995-11-30 |
DE68924639T2 DE68924639T2 (en) | 1996-05-30 |
Family
ID=19853911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68924639T Expired - Lifetime DE68924639T2 (en) | 1989-01-06 | 1989-12-21 | Matrix memory, which includes standard blocks, standard sub-blocks, a redundant block and redundant sub-blocks, and integrated circuit, which contains a plurality of such matrix memories. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5033024A (en) |
EP (1) | EP0377249B1 (en) |
JP (1) | JP2852319B2 (en) |
KR (1) | KR0170766B1 (en) |
DE (1) | DE68924639T2 (en) |
NL (1) | NL8900026A (en) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0748320B2 (en) * | 1989-07-24 | 1995-05-24 | セイコー電子工業株式会社 | Semiconductor non-volatile memory |
JPH03235290A (en) * | 1990-02-09 | 1991-10-21 | Mitsubishi Electric Corp | Semiconductor memory device having hierarchical row select line |
GB9007796D0 (en) * | 1990-04-06 | 1990-06-06 | Foss Richard C | Dynamic memory row/column redundancy scheme |
JPH04103099A (en) * | 1990-08-23 | 1992-04-06 | Toshiba Corp | Semiconductor memory |
JP3019869B2 (en) * | 1990-10-16 | 2000-03-13 | 富士通株式会社 | Semiconductor memory |
EP0543656B1 (en) * | 1991-11-20 | 1998-09-16 | Fujitsu Limited | Flash-erasable semiconductor memory device having an improved reliability |
JP2738195B2 (en) * | 1991-12-27 | 1998-04-08 | 日本電気株式会社 | Nonvolatile semiconductor memory device |
US5295101A (en) * | 1992-01-31 | 1994-03-15 | Texas Instruments Incorporated | Array block level redundancy with steering logic |
EP0567707A1 (en) * | 1992-04-30 | 1993-11-03 | International Business Machines Corporation | Implementation of column redundancy in a cache memory architecture |
KR950000275B1 (en) * | 1992-05-06 | 1995-01-12 | 삼성전자 주식회사 | Column redundancy of semiconductor memory device |
US5317535A (en) * | 1992-06-19 | 1994-05-31 | Intel Corporation | Gate/source disturb protection for sixteen-bit flash EEPROM memory arrays |
SE502777C2 (en) * | 1993-04-29 | 1996-01-08 | Ellemtel Utvecklings Ab | Fault isolation of parts of a telephone and data communication system |
JP3212421B2 (en) * | 1993-09-20 | 2001-09-25 | 富士通株式会社 | Nonvolatile semiconductor memory device |
JP3351595B2 (en) * | 1993-12-22 | 2002-11-25 | 株式会社日立製作所 | Semiconductor memory device |
JP2751821B2 (en) * | 1994-02-16 | 1998-05-18 | 日本電気株式会社 | Nonvolatile semiconductor memory device |
US5805512A (en) * | 1995-02-09 | 1998-09-08 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
WO1996038845A1 (en) * | 1995-05-31 | 1996-12-05 | Macronix International Co., Ltd. | Technique for reconfiguring a high density memory |
US5999463A (en) * | 1997-07-21 | 1999-12-07 | Samsung Electronics Co., Ltd. | Redundancy fuse box and semiconductor device including column redundancy fuse box shared by a plurality of memory blocks |
JPH11317091A (en) * | 1998-04-30 | 1999-11-16 | Nec Corp | Semiconductor storage device |
US7403417B2 (en) * | 2005-11-23 | 2008-07-22 | Infineon Technologies Flash Gmbh & Co. Kg | Non-volatile semiconductor memory device and method for operating a non-volatile memory device |
US9795329B2 (en) | 2014-01-10 | 2017-10-24 | Glucovista Inc. | Non-invasive device and method for measuring a substance concentration |
KR20190060527A (en) * | 2017-11-24 | 2019-06-03 | 삼성전자주식회사 | Semiconductor memory device and method of operating the same |
CN115855226B (en) * | 2023-02-24 | 2023-05-30 | 青岛科技大学 | Multi-AUV cooperative underwater data acquisition method based on DQN and matrix completion |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6031038A (en) * | 1983-07-29 | 1985-02-16 | Shimadzu Corp | Structure testing machine |
US4599709A (en) * | 1984-02-17 | 1986-07-08 | At&T Bell Laboratories | Byte organized static memory |
KR890003691B1 (en) * | 1986-08-22 | 1989-09-30 | 삼성전자 주식회사 | Cmos column address redundaney |
-
1989
- 1989-01-06 NL NL8900026A patent/NL8900026A/en not_active Application Discontinuation
- 1989-12-20 US US07/453,637 patent/US5033024A/en not_active Expired - Lifetime
- 1989-12-21 DE DE68924639T patent/DE68924639T2/en not_active Expired - Lifetime
- 1989-12-21 EP EP89203287A patent/EP0377249B1/en not_active Expired - Lifetime
-
1990
- 1990-01-04 KR KR1019900000038A patent/KR0170766B1/en not_active IP Right Cessation
- 1990-01-05 JP JP2000123A patent/JP2852319B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0377249A1 (en) | 1990-07-11 |
KR0170766B1 (en) | 1999-03-30 |
DE68924639T2 (en) | 1996-05-30 |
KR900012161A (en) | 1990-08-03 |
NL8900026A (en) | 1990-08-01 |
JP2852319B2 (en) | 1999-02-03 |
EP0377249B1 (en) | 1995-10-25 |
US5033024A (en) | 1991-07-16 |
JPH02246100A (en) | 1990-10-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: NXP B.V., EINDHOVEN, NL |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN |