DE68920740D1 - Vorrichtung zur Nachrichtenwarteschlangenbetriebssteuerung in einem Speicher. - Google Patents

Vorrichtung zur Nachrichtenwarteschlangenbetriebssteuerung in einem Speicher.

Info

Publication number
DE68920740D1
DE68920740D1 DE68920740T DE68920740T DE68920740D1 DE 68920740 D1 DE68920740 D1 DE 68920740D1 DE 68920740 T DE68920740 T DE 68920740T DE 68920740 T DE68920740 T DE 68920740T DE 68920740 D1 DE68920740 D1 DE 68920740D1
Authority
DE
Germany
Prior art keywords
memory
control device
operation control
message queue
queue operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68920740T
Other languages
English (en)
Inventor
Jean-Pierre Lips
Jean-Marc Millet
Bernard Naudin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE68920740D1 publication Critical patent/DE68920740D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
    • G06F2205/064—Linked list, i.e. structure using pointers, e.g. allowing non-contiguous address segments in one logical buffer or dynamic buffer space allocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/12—Indexing scheme relating to groups G06F5/12 - G06F5/14
    • G06F2205/123—Contention resolution, i.e. resolving conflicts between simultaneous read and write operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Memory System (AREA)
DE68920740T 1989-09-20 1989-09-20 Vorrichtung zur Nachrichtenwarteschlangenbetriebssteuerung in einem Speicher. Expired - Lifetime DE68920740D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP89480145A EP0418447B1 (de) 1989-09-20 1989-09-20 Vorrichtung zur Nachrichtenwarteschlangenbetriebssteuerung in einem Speicher

Publications (1)

Publication Number Publication Date
DE68920740D1 true DE68920740D1 (de) 1995-03-02

Family

ID=8203071

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68920740T Expired - Lifetime DE68920740D1 (de) 1989-09-20 1989-09-20 Vorrichtung zur Nachrichtenwarteschlangenbetriebssteuerung in einem Speicher.

Country Status (4)

Country Link
US (1) US5214783A (de)
EP (1) EP0418447B1 (de)
JP (1) JPH03111955A (de)
DE (1) DE68920740D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5392398A (en) * 1992-04-20 1995-02-21 International Business Machines Corporation System and method for deallocation a first message independently of the deallocation of a second message in a bundle of messages
US5448708A (en) * 1992-10-30 1995-09-05 Ward; James P. System for asynchronously delivering enqueue and dequeue information in a pipe interface having distributed, shared memory
US5649092A (en) * 1994-04-21 1997-07-15 Unisys Corporation Fault tolerant apparatus and method for maintaining one or more queues that are shared by multiple processors
US5623603A (en) * 1994-11-02 1997-04-22 Fls Acquistion Corporation Method of transferring data at adjustable levels of priorities to provide optimum response to user demands
US6237067B1 (en) 1998-08-31 2001-05-22 International Business Machines Corporation System and method for handling storage consistency conflict
US7895239B2 (en) * 2002-01-04 2011-02-22 Intel Corporation Queue arrays in network devices
US20060031201A1 (en) * 2004-08-06 2006-02-09 Microsoft Corporation Life moment tagging and storage
US11513799B2 (en) * 2019-11-04 2022-11-29 Apple Inc. Chained buffers in neural network processor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4285038A (en) * 1976-10-15 1981-08-18 Tokyo Shibaura Electric Co., Ltd. Information transfer control system
DE3173549D1 (en) * 1981-03-16 1986-03-06 Ibm Improvements to digital data processing apparatus
US4486854A (en) * 1981-10-15 1984-12-04 Codex Corporation First-in, first-out memory system
US4482956A (en) * 1982-11-04 1984-11-13 International Business Machines Corporation Parallel queueing method
US4615001A (en) * 1984-03-29 1986-09-30 At&T Bell Laboratories Queuing arrangement for initiating execution of multistage transactions
US4584640A (en) * 1984-06-27 1986-04-22 Motorola, Inc. Method and apparatus for a compare and swap instruction
EP0273083B1 (de) * 1986-12-30 1993-10-06 International Business Machines Corporation Nicht-sperrender Warteschlangenmechanismus
US4807111A (en) * 1987-06-19 1989-02-21 International Business Machines Corporation Dynamic queueing method
US4965716A (en) * 1988-03-11 1990-10-23 International Business Machines Corporation Fast access priority queue for managing multiple messages at a communications node or managing multiple programs in a multiprogrammed data processor
US5081572A (en) * 1988-10-28 1992-01-14 Arnold Michael E Manipulation of time-ordered lists and instructions therefor

Also Published As

Publication number Publication date
EP0418447A1 (de) 1991-03-27
EP0418447B1 (de) 1995-01-18
JPH03111955A (ja) 1991-05-13
US5214783A (en) 1993-05-25

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Legal Events

Date Code Title Description
8332 No legal effect for de