DE60239011D1 - Kommunikationsbussystem - Google Patents
KommunikationsbussystemInfo
- Publication number
- DE60239011D1 DE60239011D1 DE60239011T DE60239011T DE60239011D1 DE 60239011 D1 DE60239011 D1 DE 60239011D1 DE 60239011 T DE60239011 T DE 60239011T DE 60239011 T DE60239011 T DE 60239011T DE 60239011 D1 DE60239011 D1 DE 60239011D1
- Authority
- DE
- Germany
- Prior art keywords
- bus
- memory section
- processor
- time frames
- bus controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01204664 | 2001-12-03 | ||
PCT/IB2002/004866 WO2003048950A1 (en) | 2001-12-03 | 2002-11-20 | Communication bus system |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60239011D1 true DE60239011D1 (de) | 2011-03-03 |
Family
ID=8181344
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60239011T Expired - Lifetime DE60239011D1 (de) | 2001-12-03 | 2002-11-20 | Kommunikationsbussystem |
Country Status (7)
Country | Link |
---|---|
US (1) | US7177997B2 (de) |
EP (1) | EP1459191B1 (de) |
JP (1) | JP4477877B2 (de) |
AT (1) | ATE496339T1 (de) |
AU (1) | AU2002347472A1 (de) |
DE (1) | DE60239011D1 (de) |
WO (1) | WO2003048950A1 (de) |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5361261A (en) * | 1992-11-02 | 1994-11-01 | National Semiconductor Corporation | Frame-based transmission of data |
EP0596651A1 (de) * | 1992-11-02 | 1994-05-11 | National Semiconductor Corporation | Datennetz mit isochroner Übertragungsfähigkeit |
US5544324A (en) * | 1992-11-02 | 1996-08-06 | National Semiconductor Corporation | Network for transmitting isochronous-source data using a frame structure with variable number of time slots to compensate for timing variance between reference clock and data rate |
US5621898A (en) * | 1994-11-29 | 1997-04-15 | Compaq Computer Corporation | Arbiter organization for serial bus transfers |
US5559796A (en) * | 1995-02-28 | 1996-09-24 | National Semiconductor Corporation | Delay control for frame-based transmission of data |
US6339584B1 (en) * | 1996-04-12 | 2002-01-15 | Cirrus Logic, Inc. | Media access control for isochronous data packets in carrier sensing multiple access systems |
US5960001A (en) * | 1997-06-19 | 1999-09-28 | Siemens Information And Communication Networks, Inc. | Apparatus and method for guaranteeing isochronous data flow on a CSMA/CD network |
DE19900245B4 (de) * | 1998-01-07 | 2005-09-15 | National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara | Vorrichtung und Verfahren zum Senden von Daten von einem USB-Endpunkt an einen USB-Host |
US6199132B1 (en) * | 1998-06-17 | 2001-03-06 | Advanced Micro Devices, Inc. | Communication link with isochronous and asynchronous priority modes |
US6101613A (en) * | 1998-07-06 | 2000-08-08 | Intel Corporation | Architecture providing isochronous access to memory in a system |
US6658515B1 (en) * | 2000-01-25 | 2003-12-02 | Dell Usa, L.P. | Background execution of universal serial bus transactions |
US6578109B1 (en) * | 2000-06-29 | 2003-06-10 | Sony Corporation | System and method for effectively implementing isochronous processor cache |
US6574708B2 (en) * | 2001-05-18 | 2003-06-03 | Broadcom Corporation | Source controlled cache allocation |
US6981073B2 (en) * | 2001-07-31 | 2005-12-27 | Wis Technologies, Inc. | Multiple channel data bus control for video processing |
-
2002
- 2002-11-20 DE DE60239011T patent/DE60239011D1/de not_active Expired - Lifetime
- 2002-11-20 EP EP02783405A patent/EP1459191B1/de not_active Expired - Lifetime
- 2002-11-20 JP JP2003550075A patent/JP4477877B2/ja not_active Expired - Fee Related
- 2002-11-20 US US10/497,048 patent/US7177997B2/en not_active Expired - Lifetime
- 2002-11-20 AT AT02783405T patent/ATE496339T1/de not_active IP Right Cessation
- 2002-11-20 WO PCT/IB2002/004866 patent/WO2003048950A1/en active Application Filing
- 2002-11-20 AU AU2002347472A patent/AU2002347472A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
ATE496339T1 (de) | 2011-02-15 |
EP1459191B1 (de) | 2011-01-19 |
AU2002347472A1 (en) | 2003-06-17 |
US7177997B2 (en) | 2007-02-13 |
JP4477877B2 (ja) | 2010-06-09 |
EP1459191A1 (de) | 2004-09-22 |
JP2005512193A (ja) | 2005-04-28 |
US20050086411A1 (en) | 2005-04-21 |
WO2003048950A1 (en) | 2003-06-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE60037174D1 (de) | Puffersystem für externen speicherzugriff | |
WO2004049175A3 (en) | External memory controller node | |
TW200506625A (en) | Direct memory access controller system | |
AU2003232136A1 (en) | Out of order dram sequencer | |
TW200731080A (en) | Unified DMA | |
AU2002242048A1 (en) | Multiprocessor system implementing virtual memory using a shared memory, and a page replacement method for maintaining paged memory coherence | |
AU2002347376A8 (en) | Hybrid search memory for network processor and computer systems | |
DE69941530D1 (de) | Dynamische Varianten des Netzwerkmanagementprotokoll - Datenspeichers | |
DE60308150D1 (de) | Adressenraum, bussystem, speicherungssteuerung und einrichtungssystem | |
WO2008082772A3 (en) | Dynamic allocation of message buffers | |
GB9606834D0 (en) | Inter-processor communication | |
AU8576498A (en) | A fully-pipelined fixed-latency communications system with real-time dynamic bandwidth allocation | |
AU2001262935A1 (en) | Methods and systems for hairpins in virtual networks | |
MXPA03006940A (es) | Administracion de datos del sistema de particion logica no volatil. | |
EP1014649A3 (de) | Verfahren und Vorrichtung zur Datenübertragungssteuerung | |
EP1157322A4 (de) | Feldausbaubarer, dynamischer datenaustauschserver | |
DE69905556T2 (de) | Tdma paketdatenübertragungssystem | |
TW200604828A (en) | Direct memory access (DMA) controller and bus structure in a master/slave system | |
KR20050029257A (ko) | 공통 플랫폼을 갖는 통신장치와 통신방법 | |
AU3180899A (en) | Selective data transfer between storage mediums using dynamic memory allocation | |
DE69924217D1 (de) | Puffer-Speicher für mehrere Datenkommunikationskanäle | |
DE60239011D1 (de) | Kommunikationsbussystem | |
DE60203785D1 (de) | Netzschnittstelle | |
EP1255375A4 (de) | System zur gemeinsamen nutzung von daten eines speichers mehracher stationen | |
AU2003234583A8 (en) | System and method for a routing device to securely share network data with a host utilizing a hardware firewall |