DE60228580D1 - Mechanismus für die programmierbare änderung der speicherzuordnungsgranularität - Google Patents

Mechanismus für die programmierbare änderung der speicherzuordnungsgranularität

Info

Publication number
DE60228580D1
DE60228580D1 DE60228580T DE60228580T DE60228580D1 DE 60228580 D1 DE60228580 D1 DE 60228580D1 DE 60228580 T DE60228580 T DE 60228580T DE 60228580 T DE60228580 T DE 60228580T DE 60228580 D1 DE60228580 D1 DE 60228580D1
Authority
DE
Germany
Prior art keywords
memory assignment
programmable change
assignment granularity
granularity
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60228580T
Other languages
English (en)
Inventor
Kevin D Kissell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MIPS Tech LLC
Original Assignee
MIPS Technologies Inc
MIPS Tech LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MIPS Technologies Inc, MIPS Tech LLC filed Critical MIPS Technologies Inc
Application granted granted Critical
Publication of DE60228580D1 publication Critical patent/DE60228580D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/652—Page size control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
DE60228580T 2001-07-13 2002-03-08 Mechanismus für die programmierbare änderung der speicherzuordnungsgranularität Expired - Lifetime DE60228580D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/905,180 US6523104B2 (en) 2001-07-13 2001-07-13 Mechanism for programmable modification of memory mapping granularity
PCT/US2002/007205 WO2003007156A2 (en) 2001-07-13 2002-03-08 Mechanism for programmable modification of memory mapping granularity

Publications (1)

Publication Number Publication Date
DE60228580D1 true DE60228580D1 (de) 2008-10-09

Family

ID=25420391

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60228580T Expired - Lifetime DE60228580D1 (de) 2001-07-13 2002-03-08 Mechanismus für die programmierbare änderung der speicherzuordnungsgranularität

Country Status (4)

Country Link
US (1) US6523104B2 (de)
EP (1) EP1410218B1 (de)
DE (1) DE60228580D1 (de)
WO (1) WO2003007156A2 (de)

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US6957307B2 (en) * 2002-03-22 2005-10-18 Intel Corporation Mapping data masks in hardware by controller programming
US7900054B2 (en) * 2002-03-25 2011-03-01 Intel Corporation Security protocols for processor-based systems
US6841630B2 (en) * 2002-12-31 2005-01-11 Univation Technologies, Llc Processes for transitioning between chrome-based and mixed polymerization catalysts
US7053903B1 (en) * 2003-09-03 2006-05-30 Nvidia Corporation Methods and apparatus for write watch for vertex lists
US7234037B2 (en) * 2003-11-25 2007-06-19 International Business Machines Corporation Memory mapped Input/Output operations
US7552436B2 (en) * 2003-11-25 2009-06-23 International Business Machines Memory mapped input/output virtualization
US20060095690A1 (en) * 2004-10-29 2006-05-04 International Business Machines Corporation System, method, and storage medium for shared key index space for memory regions
KR100611305B1 (ko) * 2004-11-25 2006-08-10 삼성전자주식회사 주소 맵핑 방법 및 장치
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US7617380B2 (en) * 2005-08-25 2009-11-10 Broadcom Corporation System and method for synchronizing translation lookaside buffer access in a multithread processor
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US7932912B1 (en) 2006-10-04 2011-04-26 Nvidia Corporation Frame buffer tag addressing for partitioned graphics memory supporting non-power of two number of memory elements
US7616218B1 (en) * 2005-12-05 2009-11-10 Nvidia Corporation Apparatus, system, and method for clipping graphics primitives
US7376807B2 (en) 2006-02-23 2008-05-20 Freescale Semiconductor, Inc. Data processing system having address translation bypass and method therefor
US7401201B2 (en) * 2006-04-28 2008-07-15 Freescale Semiconductor, Inc. Processor and method for altering address translation
US7689806B2 (en) * 2006-07-14 2010-03-30 Q Method and system to indicate an exception-triggering page within a microprocessor
US8543792B1 (en) 2006-09-19 2013-09-24 Nvidia Corporation Memory access techniques including coalesing page table entries
US8352709B1 (en) 2006-09-19 2013-01-08 Nvidia Corporation Direct memory access techniques that include caching segmentation data
US8601223B1 (en) 2006-09-19 2013-12-03 Nvidia Corporation Techniques for servicing fetch requests utilizing coalesing page table entries
US8347064B1 (en) 2006-09-19 2013-01-01 Nvidia Corporation Memory access techniques in an aperture mapped memory space
US7884829B1 (en) * 2006-10-04 2011-02-08 Nvidia Corporation Partitioned graphics memory supporting non-power of two number of memory elements
US8072463B1 (en) 2006-10-04 2011-12-06 Nvidia Corporation Graphics system with virtual memory pages and non-power of two number of memory elements
US8707011B1 (en) 2006-10-24 2014-04-22 Nvidia Corporation Memory access techniques utilizing a set-associative translation lookaside buffer
US8700883B1 (en) 2006-10-24 2014-04-15 Nvidia Corporation Memory access techniques providing for override of a page table
US8347065B1 (en) 2006-11-01 2013-01-01 Glasco David B System and method for concurrently managing memory access requests
US8607008B1 (en) 2006-11-01 2013-12-10 Nvidia Corporation System and method for independent invalidation on a per engine basis
US8706975B1 (en) 2006-11-01 2014-04-22 Nvidia Corporation Memory access management block bind system and method
US8533425B1 (en) 2006-11-01 2013-09-10 Nvidia Corporation Age based miss replay system and method
US8504794B1 (en) 2006-11-01 2013-08-06 Nvidia Corporation Override system and method for memory access management
US8700865B1 (en) 2006-11-02 2014-04-15 Nvidia Corporation Compressed data access system and method
US20080189528A1 (en) * 2007-02-02 2008-08-07 Mips Technologies, Inc. System, Method and Software Application for the Generation of Verification Programs
US8612720B2 (en) * 2007-02-09 2013-12-17 Edgewater Computer Systems, Inc. System and method for implementing data breakpoints
US8024546B2 (en) * 2008-10-23 2011-09-20 Microsoft Corporation Opportunistic page largification
US9069672B2 (en) * 2009-06-12 2015-06-30 Intel Corporation Extended fast memory access in a multiprocessor computer system
GB2478727B (en) * 2010-03-15 2013-07-17 Advanced Risc Mach Ltd Translation table control
US9921967B2 (en) 2011-07-26 2018-03-20 Intel Corporation Multi-core shared page miss handler
US10146545B2 (en) 2012-03-13 2018-12-04 Nvidia Corporation Translation address cache for a microprocessor
US9880846B2 (en) 2012-04-11 2018-01-30 Nvidia Corporation Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entries
US10241810B2 (en) 2012-05-18 2019-03-26 Nvidia Corporation Instruction-optimizing processor with branch-count table in hardware
US20140189310A1 (en) 2012-12-27 2014-07-03 Nvidia Corporation Fault detection in instruction translations
US9183057B2 (en) 2013-01-21 2015-11-10 Micron Technology, Inc. Systems and methods for accessing memory
US9495288B2 (en) 2013-01-22 2016-11-15 Seagate Technology Llc Variable-size flash translation layer
US10108424B2 (en) 2013-03-14 2018-10-23 Nvidia Corporation Profiling code portions to generate translations
CN104216833B (zh) * 2013-05-29 2017-10-10 华为技术有限公司 一种确定物理地址的方法及装置
TWI609263B (zh) * 2013-08-16 2017-12-21 司固科技公司 可變大小快閃轉變層
GB2538055B (en) * 2015-04-28 2017-04-19 Advanced Risc Mach Ltd Data processing apparatus having a cache
GB2538054B (en) 2015-04-28 2017-09-13 Advanced Risc Mach Ltd Data processing apparatus, controller, cache and method
US10241925B2 (en) 2017-02-15 2019-03-26 Ati Technologies Ulc Selecting a default page size in a variable page size TLB
US10282309B2 (en) * 2017-02-24 2019-05-07 Advanced Micro Devices, Inc. Per-page control of physical address space distribution among memory modules
US10339068B2 (en) 2017-04-24 2019-07-02 Advanced Micro Devices, Inc. Fully virtualized TLBs
US10860475B1 (en) * 2017-11-17 2020-12-08 Pure Storage, Inc. Hybrid flash translation layer
CN110493775B (zh) * 2019-08-23 2021-10-12 重庆大学 通过att和异常处理来适配的通信方法及系统

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US4774659A (en) * 1986-04-16 1988-09-27 Astronautics Corporation Of America Computer system employing virtual memory
JP3740195B2 (ja) * 1994-09-09 2006-02-01 株式会社ルネサステクノロジ データ処理装置
US5963984A (en) * 1994-11-08 1999-10-05 National Semiconductor Corporation Address translation unit employing programmable page size

Also Published As

Publication number Publication date
US20030014609A1 (en) 2003-01-16
EP1410218A2 (de) 2004-04-21
WO2003007156A3 (en) 2003-10-09
WO2003007156A2 (en) 2003-01-23
US6523104B2 (en) 2003-02-18
EP1410218B1 (de) 2008-08-27

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