DE602006007017D1 - Parallel verkettete ZigZag-Kodes mit UMTS Turbo-Interleavern - Google Patents
Parallel verkettete ZigZag-Kodes mit UMTS Turbo-InterleavernInfo
- Publication number
- DE602006007017D1 DE602006007017D1 DE602006007017T DE602006007017T DE602006007017D1 DE 602006007017 D1 DE602006007017 D1 DE 602006007017D1 DE 602006007017 T DE602006007017 T DE 602006007017T DE 602006007017 T DE602006007017 T DE 602006007017T DE 602006007017 D1 DE602006007017 D1 DE 602006007017D1
- Authority
- DE
- Germany
- Prior art keywords
- parallel linked
- zigzag codes
- turbo interleavers
- umts turbo
- umts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
- H03M13/2714—Turbo interleaver for 3rd generation partnership project [3GPP] universal mobile telecommunications systems [UMTS], e.g. as defined in technical specification TS 25.212
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/296—Particular turbo code structure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M13/098—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit using single parity bit
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP06024548A EP1926215B1 (de) | 2006-11-27 | 2006-11-27 | Parallel verkettete ZigZag-Kodes mit UMTS Turbo-Interleavern |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602006007017D1 true DE602006007017D1 (de) | 2009-07-09 |
Family
ID=37682670
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602006007017T Active DE602006007017D1 (de) | 2006-11-27 | 2006-11-27 | Parallel verkettete ZigZag-Kodes mit UMTS Turbo-Interleavern |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1926215B1 (de) |
JP (1) | JP4580420B2 (de) |
DE (1) | DE602006007017D1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8913478B2 (en) * | 2009-11-18 | 2014-12-16 | Wi-Lan, Inc. | Methods and apparatus for interleaving in OFDM/OFDMA systems |
JP7128657B2 (ja) * | 2017-05-23 | 2022-08-31 | 日本放送協会 | 送信装置、受信装置、送受信システム、及びチップ |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE60112445T2 (de) * | 2001-10-10 | 2006-04-06 | Matsushita Electric Industrial Co., Ltd., Kadoma | Modifikation eines Verschachtelermusters |
US7406065B2 (en) * | 2002-03-14 | 2008-07-29 | Qualcomm, Incorporated | Method and apparatus for reducing inter-channel interference in a wireless communication system |
US7085986B2 (en) * | 2002-12-20 | 2006-08-01 | Nokia Corporation | Low decoding complexity concatenated codes for high rate coded transmission |
KR20050119595A (ko) * | 2004-06-16 | 2005-12-21 | 삼성전자주식회사 | 이동통신 시스템에서 연접 지그재그 부호를 이용한 채널부호화/복호화 장치 및 방법 |
JP4357561B2 (ja) * | 2005-02-17 | 2009-11-04 | 富士通株式会社 | 符号化装置及び符号化方法 |
-
2006
- 2006-11-27 DE DE602006007017T patent/DE602006007017D1/de active Active
- 2006-11-27 EP EP06024548A patent/EP1926215B1/de not_active Expired - Fee Related
-
2007
- 2007-11-26 JP JP2007304705A patent/JP4580420B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1926215B1 (de) | 2009-05-27 |
JP4580420B2 (ja) | 2010-11-10 |
EP1926215A1 (de) | 2008-05-28 |
JP2008136212A (ja) | 2008-06-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |