DE602004017122D1 - Vorrichtung und Verfahren zur Paketvermittlung zwischen Agenten - Google Patents

Vorrichtung und Verfahren zur Paketvermittlung zwischen Agenten

Info

Publication number
DE602004017122D1
DE602004017122D1 DE602004017122T DE602004017122T DE602004017122D1 DE 602004017122 D1 DE602004017122 D1 DE 602004017122D1 DE 602004017122 T DE602004017122 T DE 602004017122T DE 602004017122 T DE602004017122 T DE 602004017122T DE 602004017122 D1 DE602004017122 D1 DE 602004017122D1
Authority
DE
Germany
Prior art keywords
agents
message
packet switching
point
forwarded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE602004017122T
Other languages
English (en)
Inventor
Cesar Douady
Philippe Boucard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Arteris SAS
Original Assignee
Arteris SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=34814555&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE602004017122(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Arteris SAS filed Critical Arteris SAS
Publication of DE602004017122D1 publication Critical patent/DE602004017122D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Organic Low-Molecular-Weight Compounds And Preparation Thereof (AREA)
  • Compounds Of Unknown Constitution (AREA)
  • Computer And Data Communications (AREA)
DE602004017122T 2004-03-02 2004-05-28 Vorrichtung und Verfahren zur Paketvermittlung zwischen Agenten Expired - Fee Related DE602004017122D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0402149A FR2867338B1 (fr) 2004-03-02 2004-03-02 Procede et dispositif de commutation entre des agents

Publications (1)

Publication Number Publication Date
DE602004017122D1 true DE602004017122D1 (de) 2008-11-27

Family

ID=34814555

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004017122T Expired - Fee Related DE602004017122D1 (de) 2004-03-02 2004-05-28 Vorrichtung und Verfahren zur Paketvermittlung zwischen Agenten

Country Status (5)

Country Link
US (2) US7574629B2 (de)
EP (1) EP1575222B1 (de)
AT (1) ATE411676T1 (de)
DE (1) DE602004017122D1 (de)
FR (1) FR2867338B1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2858895B1 (fr) * 2003-08-13 2006-05-05 Arteris Procede et dispositif de gestion de priorite lors de la transmission d'un message
US9087036B1 (en) 2004-08-12 2015-07-21 Sonics, Inc. Methods and apparatuses for time annotated transaction level modeling
US8407433B2 (en) 2007-06-25 2013-03-26 Sonics, Inc. Interconnect implementing internal controls
FR2890766B1 (fr) * 2005-09-12 2007-11-30 Arteris Sa Systeme et procede de communication asynchrone sur circuit, entre des sous-circuits synchrones
FR2899413B1 (fr) * 2006-03-31 2008-08-08 Arteris Sa Systeme de commutation de message
FR2900017B1 (fr) * 2006-04-12 2008-10-31 Arteris Sa Systeme d'interconnexions de blocs fonctionnels externes sur puce muni d'un unique protocole parametrable de communication
FR2901437B1 (fr) * 2006-05-16 2008-08-08 Arteris Sa Procede de realisation d'un circuit de synchronisation de donnees echangees de maniere asynchrone entre deux blocs synchrones, et circuit de synchronisation elabore a partir d'un tel procede
FR2902957B1 (fr) * 2006-06-23 2008-09-12 Arteris Sa Systeme et procede de gestions de messages transmis dans un reseau d'interconnexions
FR2904445B1 (fr) * 2006-07-26 2008-10-10 Arteris Sa Systeme de gestion de messages transmis dans un reseau d'interconnexions sur puce
US8868397B2 (en) 2006-11-20 2014-10-21 Sonics, Inc. Transaction co-validation across abstraction layers
US8022526B2 (en) 2009-08-07 2011-09-20 Advanced Processor Architectures, Llc Distributed computing
US9645603B1 (en) 2013-09-12 2017-05-09 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
US11042211B2 (en) 2009-08-07 2021-06-22 Advanced Processor Architectures, Llc Serially connected computing nodes in a distributed computing system
US9429983B1 (en) 2013-09-12 2016-08-30 Advanced Processor Architectures, Llc System clock distribution in a distributed computing environment
CN101840328B (zh) 2010-04-15 2014-05-07 华为技术有限公司 一种数据处理方法及系统以及相关设备
US8972995B2 (en) 2010-08-06 2015-03-03 Sonics, Inc. Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads
IT1401439B1 (it) * 2010-08-24 2013-07-26 Università Degli Studi Di Bergamo Metodo e sistema per l'identificazione assistita di fenomeni tecnici.
US8514889B2 (en) 2011-08-26 2013-08-20 Sonics, Inc. Use of common data format to facilitate link width conversion in a router with flexible link widths
US11231769B2 (en) 2017-03-06 2022-01-25 Facebook Technologies, Llc Sequencer-based protocol adapter
CN111630471A (zh) 2017-03-06 2020-09-04 脸谱科技有限责任公司 在集成电路中的电路区域的操作点控制器

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5361267A (en) * 1992-04-24 1994-11-01 Digital Equipment Corporation Scheme for error handling in a computer system
US5651002A (en) * 1995-07-12 1997-07-22 3Com Corporation Internetworking device with enhanced packet header translation and memory
US5974028A (en) * 1997-02-24 1999-10-26 At&T Corp. System and method for improving transport protocol performance in communication networks having lossy links
US6031818A (en) * 1997-03-19 2000-02-29 Lucent Technologies Inc. Error correction system for packet switching networks
US6721309B1 (en) 1999-05-18 2004-04-13 Alcatel Method and apparatus for maintaining packet order integrity in parallel switching engine
US6198735B1 (en) * 1999-05-20 2001-03-06 Motorola, Inc. Method for retransmitting a data packet in a packet network
US6400720B1 (en) * 1999-06-21 2002-06-04 General Instrument Corporation Method for transporting variable length and fixed length packets in a standard digital transmission frame
EP1729445B1 (de) * 2000-08-23 2009-05-06 Sony Deutschland GmbH Verfahren für Fernbedienung einer Vorrichtung
US6850542B2 (en) * 2000-11-14 2005-02-01 Broadcom Corporation Linked network switch configuration
KR100467643B1 (ko) * 2000-12-28 2005-01-24 엘지전자 주식회사 무선 랜에서의 멀티미디어 데이터 전송 방법
US7164678B2 (en) * 2001-06-25 2007-01-16 Intel Corporation Control of processing order for received network packets
US7080308B2 (en) * 2002-03-22 2006-07-18 Intel Corporation Method and apparatus to perform error control
US7277449B2 (en) * 2002-07-29 2007-10-02 Freescale Semiconductor, Inc. On chip network
US7296181B2 (en) * 2004-04-06 2007-11-13 Hewlett-Packard Development Company, L.P. Lockstep error signaling
US7900116B2 (en) * 2006-08-07 2011-03-01 Broadcom Corporation Switch with error checking and correcting

Also Published As

Publication number Publication date
FR2867338A1 (fr) 2005-09-09
ATE411676T1 (de) 2008-10-15
EP1575222B1 (de) 2008-10-15
EP1575222A1 (de) 2005-09-14
US20050210325A1 (en) 2005-09-22
US20100180163A1 (en) 2010-07-15
FR2867338B1 (fr) 2007-08-10
US7574629B2 (en) 2009-08-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee