DE60128598D1 - Verfahren und system zur sicheren rekonfigurierung eines gerätes - Google Patents

Verfahren und system zur sicheren rekonfigurierung eines gerätes

Info

Publication number
DE60128598D1
DE60128598D1 DE60128598T DE60128598T DE60128598D1 DE 60128598 D1 DE60128598 D1 DE 60128598D1 DE 60128598 T DE60128598 T DE 60128598T DE 60128598 T DE60128598 T DE 60128598T DE 60128598 D1 DE60128598 D1 DE 60128598D1
Authority
DE
Germany
Prior art keywords
reconfiguration
safe
safe reconfiguration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60128598T
Other languages
English (en)
Other versions
DE60128598T2 (de
Inventor
Stephen M Trimberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xilinx Inc filed Critical Xilinx Inc
Application granted granted Critical
Publication of DE60128598D1 publication Critical patent/DE60128598D1/de
Publication of DE60128598T2 publication Critical patent/DE60128598T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Electric Propulsion And Braking For Vehicles (AREA)
DE60128598T 2000-11-06 2001-10-29 Verfahren und system zur sicheren rekonfigurierung eines gerätes Expired - Lifetime DE60128598T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US707365 1991-05-30
US09/707,365 US6625794B1 (en) 2000-11-06 2000-11-06 Method and system for safe device reconfiguration
PCT/US2001/051072 WO2002046950A2 (en) 2000-11-06 2001-10-29 Method and system for safe device reconfiguration

Publications (2)

Publication Number Publication Date
DE60128598D1 true DE60128598D1 (de) 2007-07-05
DE60128598T2 DE60128598T2 (de) 2008-01-31

Family

ID=24841410

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60128598T Expired - Lifetime DE60128598T2 (de) 2000-11-06 2001-10-29 Verfahren und system zur sicheren rekonfigurierung eines gerätes

Country Status (5)

Country Link
US (1) US6625794B1 (de)
EP (1) EP1417606B1 (de)
CA (1) CA2427826C (de)
DE (1) DE60128598T2 (de)
WO (1) WO2002046950A2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8183881B1 (en) * 2004-03-29 2012-05-22 Xilinx, Inc. Configuration memory as buffer memory for an integrated circuit
US7640526B1 (en) 2005-09-12 2009-12-29 Xilinx, Inc. Modular partial reconfiguration
US8415974B1 (en) 2011-03-09 2013-04-09 Xilinx, Inc. Methods and circuits enabling dynamic reconfiguration
CN103856210B (zh) * 2012-11-28 2017-09-12 艺伦半导体技术股份有限公司 一种控制fpga编程新地址的方法、装置及编程电路
US10608641B2 (en) 2018-07-20 2020-03-31 Xilinx, Inc. Hierarchical partial reconfiguration for programmable integrated circuits
US10651853B1 (en) 2019-05-23 2020-05-12 Xilinx, Inc. Timing insulation circuitry for partial reconfiguration of programmable integrated circuits
US11449347B1 (en) 2019-05-23 2022-09-20 Xilinx, Inc. Time-multiplexed implementation of hardware accelerated functions in a programmable integrated circuit
US10990547B2 (en) 2019-08-11 2021-04-27 Xilinx, Inc. Dynamically reconfigurable networking using a programmable integrated circuit
US11055106B1 (en) 2019-12-18 2021-07-06 Xilinx, Inc. Bootstrapping a programmable integrated circuit based network interface card
US11922223B1 (en) 2021-02-08 2024-03-05 Xilinx, Inc. Flexible data-driven software control of reconfigurable platforms
US11456951B1 (en) 2021-04-08 2022-09-27 Xilinx, Inc. Flow table modification for network accelerators
US11606317B1 (en) 2021-04-14 2023-03-14 Xilinx, Inc. Table based multi-function virtualization
US11886789B1 (en) 2021-07-07 2024-01-30 Xilinx, Inc. Block design containers for circuit design
US11610042B1 (en) 2021-09-28 2023-03-21 Xilinx, Inc. Scalable scribe regions for implementing user circuit designs in an integrated circuit using dynamic function exchange

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4975601A (en) * 1989-09-29 1990-12-04 Sgs-Thomson Microelectronics, Inc. User-writable random access memory logic block for programmable logic devices
GB9223226D0 (en) * 1992-11-05 1992-12-16 Algotronix Ltd Improved configurable cellular array (cal ii)
US5453706A (en) * 1994-04-01 1995-09-26 Xilinx, Inc. Field programmable gate array providing contention free configuration and reconfiguration
US5946219A (en) * 1996-10-30 1999-08-31 Atmel Corporation Method and system for configuring an array of logic devices
US6308311B1 (en) * 1999-05-14 2001-10-23 Xilinx, Inc. Method for reconfiguring a field programmable gate array from a host
US6331790B1 (en) * 2000-03-10 2001-12-18 Easic Corporation Customizable and programmable cell array

Also Published As

Publication number Publication date
CA2427826A1 (en) 2002-06-13
DE60128598T2 (de) 2008-01-31
CA2427826C (en) 2008-08-05
WO2002046950A2 (en) 2002-06-13
WO2002046950A3 (en) 2004-02-26
EP1417606B1 (de) 2007-05-23
US6625794B1 (en) 2003-09-23
EP1417606A2 (de) 2004-05-12

Similar Documents

Publication Publication Date Title
DE60038638D1 (de) Verfahren und Vorrichtung zur Verrohrung eines Bohrloches
DE60018733D1 (de) Vorrichtung und verfahren zur probenanalyse
DE60132586D1 (de) Verfahren und vorrichtung zur abtastratenwandlung
DE60021077D1 (de) Vorrichtung und verfahren zur probenabgabe
DE60138564D1 (de) Verfahren und vorrichtung zur austenitischen schwe
ATE269512T1 (de) Verfahren und vorrichtung zur nox reduktion
DE60037008D1 (de) Verfahren und vorrichtung zur synchronisierung
DE60136283D1 (de) Verfahren und system zum perforieren
DE60137301D1 (de) Lithographieapparat und Verfahren zur Herstellung einer Vorrichtung
DE50109562D1 (de) Vorrichtung und verfahren zur winkelmessung
DE60124559D1 (de) Einrichtung und verfahren zur spracherkennung
DE60128338D1 (de) Verfahren und vorrichtung zur wafervorbereitung
DE50107486D1 (de) Navigationssystem und verfahren zur konfigurierung eines navigationssystems
DE60104254D1 (de) Verfahren und Vorrichtung zur Lochung eines Rohres
DE60036731D1 (de) Verfahren und vorrichtung zur durchführung der positionsregistrierung
DE60124647D1 (de) Vorrichtung und Verfahren zur Abstandsmessung
DE60033330D1 (de) Verfahren und Vorrichtung zur Blockrauschdetektion
ATE298481T1 (de) Verfahren und vorrichtung zur effizienten längensteuerung eines schlüssels
DE60128598D1 (de) Verfahren und system zur sicheren rekonfigurierung eines gerätes
DE60100823D1 (de) Verfahren und Vorrichtung zur Kantendetektion
DE60028581D1 (de) Verfahren und gerät zur entfernungsmessung
DE10196323T1 (de) Verfahren und Vorrichtung zur Sicherung einer Erdbewegungsmaschine
DE59914913D1 (de) Verfahren und eine Vorrichtung zur Funktionsüberprüfung eines Grenzschalters
DE60009503D1 (de) Verfahren und vorrichtung zum umwickeln
DE50106249D1 (de) Verfahren und Vorrichtung zur programmgesteuerten Fahrwerkvermessung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition