DE60042230D1 - Parallele datenverarbeitung - Google Patents

Parallele datenverarbeitung

Info

Publication number
DE60042230D1
DE60042230D1 DE60042230T DE60042230T DE60042230D1 DE 60042230 D1 DE60042230 D1 DE 60042230D1 DE 60042230 T DE60042230 T DE 60042230T DE 60042230 T DE60042230 T DE 60042230T DE 60042230 D1 DE60042230 D1 DE 60042230D1
Authority
DE
Germany
Prior art keywords
data processing
parallel data
parallel
processing
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60042230T
Other languages
English (en)
Inventor
Marc Duranton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/282,325 external-priority patent/US6349378B1/en
Priority claimed from US09/333,633 external-priority patent/US6405301B1/en
Application filed by NXP BV filed Critical NXP BV
Application granted granted Critical
Publication of DE60042230D1 publication Critical patent/DE60042230D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Image Processing (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Devices For Executing Special Programs (AREA)
DE60042230T 1999-03-31 2000-03-09 Parallele datenverarbeitung Expired - Lifetime DE60042230D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/282,325 US6349378B1 (en) 1999-03-31 1999-03-31 Data processing using various data processors
US09/333,633 US6405301B1 (en) 1999-06-15 1999-06-15 Parallel data processing
PCT/EP2000/002105 WO2000060457A1 (en) 1999-03-31 2000-03-09 Parallel data processing

Publications (1)

Publication Number Publication Date
DE60042230D1 true DE60042230D1 (de) 2009-07-02

Family

ID=26961376

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60042230T Expired - Lifetime DE60042230D1 (de) 1999-03-31 2000-03-09 Parallele datenverarbeitung

Country Status (7)

Country Link
EP (1) EP1088266B1 (de)
JP (1) JP2002541546A (de)
KR (1) KR20010052436A (de)
CN (1) CN1146785C (de)
DE (1) DE60042230D1 (de)
TW (1) TW504644B (de)
WO (1) WO2000060457A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2397140A (en) * 2003-01-13 2004-07-14 Advanced Risc Mach Ltd Data processing performance control
GB2397667A (en) * 2003-01-27 2004-07-28 Imagination Tech Ltd Multiple register load using a very long instruction word
WO2004114128A2 (en) 2003-06-25 2004-12-29 Koninklijke Philips Electronics N.V. Instruction controlled data processing device
CN101526893B (zh) * 2008-03-06 2014-02-19 华为技术有限公司 一种超长指令字指令并行执行方法及装置
US8731891B2 (en) * 2011-07-28 2014-05-20 Saudi Arabian Oil Company Cluster 3D petrophysical uncertainty modeling
US8924596B1 (en) * 2013-12-06 2014-12-30 Concurrent Ventures, LLC System and method for dividing and synchronizing a processing task across multiple processing elements/processors in hardware

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69431998T2 (de) * 1993-11-05 2004-08-05 Intergraph Hardware Technologies Co., Las Vegas Superskalare Rechnerarchitektur mit Softwarescheduling
US5787302A (en) * 1996-05-15 1998-07-28 Philips Electronic North America Corporation Software for producing instructions in a compressed format for a VLIW processor
WO2000000887A1 (en) * 1998-06-30 2000-01-06 Intergraph Corporation Method and apparatus for transporting information to a graphic accelerator card

Also Published As

Publication number Publication date
CN1146785C (zh) 2004-04-21
JP2002541546A (ja) 2002-12-03
WO2000060457A1 (en) 2000-10-12
EP1088266B1 (de) 2009-05-20
CN1306641A (zh) 2001-08-01
TW504644B (en) 2002-10-01
EP1088266A1 (de) 2001-04-04
KR20010052436A (ko) 2001-06-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition