DE59108160D1 - Method and circuit arrangement for displaying different input signal states - Google Patents

Method and circuit arrangement for displaying different input signal states

Info

Publication number
DE59108160D1
DE59108160D1 DE59108160T DE59108160T DE59108160D1 DE 59108160 D1 DE59108160 D1 DE 59108160D1 DE 59108160 T DE59108160 T DE 59108160T DE 59108160 T DE59108160 T DE 59108160T DE 59108160 D1 DE59108160 D1 DE 59108160D1
Authority
DE
Germany
Prior art keywords
input signal
different input
signal states
circuit arrangement
displaying different
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE59108160T
Other languages
German (de)
Inventor
Rudolf Dipl Ing Zeitschek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG Oesterreich
Original Assignee
Siemens AG Oesterreich
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG Oesterreich filed Critical Siemens AG Oesterreich
Application granted granted Critical
Publication of DE59108160D1 publication Critical patent/DE59108160D1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B29/00—Checking or monitoring of signalling or alarm systems; Prevention or correction of operating errors, e.g. preventing unauthorised operation
    • G08B29/02—Monitoring continuously signalling or alarm systems

Landscapes

  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electronic Switches (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Cookers (AREA)
  • Emergency Alarm Devices (AREA)
  • Electric Clocks (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)

Abstract

A method and a circuit are described for indicating different input signal states, in which a signalling device is activated or de-activated continuously or intermittently. This happens in such a way that levels (U2, U3) are provided for intermittent operation which differ from the levels for continuous activation (U4) or de-activation (U1). <IMAGE>
DE59108160T 1990-05-11 1991-04-29 Method and circuit arrangement for displaying different input signal states Expired - Fee Related DE59108160D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT0104690A AT398859B (en) 1990-05-11 1990-05-11 CIRCUIT FOR MONITORING AND OPERATING A NOTIFICATION ORGAN

Publications (1)

Publication Number Publication Date
DE59108160D1 true DE59108160D1 (en) 1996-10-17

Family

ID=3505417

Family Applications (1)

Application Number Title Priority Date Filing Date
DE59108160T Expired - Fee Related DE59108160D1 (en) 1990-05-11 1991-04-29 Method and circuit arrangement for displaying different input signal states

Country Status (9)

Country Link
EP (1) EP0456080B1 (en)
AT (2) AT398859B (en)
DE (1) DE59108160D1 (en)
DK (1) DK0456080T3 (en)
DZ (1) DZ1500A1 (en)
ES (1) ES2094167T3 (en)
GR (1) GR3021921T3 (en)
MA (1) MA22148A1 (en)
TN (1) TNSN91034A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2689279A1 (en) * 1992-03-27 1993-10-01 Cegelec Monitoring and alarm device for control / command installation.

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3944921A (en) * 1970-12-11 1976-03-16 Canon Kabushiki Kaisha Logic level test probe with grated oscillator
JPS49125066A (en) * 1973-01-27 1974-11-29
GB1447291A (en) * 1973-08-04 1976-08-25 Honeywell Ltd Logic level testers
DE2350362B2 (en) * 1973-10-08 1975-07-31 Siemens Ag, 1000 Berlin Und 8000 Muenchen Limit indicator for pulse-operated circuits
DE2451872C2 (en) * 1974-10-31 1976-10-21 Siemens Ag CIRCUIT ARRANGEMENT FOR LEVEL MONITORING
DE2455656B1 (en) * 1974-11-25 1975-09-11 Siemens Ag Threshold level
DE2729108C3 (en) * 1977-06-28 1980-03-13 Siemens Ag, 1000 Berlin Und 8000 Muenchen Circuit arrangement for recognizing clock signals and for converting them into digital continuous signals
US4307389A (en) * 1980-04-25 1981-12-22 Ford Motor Company Decoding circuit
DE3147742A1 (en) * 1981-12-02 1983-06-09 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for monitoring the occurrence of an alarm signal on an alarm line
DE3346527A1 (en) * 1983-12-22 1985-07-04 Siemens AG, 1000 Berlin und 8000 München METHOD AND ARRANGEMENT FOR THE FAULT-SAFE ALARM EVALUATION OF A DETECTING LINE OF A DANGER DETECTING SYSTEM

Also Published As

Publication number Publication date
TNSN91034A1 (en) 1992-10-25
MA22148A1 (en) 1991-12-31
GR3021921T3 (en) 1997-03-31
ES2094167T3 (en) 1997-01-16
EP0456080A3 (en) 1993-06-16
EP0456080B1 (en) 1996-09-11
EP0456080A2 (en) 1991-11-13
DZ1500A1 (en) 2004-09-13
ATE142809T1 (en) 1996-09-15
AT398859B (en) 1995-02-27
DK0456080T3 (en) 1997-02-17
ATA104690A (en) 1994-06-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee