DE4407210B4 - Semiconductor memory device structure - Google Patents

Semiconductor memory device structure Download PDF

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Publication number
DE4407210B4
DE4407210B4 DE4407210A DE4407210A DE4407210B4 DE 4407210 B4 DE4407210 B4 DE 4407210B4 DE 4407210 A DE4407210 A DE 4407210A DE 4407210 A DE4407210 A DE 4407210A DE 4407210 B4 DE4407210 B4 DE 4407210B4
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
device structure
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE4407210A
Other languages
German (de)
Other versions
DE4407210A1 (en
Inventor
Jung-Dal Choi
Kang-Deok Suh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE4407210A1 publication Critical patent/DE4407210A1/en
Application granted granted Critical
Publication of DE4407210B4 publication Critical patent/DE4407210B4/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/123—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
DE4407210A 1993-03-05 1994-03-04 Semiconductor memory device structure Expired - Lifetime DE4407210B4 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930003299A KR960012252B1 (en) 1993-03-05 1993-03-05 Semiconductor memory device

Publications (2)

Publication Number Publication Date
DE4407210A1 DE4407210A1 (en) 1994-09-08
DE4407210B4 true DE4407210B4 (en) 2007-05-16

Family

ID=19351689

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4407210A Expired - Lifetime DE4407210B4 (en) 1993-03-05 1994-03-04 Semiconductor memory device structure

Country Status (5)

Country Link
US (1) US5483483A (en)
JP (1) JP3943603B2 (en)
KR (1) KR960012252B1 (en)
CN (2) CN1036231C (en)
DE (1) DE4407210B4 (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0135798B1 (en) * 1994-08-17 1998-04-24 김광호 Mask rom for the current amplification
GB2300983A (en) * 1995-05-13 1996-11-20 Holtek Microelectronics Inc Flexible CMOS IC layout method
US5631486A (en) * 1995-09-22 1997-05-20 United Microelectronics Corporation Read-only-memory having both bipolar and channel transistors
TW372363B (en) * 1996-04-04 1999-10-21 Mitsubishi Electric Corp Manufacturing method for static semiconductor memory apparatus and semiconductor apparatus and bipolar transistor
KR100210846B1 (en) * 1996-06-07 1999-07-15 구본준 Nand cell array
JPH1092950A (en) 1996-09-10 1998-04-10 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH10154393A (en) * 1996-11-22 1998-06-09 Mitsubishi Electric Corp Static type semiconductor memory
JPH10163435A (en) * 1996-11-29 1998-06-19 Mitsubishi Electric Corp Semiconductor memory and manufacture thereof
US5895241A (en) * 1997-03-28 1999-04-20 Lu; Tao Cheng Method for fabricating a cell structure for mask ROM
US5896313A (en) * 1997-06-02 1999-04-20 Micron Technology, Inc. Vertical bipolar SRAM cell, array and system, and a method of making the cell and the array
JPH1139877A (en) * 1997-07-15 1999-02-12 Mitsubishi Electric Corp Semiconductor storage device
JPH1139880A (en) * 1997-07-16 1999-02-12 Mitsubishi Electric Corp Semiconductor storage device
JPH1139878A (en) * 1997-07-16 1999-02-12 Mitsubishi Electric Corp Static type semiconductor memory cell
JPH1166858A (en) * 1997-08-12 1999-03-09 Mitsubishi Electric Corp Semiconductor storage device
JPH1187659A (en) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp Nonvolatile semiconductor storage device
JP4073525B2 (en) * 1997-09-05 2008-04-09 株式会社ルネサステクノロジ Nonvolatile semiconductor memory device
JPH11163278A (en) * 1997-11-25 1999-06-18 Mitsubishi Electric Corp Semiconductor device and its manufacture
US6034881A (en) * 1998-04-15 2000-03-07 Vlsi Technology, Inc. Transistor stack read only memory
US6492211B1 (en) 2000-09-07 2002-12-10 International Business Machines Corporation Method for novel SOI DRAM BICMOS NPN
US6542396B1 (en) * 2000-09-29 2003-04-01 Artisan Components, Inc. Method and apparatus for a dense metal programmable ROM
CN101552273B (en) * 2002-09-30 2011-10-26 张国飙 Improved three-dimensional read only memory (ROM)
US7187036B2 (en) * 2004-03-31 2007-03-06 Taiwan Semiconductor Manufacturing Company Connection structure for SOI devices
JP2006260742A (en) 2005-02-15 2006-09-28 Sanyo Electric Co Ltd Memory
US8223553B2 (en) * 2005-10-12 2012-07-17 Macronix International Co., Ltd. Systems and methods for programming a memory device
JP2007257786A (en) * 2006-03-24 2007-10-04 Toshiba Corp Semiconductor memory device
US8638605B2 (en) * 2011-05-25 2014-01-28 Micron Technology, Inc. Apparatus and methods including a bipolar junction transistor coupled to a string of memory cells
JP6297783B2 (en) * 2013-03-08 2018-03-20 住友電気工業株式会社 Silicon carbide semiconductor device and manufacturing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868628A (en) * 1984-08-22 1989-09-19 Signetics Corporation CMOS RAM with merged bipolar transistor
DE4140681A1 (en) * 1990-12-10 1992-06-11 Samsung Electronics Co Ltd MASK-ONLY READING MEMORY (MASK ROM) AND METHOD FOR THE PRODUCTION THEREOF

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4648074A (en) * 1984-06-29 1987-03-03 Rca Corporation Reference circuit with semiconductor memory array
KR900000065B1 (en) * 1985-08-13 1990-01-19 가부시끼가이샤 도오시바 Semiconductor manufacturing method and memory device
US5101257A (en) * 1991-07-01 1992-03-31 Motorola, Inc. Semiconductor device having merged bipolar and MOS transistors and process for making the same
JPH05129554A (en) * 1991-07-01 1993-05-25 Toshiba Corp Dynamic semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868628A (en) * 1984-08-22 1989-09-19 Signetics Corporation CMOS RAM with merged bipolar transistor
DE4140681A1 (en) * 1990-12-10 1992-06-11 Samsung Electronics Co Ltd MASK-ONLY READING MEMORY (MASK ROM) AND METHOD FOR THE PRODUCTION THEREOF

Also Published As

Publication number Publication date
JP3943603B2 (en) 2007-07-11
CN1036231C (en) 1997-10-22
CN1171599A (en) 1998-01-28
KR940022834A (en) 1994-10-21
DE4407210A1 (en) 1994-09-08
CN1095188A (en) 1994-11-16
CN1149579C (en) 2004-05-12
US5483483A (en) 1996-01-09
KR960012252B1 (en) 1996-09-18
JPH077090A (en) 1995-01-10

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8128 New person/name/address of the agent

Representative=s name: PATENTANWAELTE RUFF, WILHELM, BEIER, DAUSTER & PAR

8110 Request for examination paragraph 44
8364 No opposition during term of opposition
R071 Expiry of right
R071 Expiry of right