DE4240504C2 - Process for the production of interconnect structures over trench regions of substrates - Google Patents

Description

The invention relates to a method for producing interconnect structures on the surface, the trench sides and within the lowered area of substrates, in particular semiconductor wafers, wherein to overcome Height differences positive photoresist is used.

The solution according to the invention is predominantly used in the technological process of producing microelectronic components, in particular for micromechanical sensors and actuators. At present, the technologies known in the prior art for micromechanical sensors and actuators are generally based on a basic principle:

• - Front are active and passive structures and details in one Level realized with maximum levels of 2 to 5 microns.
• - Etched back to the wafer thickness in the silicon on the back.

DE 41 03 565 A1 discloses a method for forming a fine pattern  a semiconductor with a step, in which a photosensitive Material is applied to the surface of the semiconductor. After that takes place a pre-exposure to UV radiation of the photosensitive material on the Non-step surface, which on the surface of the semiconductor outside the Step surface is applied through a first photomask. This is followed exposing the entire photosensitive material by a Photomask with the desired pattern by UV radiation after removal the first photomask and development and removal of the photosensitive Material on.

From the publication Crapella, S., Gualandris, R., "Planarization by Two-Resist Level "in Journ. Of Elektrochem., 1988, Issue 3, pages 683 to 685 it is known to form a resist layer, a coating in two Stages.

With the methods known hitherto, the requirement for the lithographic overcoming of height differences of up to 50 μm can not be realized for the following reasons:

• - with standard positive resistors can not be such a high level Cover, the paint breaks off at the edge.
• - with thickened standard positive resist the edge is repeated at Coating is covered, but it is not an open air / development of the Lacquer layer at the edge of the trench possible because these varnishes for the occurring Layer thicknesses have too low a transparency.
• - in the electrostatic spray coating with special low viscosity and highly transparent resists will be at appropriate Coating parameters covered the trench edge. At the following Tempering, the resist withdraws from the trench top edges and do not cover them anymore.

The invention has for its object to provide a method with which Leitbahnstrukturen on the surface, the trench sides and within the lowered area of substrates, in particular semiconductor wafers, can be produced, with height differences up to 50 microns be overcome.

According to the invention, the object is achieved by a method which is in the patent claim contains specified characteristics, solved.

The solution according to the invention avoids the disadvantages described in that by a special coating regime the trench edges for subsequent etching processes with certainly sufficient amount of resist material be covered and by means of multiple exposure and development to the exposed areas of paint also very high starting paint thickness safely removed (can be developed). A specially adapted to this process Developer concentration avoids the long development times Damage to the unexposed paint areas.

The invention further makes it possible for the in-plane conductive and structured connection of components having a difference in level of up to 50 μm to produce resist structures for producing these micron-sized interconnects on substrates by means of photolithography

• A structuring of the resist and thus the subsequent generation of Channels simultaneously on the surface, the trench sides and takes place within the lowered area.
• - The trench edges for subsequent etching processes with certainly sufficient Amount of resist material are covered.
• - the technology with those from the process of semiconductor manufacturing  known lithography process is compatible.

Below, the inventive solution will be explained in more detail by way of example with reference to FIG. 1.

The coating is applied by spin coating. To achieve the necessary high layer thicknesses, the resist 5 is only briefly spun (5 s). Depending on the spin speed, layer thicknesses between 5 μm and more than 20 μm can be achieved. For a sufficient coverage of the trench edges ( 2 ) is a double coating with each subsequent drying necessary. According to the invention, a 10-minute air drying at room temperature is to be inserted between the coating application and the subsequent drying of the resist on the hotplate section (profile 40/70/120 ° C., cycle 1 min), since otherwise sufficient edge coverage can not be ensured.

The layer thickness in the 1st coating was 13 μm, in the second coating set to 5 microns. With the chosen dry regime becomes a sufficient resistance of the lacquer layer both to the Developer medium as well as the dissolution of the order of the second coat of paint at the same time still high photosensitivity and layer quality reached.

The exposure of the resist is possible in principle with all conventional adjustment and exposure devices. Due to the achieved high paint thicknesses (at 50 microns difference in height between base ( 1 ) and plateau ( 4 ) of silicon ( 6 ) about 40 microns of paint), despite the high transparency of the resist, a double exposure with intermediate development necessary to complete resistance to freedom achieve.

The development parameters are for optimal results to adapt to respective requirements. To minimize the paint removal of the unexposed varnish on the trench top edges must be the method of Diving development applied and the developer concentration accordingly  be optimized.

The etching of the aluminum ( 3 ) and the paint removal in 2 stages (stage 1 wet, stage 2 plasma-chemical) is carried out by the known methods.

LIST OF REFERENCE NUMBERS

1

nadir

2

grave edge

3

aluminum

4

plateau

5

resist

6

silicon

Claims (1)

Process for the production of interconnect structures on the surface, the trench sides and within the lowered area of substrates, in particular semiconductor wafers, wherein a high-viscosity and highly transparent, photo-sensitive, water-based height difference of 10 .mu.m to 50 .mu.m for overcoming on the trench side an alkaline processable positive resist ( 5 ) in a layer thickness of 10 .mu.m to 30 .mu.m is used and a Belackung, ie the formation of the positive resist layer, takes place in two stages and for the structure of a repeated repetitive exposure and development of the positive resist layer is carried out, wherein to achieve a secure edge covering and paint stability at the trench edges ( 2 ) after each of the two stages of Belackung an air drying of a few minutes.