DE4222546A1 - Sync. data transmission system - Google Patents

Abstract

The data transmission system has a circuit defining the data bytes of the transmitted or received signal, with a control stage (2) using at least one counter for marking the pointer bytes of each high bit rate transport unit and at least one counter for marking the data bytes.For each group of low bit rate transport unit within each high bit rate transport unit, a respective position marking counter is provided the count conditions used to identify the useful data bytes and the counter bytes.

Description

The invention relates to a circuit arrangement for evaluating or forming pointer bytes receiving or transmitting signals of the synchronous digital hierarchy.

Such a circuit arrangement is from the German Patent application P 41 08 429 known that an STM-1 signal of the synchronous digital hierarchy. A first from the German patent application mentioned above P 41 08 429 known circuit arrangement is used for off Evaluation of pointer bytes of an STM-1-Si to be received gnals. A second circuit arrangement known therefrom is used to form pointer bytes of an STM to be sent 1 signal.

The STM-1 signal is structured by frame and points in addition to the actual useful data of the signal, Steuerinfor mations and justification data, which are known as data gaps be net. An STM-1 frame consists of 270 columns and 9 lines (270 bytes per line). In lines 1 to 3 and 5 to 9, each in columns 1 to 9 is the "Section Overhead "(SOH) for control and error detection information mations and in the rest of the area (AU user data rich = AU payload) data of the signal, justification data and further control information housed.

Several different ones can be found in the AU user data area Containers (C-4, C-3, C-2, C-12 and C-11) housed his. The basic packaging will be under a container understood for digital useful signals. For example an administrative unit ("Admi  nistrative unit ") AU-4 with a container C-4 for one Bit rate of 139.264 Mbit / s must be introduced. Or it can NEN three management units AU-3 in the STM-1 frame be housed. Of which z. B. an administrative unit AU-3 a container C-3 for a bit rate of 44.736 Mbps. The second management unit AU-3 can for example seven "Tributary Unit Groups" TUG-2 with one container C-2 each for a bit rate of 6.312 Mbit / s included. In the third administrative unit AU-3 can also seven TUG-2 with three Contai each nern C-12 inserted for a bit rate of 2.048 Mbit / s his. The containers are made by adding Control information and stuffing information parent Transport units (VC-4, VC-3, TU-3, TU-2, TU-12 and TU-11).

From the above patent application it is known that for each container contained in the STM-1 signal a separate tax arrangement for evaluation or bil pointer byte is available. Such control requires a large amount of hardware (component-intensive).

The invention has for its object a circuit to create arrangement of the type mentioned, the requires little hardware.

The task is off with a circuit arrangement evaluation or to form pointer bytes one too emp catching or transmitting signals of the synchronous digita len hierarchy of the type mentioned by the following Features resolved.

The circuit arrangement contains a control arrangement which

• - Using counters to determine the position of the as Data bytes in the signal that serve pointer bytes,
• - to identify those determined as pointer bytes  Data bytes and
• - for taking at least pointer values from the ge marked pointer bytes or little to insert least of pointer values in the marked Poin terbytes is provided.

The circuit arrangement according to the invention contains a Control arrangement which uses counters to determine the position of each Data bytes in the signal received or to be sent synchronous digital hierarchy. Such one Signal can, for example, the frame synchronized STM-1 signal. Meter readings of some meters give the Position of the data byte received or to be sent. Furthermore, certain meter readings are called pointer bytes tes detected. The so-called AU pointer bytes (H1, H2 and H3 pointer bytes) for a management unit AU-4 or AU-3, which is in columns 1 to 9 on the fourth row of the STM-1 frames are transported, included among others rem the information about the beginning of a VC-4 or VC-3 in the AU user data area (rows 1 to 9, columns 10 to 270) and darning information. At appropriate points in the AU user data area become the so-called TU pointer bytes (V1, V2 and V3 pointer bytes for TU-2, TU-12 and TU-11 and H1, H2 and H3 pointer bytes for TU-3). The beginning of a VC-4, VC-3, TU-3, TU-2, TU-12 or TU-11 is in the pointer value transported in the pointer bytes contain.

After marking, the pointer bytes become little at least the pointer values are taken from the received signal or at least the pointer values in the pointer bytes of the inserted signal to be sent. More in the Pointer bytes can be used to transport information can also be removed or inserted.  

Such a control arrangement has a lower hardware level reauf effort as the known circuit arrangement on and can be used for any type of assembly units process the corresponding pointer bytes, without the control arrangement when the zu compilation of the transport units can be changed got to. The control arrangement determines which containers for example in the STM-1 signal.

To determine the position of the AU pointer bytes in the signal teln, the control arrangement contains at least one Count of the AU pointer bytes provided. With Er The control arrangement is sufficient for certain counter readings continue to create a pointer label for an AU Pointer byte or a possible darning point provided. The Pointer marking identifies a data byte as a pointer terbyte or a possible positive or negative stuff Job. In the case of a positive darning action, the user formation left out. That means that according to the AU Poin terbytes the next data byte does not contain any useful information holds. In contrast, a negative stuffing action transmit useful information at this darning point. In this case, the H3 pointer byte would be useful information tion included.

To determine the position of the TU pointer bytes in the signal teln, the control arrangement contains at least one for Count of data bytes provided in the AU user data area Counter arrangement. By evaluating the counter readings of the Counter arrangement is the control arrangement for Determination of the position of the data bytes in the AU user data area, for assigning the data bytes to the TU transport units and to create a pointer label for a TU pointer byte or a possible darning point hen. The counter arrangement determines the position of the data  bytes in the AU user data area by dividing the data bytes a TU-3, TU-2, TU-12 or TU-11 (TU transport units) assigned and within the TU transport units positions of the data bytes and thus the position the pointer bytes and possible stuffing points Detection of at least one meter reading determined.

In one embodiment is for the counter arrangement

• - At least one column counter each for determining the Column and at least one line counter each for loading line in an AU-4 or AU-3 administrator unit,
• - A position counter for at least one TU-3 for identification drawing of the user data bytes in a TU-3,
• - a counter to identify TUG-2,
• - At least one counter for marking TU-12 in at least one TUG-2,
• - At least one counter for marking TU-11 in at least one TU-11 and
• - at least one position counter for each at least one TU-2, one TU-12 and one TU-11 for Identification of the user data bytes in a TU-2, one TU-12 and a TU-11 included.

Containers C-3, C-2, C-12 and C-11 can be transported. The parent "Tributary Units" TU-2, TU-12 and TU-11 are in "Tributary Unit Groups" TUG-2 added. At each User data bytes and the pointer bytes and any existing ones fixed and variable darning points in such a TU-Trans Detect port unit are column and Line counter, counter for marking TUG-2, TU-12 and TU-11 and position counter for TU-2, TU-12 and TU-11 available. It is only necessary in one TUG-2 to determine how the data bytes are distributed.  

Likewise, only the content of one must be transported in the TUG-2 ting TU-2, TU-12 or TU-11 can be detected. It is but also possible and more complex for everyone Containers to use their own meters. The counter arrangement therefore determined either for an administrative unit AU-4 or AU-3 any conceivable constellation of transport units and determines the user data bytes using the posi tion counter and, for example, fixed darning points the column and row counter.

The position counter for a "Tributary Unit" TU-3 is for the labeling of the content of an AU-3 is not required Lich. A TU-3 can only work in one administrative unit AU-4 be transported. To make the counter arrangement easy design and for both administrative units AU-3 and AU-4 this position counter can also be used for one AU-3 available. So for an STM-1 frame are for three administrative units AU-3 to be transported therein three such counter arrangements are required. These three Counter arrangements also for an administrative unit AU-4 An AU-4 can be used in three areas be divided, which alternate columns. In the counter arrangement used in the invention faces a meaning that previously known from the prior art tends to have fewer counters.

In a development of the invention, the tax includes arrangement a pointer circuit, which is present when a Pointer identification for the H1 or V1 and H2 or V2 Pointer bytes for removing a part of the pointer value from or to insert part of the pointer value is provided in the pointer bytes. The pointer circuit therefore detects at least the pointer identifier for an H1, H2, V1 or V2 pointer byte and ent takes or joins the parts that make up the  Composed of the pointer value, from or into the H1, H2, V1 or V2 pointer bytes.

The current pointer value is in each case known with the previous current pointer value formed. Under the current pointer value is the pointer value to be understood which indicates the start of the corresponding transport unit. Therefore the pointer circuit contains a pointer memory, at least for storing a pointer value one by one of those contained in the control arrangement pointer address to be formed designated storage space is provided. For the VC-4 and VC-3 are fixed pointer addresses for which TU-2 are used by the counter to identify a TUG-2 dependent pointer addresses and for the TU-12 or TU-11 from the counter for identifying a TUG-2 and of which each meter to identify a TU-12 or TU-11 dependent pointer addresses.

With the received signal, the formation of the current one Pointer values for a TU transport unit by evaluator the current, the newly received and the last received pointer value carried out. The poin Switching is in accordance with the newly received and the last received pointer value and if not agreement of the current current pointer value and of the new pointer value at most to set the newly received pointer values as the current pointer value intended. Otherwise the current pointer remains also the current pointer value.

A darning action is e.g. B. in a TU transport unit TU-2, TU-12 and TU-11 at the earliest with the V3 pointer byte carried out. If a darning action is to be carried out, the beginning of the TU transport unit shifts  Data byte. This means that the TU pointer value is one Unit is decremented or incremented. If after Evaluation of the V1 and V2 pointer bytes of the TU-Trans port units TU-2, TU-12 or TU-11 the pointer value indicates the beginning of the corresponding container, which is between between the V2 and V3 pointer byte occurs before the actual darning a shift on. The same thing applies to the administrative units AU-4 and AU-3. To one Prevent displacement before the actual darning point the pointer circuit is when a positive occurs ven or negative darning action only after the occurrence of the H3 or V3 pointer bytes of a transport unit for increments Setting or decrementing the pointer values is provided.

So that the counters of the counter arrangement have a common one Reference point to the frame of the received signal of the syn chronic digital hierarchy is the initialization the counter of the counter arrangement at the beginning of each AU-4 or AU-3 management unit provided.

From German patent application P 42 05 959 is one Circuit arrangement for balancing frequency and / or Phase fluctuations between an incoming and an contain outgoing AU user data bytes and other data bytes known signal. The circuit arrangement contains a pre-buffer for temporary storage of the user data bytes and an AU pointer identifier that marks the beginning of an AU Indicates Pointers, and a control circuit, which at issues a blocking signal to a tamping. A darning occurs with frequency and / or phase fluctuations and the SOH data of the STM-1 frame. So if no use data bytes are read from the pre-buffer Lock signal before.

In the control arrangement of the circuit according to the invention  arrangement for the evaluation of pointer bytes of the received STM-1 signal receives the control arrangement a lock signal if AU user data bytes are not present and is when a lock signal appears to indicate a pointer intended for the absence of user data bytes. The Lock signal is, for example, from the German Patent application P 42 05 959 known pre-buffer supplied. The pointer therefore indicates whether there are AU user data bytes. There is also a position counter for counting the AU usage data bytes available, if the lock signal is present the count stops. This position counter becomes Determination of the AU pointer bytes required.

If the respective current pointer value matches with the content of the corresponding position counter is the Control arrangement for outputting a pointer for each Start of an AU-4, AU-3, TU-3, TU-2, TU-12 or TU-11 intended. For example, is the counter content of the AU Position counter equal to the pointer value of the corresponding one Management unit AU-3 or AU-4 a pointer is issued ben that in a to buffer the user data bytes of the STM-1 signal serving buffer memory and can be used to assign the chronological order is used when reading the user data bytes.

To find out when AU pointers occur, an AU Pointer counters included in the control arrangement. The tax The arrangement receives an AU pointer identifier for identification the beginning of the AU pointer. This AU pointer identifier initializes the AU pointer counter to count the AU Pointer bytes. The AU pointer identifier can be derived from the German patent application P 42 05 959 known pre-buffer to be delivered.

The circuit arrangement according to the invention, one to sen  forms the signal of the synchronous digital hierarchy, gets used by one to buffer user data bytes the buffer memory a pointer for the start of an AU-4, AU-3, TU-3, TU-2, TU-12 or TU-11 delivered. On delivery pointer for the start of an AU-4, AU-3, TU-3, TU-2, TU-12 or TU-11 is the pointer circuit for Formation of the current pointer value from the counter content of the corresponding position counter. Should posi tive or negative stuffed, so incremented or the pointer circuit decrements the current pointer value.

For the signal to be sent from the synchronous digital here archie, a tax arrangement is required, which is another Send frame counter arrangement with a column counter Determination of the column and a line counter for determination line in the frame synchronized signal of the synchronous digital hierarchy (STM-1 signal) contains. Of the Column counter and the row counter are for the initials sation of the counters of the meter arrangement required (Er creation of a common reference point). The counters of the Counter arrangement are at the beginning of the 9th column and the 4th line in the STM-1 frame initialized. Furthermore serves the column and row counter in the send frame Counter arrangement for determining pointer markings for the AU pointer bytes.

Embodiments of the invention are as follows explained in more detail with reference to the figures. Show it:

Fig. 1 is a schematic representation of the STM-1 frame with a VC-4 container,

Fig. 2 is a multiplex structure of the STM-1 signal,

Fig. 3 shows the multiplex scheme of "tributary units" TU-11 and TU-12 in a "Tributary Unit Group" TUG-2,

Fig. 4 shows the multiplex scheme of "Tributary Unit Groups" TUG-2 in a virtual container VC-3,

Fig. 5, the multiplexing scheme of "Tributary Unit Groups" TUG-2 in a "Tributary Unit Group" TUG-3,

Fig. 6, the multiplexing scheme of "Tributary Unit Groups" TUG-3 into a virtual container VC-4,

Fig. 7 shows the multiplexing scheme of administrative units AU-3 in an administrative unit group AUG

Fig. 8 is a management unit, shown schematically AU-4 to create Point for "tributary units" TU-3,

Fig. 9 is a schematic representation of a Vielfachrah mens tainer with Point create the virtual Con VC-11, VC-12 and VC-2,

A circuit arrangement Fig. 10, a first embodiment according to the Invention,

Fig. 11 is a block diagram of a write scarf 10 contained in the regulatory Schaltungsan of FIG. Tung,

Fig. 12 is a block diagram of an in Schaltungsan 10 receive poin contained order of FIG. Terschaltung,

Fig. 13 shows a second embodiment of an inventive circuit arrangement and

FIG. 14 is a block diagram of a reading circuit contained in the circuit arrangement according to FIG. 13.

Transmission systems, the signals of synchronous digital Hierarchy, have regenerator circuits, in which matching circuits frequency and phase swan between an incoming and an outgoing Compensate for the signal. With such a transmission system for example, an STM-1 signal is transmitted. This STM-1 signal is structured according to the frame and in the CCITT recommendation G709 explained in more detail. In the following sol  len the essential parts of the invention of the STM-1- Frame structure are explained.

The structure of an STM-1 frame is shown schematically in Fig. 1a. The frame consists of 270 columns and 9 rows (270 bytes per row). In rows 1 to 3 and 5 to 9, in each case in columns 1 to 9, the so-called "section overhead" (SOH) for control and error detection information, in the 4th row of columns 1 to 9 is the AU pointer (AU-P) housed, and inserted in the remaining columns and rows the actual user information, the "AU payload" or the AU user data area (P). As shown in FIG. 1b, a virtual container VC-4 is accommodated in the user data area, which consists of a C-4 user data area and a control area POH ("path overhead"). A container is understood here to mean the basic packaging unit for user data bytes. Additional containers can be accommodated in such a container.

Multiplexing for the STM-1 frame is shown in FIG. 2. Data of a useful signal with a bit rate of 44.736 Mbit / s are brought into a container C-3. By adding a POH, the container C-3 becomes a virtual container VC-3. By adding pointer bytes, stuff bytes and other bytes, the virtual container VC-3 becomes a "tributary unit" TU-3 or an administration unit ("Administration Unit") AU-3. Three management units AU-3 are inserted into an STM-1 frame.

In a container C-2, data of a useful signal are included a bit rate of 6.312 Mbit / s, in a container C-12 data of a useful signal with a bit rate of 2.048 Mbit / s and in a container C-11 data  of a useful signal with a bit rate of 1.44 Mbit / s adds. Containers C-2, C-12 and C-11 become virtuoso All containers VC-2, VC-12 and VC-11 by one each POH is added. After the virtual container VC-2, VC-12 and VC-11 by stuff bytes and other bytes "Tributary Units" TU-2 have been added, TU-12 and TU-11. The TU-2, TU-12 and TU-11 are in one "Tributary Unit Group" TUG-2 summarized. In a TUG-2 one TU-2 or three TU-12 or four TU-11 is used.

In a VC-3 can seven TUG-2 or in a TUG-3 they ben TUG-2 are inserted. In the first case it is still a POH and in the second case additional bytes and stuff bytes added. Three TUG-3 are fitted into one VC-4, which also has a POH, additional bytes and stuff bytes contains. Also in the VC-4 - as he did above refines - a container C-4 can be inserted. The VC-4 is converted into an AU-4 (also as an administrative unit group AUG referred to) inserted compared to the virtual Con tainer VC-4 contains an AU pointer. This AU-4 forms then together with the SOH the STM-1 frame. By much folds the STM-1 frame results in higher STM frames (STM-N).

The multiplex formation of four TU-11 or three TU-12 into a TUG-2 is clear from FIG . The bytes of a column of a TU-11 or TU-12 are inserted alternately in a TUG-2.

Figure 4 shows the multiplexing scheme for inserting seven TUG-2 into a VC-3. The first column of the VC-3 is covered with a POH. In the following columns, the bytes of a column of a TUG-2 are inserted alternately in the VC-3. A similar multiplexing scheme is shown in Fig. 5 for multiplexing seven TUG-2 into one TUG-3. However, the first two columns are intended for fixed darning points, among other things.

The multiplexing of three TUG-3 in a VC-4 is shown in Fig. 6. In the first three columns of the VC-4 there is a POH and fixed stuffing points. The remaining columns of the VC-4 are alternately filled with columns of the respective TUG-3.

The interleaving of three AU-3s with the associated AU pointer is shown in FIG. 7. The AU pointers of each AU-3 are alternately stored in the AU pointer of the STM-1 frame. The bytes of each column of an AU-3 are also stored alternately in an AUG.

Each AU-3 and AU-4 and each TU-3, TU-2, TU-12 and TU-11 have pointers. The pointers are inserted at predefined positions. They indicate the beginning of the associated virtual container and can contain stuffing data. The position of the pointers for the AU-4 and AU-3 can be seen from FIGS. 1 and 7. The position of the pointers for the TU-3 results from FIG. 8. The pointers H1, H2 and H3 are for each of the three TU-3 a VC-4 in columns 4 to 6 of VC-4, lines 1 to 3 housed. In the 1st column of the VC-4 there is a POH and in the 2nd and 3rd column of the VC-4 there are fixed stuffing points FS if three TU-3 are inserted in a VC-4.

A TU-2, TU-12 or TU-11 is divided into four in a row transmitted STM-1 frame. In the first frame one "Tributary Unit" is the poin at the first byte position ter V1, in the second frame at the first byte position of the Pointer V2, in the third frame at the first byte position the pointer V3 and in the fourth frame at the first bytepo Pointer V4 is available. In the third frame can  the second byte position be a positive justification point. Otherwise there are 26 bytes of a virtual container per frame VC-11, 35 bytes of a virtual container VC-12 and 107 Transfer bytes of a virtual container VC-2.

A first exemplary embodiment of the circuit arrangement according to the invention for controlling a buffer memory 1 for a write-in process, which is part of an adaptation circuit and processes STM-1 signals, is shown schematically in FIG. 10. The buffer memory 1 is controlled by a reception control arrangement 2 and receives from it a write command, a pointer value J1D and a buffer memory address PS. The receive control arrangement 2 is also coupled to a circuit arrangement 3 (hereinafter referred to as a pre-buffer circuit) for compensating for frequency and / or phase fluctuations between an incoming and an outgoing signal. This pre-buffer circuit 3 is known from German patent application P 42 05 959. It supplies data bytes to the buffer memory 1 and to the reception control arrangement 2 . It also provides a lock signal to the receive control unit 2 when no data bytes are read from the pre-buffer circuit 3 . The receive control arrangement 2 receives from the pre-buffer circuit 3 an AU pointer identifier which identifies the beginning of the AU pointer and a loading area identifier B. Each AU-3 and each associated AU pointer are alternately in the STM-1 Frame inserted. There are therefore three areas that appear alternately in the STM-1 frame. To identify an area, the pre-buffer circuit 3 supplies the area identifier B, which is also used in the reception control arrangement 2 for evaluating the useful data area. The information about which containers are transported in the STM-1 signal is provided by a system management management memory, which is not shown here.

The receive control arrangement 2 contains a write circuit 4 and a receive pointer circuit 5 , which also receive data bytes from the pre-buffer circuit 3 . The receive pointer circuit 5 supplies the information as to whether there are AU user data bytes. In this case the pointer DAT is set to 1. Furthermore, it supplies the write circuit 4 with a J1 identifier which indicates whether the user data byte to be written into the buffer memory 1 is the start of a VC-4 or a VC-3 in an AU-3. The write circuit 4 also receives from the receive pointer circuit 5 the pointer value P _act (B, n) for each delivered container and the indication of whether there is a positive or negative stuffing action. The receive pointer circuit 5 contains a pointer memory in which pointer information from previous STM-1 frames is stored. The pointer address PA associated with each delivered container is supplied by the write circuit 4 to the receive pointer circuit 5 . It also gives pointer identifiers V1,. . . , V4 to the receive pointer circuit 5 , each of which indicates that a possible stuffing point and pointer bytes can be located here. Ultimately, it also supplies a TU identifier to the receive pointer circuit 5 , which indicates to which "tributary unit" the data byte supplied by the pre-buffer circuit 3 belongs.

It should also be mentioned that for reasons of clarity, clock signal connections are not shown and described in FIG. 10 and the following figures.

In Fig. 11 is a block diagram of the write circuit 4 is shown. This contains a receive counter arrangement 6 , a receive addressing arrangement 7 , an H4 arrangement 8 and a write decision arrangement 9 . The reception counter arrangement 6 contains three counter stages assigned to an area. Each counter stage contains a column counter AUS (B) for counting the columns in an AU-3 or AU-4, a row counter for counting the rows in an AU-3 or AU-4. For each area there is a counter TUG2 (B), a counter TU11 (B) and a counter TU12 (B). The counter TUG2 (B) determines to which TUG-2 the data byte is to be assigned when a TUG-2 is transported in the area. The counter TU12 (B) determines for an area to which TU-12 the data byte is to be assigned if several TU-12 are inserted in the TUG-2. The same is done for a TUG-2 for an area for a TU-11 with the counter TU11 (B).

There are also four position counters TU3POS (B), TU2POS (B), TU12POS (B) and TU11POS (B), each of which holds the position of a user data byte in the associated TU-3, TU-2, TU-12 and TU- 11 determine if such a transport unit is used. On the basis of the various counter readings, the reception counter arrangement 6 sets different pointer pointers (H1TU3 (B), H2TU3 (B), H3TU3 (B) and H3TU3P (B) for a TU3; VTU2 (B), VTU2P (B) for a TU- 2; VTU11 (B) and VTU11P (B) for a TU-11; VTU12 (B) and VTU12P (B) for a TU12), which indicate that the data byte is possibly a pointer byte or a stuffing point.

The position counter readings are supplied to the reception addressing arrangement 7 . The count of the column counter AUS (B) is supplied to the H4 arrangement 8 and to the write decision arrangement 9 and the count of the row counter AUZ (B) to the H4 arrangement 8 . Furthermore, the receive counter arrangement 6 also receives data bytes and the area identifier B from the pre-buffer circuit 3 and from the receive pointer circuit 5 the pointer DAT and the J1 identifier. It generates two TU pointers TU3D (B) and TUG2D (B) for each area, which indicate when a TU-3 or a TUG-2 is available. Furthermore, the receive counter arrangement 6 , like the receive addressing arrangement 7 , the H4 arrangement 8 and the write decision arrangement 9, also have a connection to the management memory of the system management.

The H4 arrangement 8 determines which of the four frames the supplied data byte belongs to. For this purpose, the H4 arrangement 8 is also supplied with the area identifier B and the data bytes from the pre-buffer circuit 3 and the pointer DAT from the receiving pointer circuit 5 . The H4 arrangement 8 supplies the value H4 _act (B, n) to the receive addressing arrangement 7 .

In the receive addressing arrangement 7 , the TU identifier, the pointer address PA, the buffer memory address PS, a pointer identifier V1, V2, V3, V3P and V4 and a position pointer TUPOS are formed. The position pointer TUPOS supplies the value of one of the position counters TU3POS (B), TU2POS (B), TU12POS (B) or TU11POS (B). The pointer identification V1 to V4 indicates which pointer byte is present and whether there is a positive stuffing point.

The write decision arrangement 9 , which receives the area identifier B from the pre-buffer circuit 3 and the J1 identifier, the pointer DAT, the pointer value and a notification of whether there is a stuffing action from the receive pointer circuit 5 , generates a write command and the pointer J1D. In order to form the buffer memory address PS, the write decision arrangement 9 also delivers the counter reading from a write counter to the reception addressing arrangement 7 . There is a write counter VC4SC for a VC-4, a write counter VC3SC (B) for each VC-3 and a write counter LOSC (PA) for a maximum of 84 low-bit containers. A total of 84 C-11s can be transported in one AU-4 or in three AU-3s.

The above-mentioned arrangements 6 to 9 can be parts of an application-specific integrated circuit (ASIC) or processor elements which are designed using special design languages on a computer (cf., for example, "ASIC design with VHDL and logic synthesis" by D. Peer , Electronics 23, 1991, pages 84 to 92). The function of such circuit elements can therefore be explained more easily via status or program sequences.

The following describes the state sequences for arrangements in the write circuit 4 , which are listed in Appendix A. First, it is determined in the receive counter arrangement 6 of the write circuit 4 where the respective data byte supplied by the pre-buffer circuit 3 is to be classified in the STM-1 frame. In a management unit AUG three AU-3 are inserted alternately from column to column. The bytes of three consecutive columns therefore belong to different AU-3s. Each AU-3 is assigned to an area. An AU-4 merges completely into an AUG. This is also divided into three areas. Every third column is assigned to the same area. Columns 0, 3, 6 etc. belong to area 0, columns 1, 4, 7 etc. belong to area 1 and columns 2, 5, 8 etc. belong to area 2.

In the reception counter arrangement 6 , after the start, it is first checked whether the pointer DAT supplied by the reception pointer circuit 5 is 1, that is to say whether valid data are present. If there is no valid data, the system jumps back to the start. In the other case, it is checked whether the J1 identification also supplied by the receive pointer circuit 5 is present. The J1 label indicates the start of a VC-4 in an AU-4 or a VC-3 in an AU-3. If the J1 mark is present, the next step is to check whether an AU-4 is delivered. This information can be supplied from the management memory, for example. If there is an AU-4, an initialization is carried out for each of the three areas in the initialization routine (Appendix A) (the J1 identification is only available for the first area). First, area B is set to 0 and then the initialization routine is jumped to. The same is then done for the other two areas. If there is no AU-4 but an AU-3, the initialization routine is also jumped to. Then an initialization for the current area is carried out.

If there is no J1 identification, the query is of the management memory checked whether an AU-4 was delivered becomes. If this is fulfilled, the counter routine 1 (An slope A) jumped. If there is an AU-3, it becomes Counter routine 2 (Appendix A) jumped.

The initialization routine is explained below. After the start, the column counter AUS (B), the row counter AUZ (B), the counters TUG2 (B), TU11 (B), TU12 (B) and the position counter TU3POS (B) are initialized for the respective area. The column counter AUS (B) and the row counter AUZ (B) are assigned the value 0. The counter reading of the counter TUG2 (B), which identifies one of seven TUG-2, is set to 6. The counter reading of the counter TU11 (B), which identifies one of four TU-11, is assigned the value 3. The counter reading of the counter TU12 (B), which identifies one of three TU-12, is set to 2 ge. The counter reading of the position counter TU3POS (B), which identifies a data byte of a TU-3, receives the value 594. 765 data bytes are contained in a TU-3 (compare Fig. 3.8 / G709). The value 594 refers to the end of a TU-3 in a VC-4. The position counter TU3POS (B), like all counters mentioned and to be named, contains the counter reading 0 as the counter value.

The three other position counters TU2POS (B), TU12POS (B) and TU11POS (B), which each define the position of a data byte in a TU-2, a TU-12 or a TU-11, are only initialized if the first one of 4 frames is available. The pointer H4 _akt (B, n) provides information about this, which is supplied by the H4 arrangement 8 . If the pointer H4 _akt (B, n) is 0, the first frame is present and the counter reading of the position counter TU2POS (B) is assigned the value 320 (428 bytes per container TU-2; byte 320 denotes the end of a TU -2; compare Fig. 3.11 / G709), the counter reading of the position counter TU12POS (B) with the value 104 (140 bytes per container TU-12; byte 104 marks the end of a TU-12; compare Fig. 3.11 / G709) and the counter reading of the position counter TU11POS (B) with the value 77 (104 bytes per container TU-11; byte 77 marks the end of a TU-11; compare Fig. 3.11 / G709). If there is another frame (pointer H4 _act (B, n) ≠ 0), the system jumps to the end.

Next, the counter routine 1 described at Existence of an AU-4 is started. After the start it is checked whether the counter reading of the column counter OFF (B) is 86, i.e. the last data byte at the end one row has to be processed (87 columns per area). If this is affirmed, the count of the column counter becomes OFF (B) set to 0. Then the counter reading of the Line counter AUZ (B) increased by one unit. If the tough If the status is 9, this is set to the value 0. In this case, the line counter again marks the  first line a VC-4. Is the counter reading of the columns counter OFF (B) not equal to 86, it becomes one unit elevated.

In a VC-4, three TUG-3s can either be transported with one TU-3 each or seven TUG-2s each. The position of the data byte in the VC-4 is determined below for each possible combination. First, this is determined in a TU-3. Here it is checked whether the counter status of the column counter OFF (B) is greater than 1. If this is not the case, the TU pointer TU3D (B) is set to 0. This means that there are no TU-3 data. Data from a TU-3 are only available in the third column of each area (see Fig. 2.4 and 2.5 / G709). In the other case, the TU pointer TU3D (B) is set to 1 and then the counter reading of the position counter TU3POS (B) is increased by one unit. At the counter reading 765, the position counter TU3POS (B) starts counting again at 0 (765 bytes per TU-3).

Furthermore, it is checked whether a pointer byte or a there is a positive or negative possibility of darning. First is asked whether the counter reading of the column counter is OFF (B) is 1. If the answer is no, the three pointers pointers H1TU3 (B), H2TU3 (B) and H3TU3 (B) set to 0. Then you are asked whether the counter reading of the column counter OFF (B) equal to 2 and the counter reading of the line counter AUZ (B) is 2. If this is negated, the pointer becomes pointer H3TU3P (B) set to 0. In the other case the pointer pointer H3TU3P (B) is set to 1. This gives indicates that there is a positive daring possibility. If the The counter reading of the column counter OFF (B) is 1 asked whether the count of the row counter AUZ (B) is the same Is 0. If the answer is affirmative, the first line is present and the Pointer pointer H1TU3 (B) is set to 1. Is the  Counter reading of the line counter OFF (B) not equal to 0, is considered as next checked whether the counter reading of the line counter AUZ (B) is 1. If this is correct, the pointer pointer becomes H2TU3 (B) set to 1. If not, it will last checked whether the counter reading of the line counter AUZ (B) is 2. If the data byte is in the third Line, a pointer pointer H3TU3 (B) is equal to 1 ge puts. The pointer pointers H1TU3 (B), H2TU3 (B) and H3TU3 (B) if they are set to 1 indicate that the pointers represent H1 and H2 and a negative darning option (H3) available.

Next, the position of the data byte is determined when there are TU-2. First, it is checked whether the count of the column counter AUS (B) is greater than 2. If this is not the case, the TU pointer TUG2D (B) is set to 0, ie there is no data from a TUG-2 and thus from a TU-2. In the other case, the TU pointer TUG2D (B) is set to 1 (see Fig. 2.4 and 2.7 / G709). Then it is checked which TUG-2 is present. It is asked whether the counter reading of counter TUG2 (B) is 6. If this is not the case, the counter reading of the counter TUG2 (B) is increased by one unit, in the other case it is set to 0 and asked whether the counter reading of the column counter AUS (B) is less than 10 and the counter reading of the row counter AUZ (B ) is 0. This query and the following instructions or queries are only carried out for the first TUG-2. The same results would be obtained for the six other TUG-2s. If the last query is answered in the affirmative, the part of a TUG-2 that contains the TU-2 pointer is present. In this case the pointer pointer VTU2 (B) is set to 1 and in the other case to 0. If the pointer pointer VTU2 (B) is 0, the data byte is not in the part of TUG-2 where pointers from TU-2 appear. After the pointer pointer VTU2 (B) is set to 0, the counter reading of the position counter TU2POS ( B) increased by one unit. At the counter reading 428, the position counter TU2POS (B) starts counting again at 0. A TU-2 contains 428 bytes in 4 frames (without pointer; compare Fig. 3.11 / G709). It is then checked whether the count of the column counter AUS (B) is less than 17 and the count of the row counter AUZ (B) is 0. If this is the case, the pointer pointer VTU2P (B) is set to 1 and in the other case to 0. This pointer pointer VTU2P (B) indicates the positive stuffing possibilities of the TU-2, which occur in columns 10 to 16 and in every first line. This assignment only applies to the third of the four frames.

After the data positions or pointer positions for a TU-2 in a TUG-2 have been determined last, the pointer positions or data positions are determined next by a TU-11 in a TUG-2. It is first checked whether the count of the column counter AUS (B) is greater than 2 and the counter TUG2 (B) is equal to 0. As mentioned above, data from a TUG-2 appear for the first time in the fourth column. If the check shows that the counter status of the column counter AUS (B) is less than or equal to 2 and the counter status of the counter TUG2 (B) is not equal to 0, the jump to marker 11 . In the other case, the question is asked whether the counter reading of the counter TU11 (B) is 3. If the answer is no, the counter reading of the counter TU11 (B) is increased by one unit. If the answer is affirmative, the counter status of the counter TU11 (B) is set to 0. The following instructions and queries are therefore only carried out for the first TU-11 in a TUG-2. Subsequently, it is asked whether the count of the column counter AUS (B) is smaller 31 and the count of the row counter AUZ (B) is zero. In the first line and up to the number of columns 30, pointers V1 to V4 appear in a TUG-3 (see FIGS . 2.6 and 2.7 / G709). If the data byte is in this part of the STM-1 frame, the pointer pointer VTU11 (B) is set to 1 ge. In the other case, the pointer pointer VTU11 (B) is set to 0 and the counter reading of the position counter TU11POS (B) is increased by one unit. At counter reading 104, the position counter TU11POS (B) starts counting again at 0. The position counter TU11POS (B) indicates the position of a data byte in a TU-11. To determine whether the data byte has a positive stuffing option, it is checked whether the count of the column counter AUS (B) is less than 59 and the count of the row counter AUZ (B) is 0 (see Fig. 3.11 / G709). If the answer is affirmative, the pointer pointer VTU11P (B) is set to 1. This assignment also only applies to the third of the four frames. In the other case, this pointer pointer VTU11P (B) is set to 0. This is followed by mark 11 .

At the end of the counter routine 1, the pointer position and the data positions of a TU-12 determined. First you are asked whether the counter reading of the column counter OFF (B) greater than 2 and the counter reading of counter TUG2 (B) is 0. If this is the case, if data with TU-12 , the question is asked whether the counter reading of the Counter TU12 (B) is equal to 2. In a TUG-2 3 TU-12 can be inserted. So the question serves to establish which TU-12 is available. If the question is answered in the negative, the Counter reading of counter TU12 (B) increased by one unit. in the otherwise the counter reading of the counter TU12 (B) set equal to 0 and further instructions and queries are carried out for the first TU-12. Then will asked whether the counter reading of the column counter is OFF (B) less than 24 and the count of the line counter AUZ (B) is 0. This is to determine whether pointer can be present. In a TUG-3 are namely in the  Columns 3 to 23 in the first row pointer. Will the If the answer is yes, the pointer pointer VTU12 (B) becomes 1 set, d. that is, there is a V1, a V2, a V3 or a V4 byte of a TU-12. Otherwise the Pointer pointer VTU12 (B) set to 0. Then the Counter reading of the position counter TU12POS (B) by one increased. The position begins at counter reading 140 count TU12POS (B) again at 0. The position counter TU12POS (B) indicates the position of a data byte in a TU-12. Then it is checked whether the Part exists in which there is a positive daring option can kick. It is asked whether the meter reading of the Column counter OFF (B) is less than 45 and the counter reading of the line counter AUZ (B) is 0. In columns 24 to 44 and the first line can be positive stuffing possible occur. If this is affirmed, the pointer pointer becomes VTU12P (B) set to 1 (This assignment also applies only for the third of the four frames). In the other case he's set to 0. After this last instruction is the counter routine 1 ends.

The counter routine 2 is described below is used when there is an AU-3. After the start it is checked whether the counter reading of the column counter AUS (B) is 86. If the answer is affirmative, the counter column counter OFF (B) was set to 0. Then the line count of the line counter AUZ (B) is increased by one Unit increased. If the counter content is 9, the lines counter AUZ (B) set to 0. Is the counter reading of the Column counter OFF (B) is not equal to 86, it is increased by one Unit increased.

A container C-3 or seven TUG-2 can be transported in a VC-3. For the transport of a TU-11, TU-12 and TU-2 in a TUG-2, the position in the STM-1 frame is determined below. First the TU-2 position is determined. First, it is checked whether the count of the column counter AUS (B) is 0 or 29 or 58 (see FIGS . 2.3 and 2.9 / G709). If this condition is met, the TU pointer TUG2D (B) is set to 0. In the first column of the VC-3 there is the VC-3-POH, in the 30th line and in the 59th fixed stuffing bytes. This means that the lines mentioned above do not contain any TUG2 data bytes. If the condition is not met, the TU pointer TUG2D (B) is set to 1. Then it is checked which TUG-2 is present. It is asked whether the counter reading of counter TUG2 (B) is 6. This query is intended to determine the first TUG-2. If the question is answered in the negative, the counter reading of counter TUG2 (B) is increased by one unit. In the other case, the counter reading of the counter TUG2 (B) is set to 0. The first TUG-2 is then also available. The following instructions and queries are only carried out for the first TUG-2.

The next step is to check whether the Spal t counter OFF (B) is greater than 7. If this is negated, lies the part of a TUG-2 that contains pointers from TU-2. The pointer pointer VTU2 (B) is then set to 1. in the otherwise the pointer pointer VTU2 (B) is equal to 0 sets and the counter reading of the position counter TU2POS (B) increased by one unit. Then you are asked whether the counter column counter OFF (B) is greater than 14. Will this If the query is not confirmed, the pointer pointer VTU2P (B) set equal to 1. The pointer pointer VTU2P (B) indicates as mentioned above, the data bytes, the positive Darning options included (This assignment only applies to the third of the four frames). Is the counter reading of the Column counter OFF (B) greater than 14 becomes the pointer pointer VTU2P (B) set to 0.  

The following part of the counter routine 2 is used to determine the pointer positions or data positions of a TU-11 in a TUG-2. Here, it is first checked whether the counter reading of the counter TUG2 (B) is 0. If this is not the case, a jump is made to a marker 12 . Upon confirmation, a query is made as to whether the counter reading of the counter TU11 (B) is 3. If the question is answered in the negative, the counter reading of the counter TU11 (B) is increased by one unit and in the other case it is set to 0. If the first TU-11 is found (counter reading of the counter TU11 (B) is 0), it is checked whether the counter reading of the column counter OFF (B) is greater than 28. This check and the following are only carried out on the first TU-11. If the question is answered in the negative, the pointer pointer VTU11 (B) is set to 1. When confirmed, the pointer pointer VTU11 (B) is set to 0. The data byte cannot therefore be a pointer byte. In the following, the counter reading of the position counter TU11POS (B) is increased by one unit. At counter reading 104, this is set to 0. Then it is checked whether the count of the column counter AUS (B) is greater than 57. If the question is answered in the affirmative, there is no positive stuffing possibility and the pointer pointer VTU11P (B) is set to 0. In the other case, there may be a positive stuffing option and the pointer pointer VTU11P (B) is assigned the number 1 (this assignment also applies only to the third of the four frames). Next is brand 12 .

At the end of the counter routine 2, the pointer position and the data positions of a TU-12. First is asked whether the counter reading of counter TUG2 (B) is 0. If this is affirmed, there are data from a TU-12 and the first TU-12 is searched. Here will asked whether the counter reading of the counter TU12 (B) is 2 is. If this question is answered in the negative, the counter reading of the  Counter TU12 (B) increased by one unit. Otherwise the counter reading of the counter is set to 0 and further instructions and queries carried out. It will then the part is searched in which there are no pointer bytes can. The question is asked whether the counter column counter OFF (B) is greater than 21. To Column 21 can still have pointer bytes. If the question is answered in the negative, the pointer pointer VTU12 (B) set to 1 and otherwise set to 0. Then The counter reading of the position counter TU12POS (B) increased by one unit. In the end there are still positive ones Darning possibilities wanted. In columns 22 to 42 positive darning opportunities occur. Hence the Question asked whether the column count OFF (B) is less than 43. If this is the case, the Pointer pointer VTU12P (B) equal to 1 (this assignment applies only for the third of the four frames) and in the other Case set to 0. With this last instruction is the counter routine 2 ends.

After it has been determined in the receive counter arrangement 6 where the data byte can be stored in the AU user data area, a buffer memory address PS for a data byte and a pointer address PA is formed in the receive addressing arrangement 7 and certain counter readings and are assigned to the data byte Pointers or markings assigned. First, however, a TU identifier is set to 0. This indicates that there is no data from a TU-3, TU-12 or TU-11. Then it is checked whether there is a VC-4. This information is taken from the management memory. If there is a VC-4, the buffer memory address PS is set equal to the content of a write counter VC4SC. The count of this write counter VC4SC is increased by one unit after each data byte. Furthermore, a pointer address PA is set to "00111BB". The two letters "B" are reserved for the area. If there is no VC-4, it is checked whether there is a VC-3 in an AU-3. This information also comes from the management memory. If this query is answered in the affirmative, the buffer memory address PS is set equal to the content of a write counter VC3SC (B). There is a write counter VC3SC (B) for each area, the counter value of which is increased by one unit after each data byte. The pointer address PA is set to "00111BB". If the last query has been answered in the negative, it is checked whether a VC-3 occurs in an AU-4. If this is the case, the buffer memory address PS is set to the content of the write counter VC3SC (B) and the pointer address PA is set to "BB00000". Otherwise, a jump is made to a TUG-2 address routine.

After the start of the receive TUG2 address routine, a The intermediate address ZW is set to "BBTTT". The two Letters "B" stand for the area and the three book Letters "T" are reserved for the content of the counter TUG2 (B) fourth. The next step is then from the management store taken whether there is a TU-2. If so, it will the pointer address PA from the intermediate address and two low-order bits that are set to "0" together quantity added. If the last query is answered in the negative, the contents of the management memory checks whether a TU-12 occurs. If the answer to this question is in the affirmative, is considered Pointer address PA formed a data word, which as high-order bits the intermediate address ZW and as low significant bits contains the content of the counter TU12 (B). in the otherwise the pointer address PA becomes the intermediate address ZW and the content of the counter TU11 (B) together set. Then the buffer memory address PS from the pointer address and the content of a write count lers LOSC (PA) put together. The pointer address forms  the more significant bits. There are in total 84 write counter LOSC (PA) by the pointer address Marked are. This is the receive TUG2 address Routine ended.

In the state sequence of the receive addressing arrangement 7 , the pointer pointers determined in the receive counter arrangement 6 are assigned to the pointer identifiers V1, V2, V3, V3P and V4 and the content of a position counter to a position pointer TUPOS. First, it is extracted from the management memory whether there is a TU-3. If this is the case, the TU identifier is set to 4 and the pointer identifier V1, the pointer pointer H1TU3 (B), the pointer identifier V2, the pointer pointer H2TU3 (B), the pointer identifier V3, the pointer pointer H3TU3 (B), the pointer identifier V3P the pointer H3TU3P (B) and the pointer identifier V4 are assigned the value 0. The position pointer TUPOS is set equal to the content of the position counter TU3POS (B). The system then jumps to the end of the receive addressing arrangement. If there is no TU-3, it is checked whether a VC-3 occurs in an AU-3 or a VC-4 occurs in an AU-4. This information is also taken from the management memory. If the query is answered in the affirmative, the pointer markings V1, V2, V3, V3P and V4 are set to 0. In the other case, it is checked whether there is a TU-11. If this is the case, the TU identifier is set to 3, a pointer V equal to the pointer pointer VTU11 (B), a pointer VP equal to the pointer pointer VTU11P (B) and the position pointer TUPOS equal to the content of the position counter TU11POS (B). If there is no TU-11, a query is made as to whether there is a TU-12. If the query is affirmed, the TU identifier is set to 2, the pointer V to the pointer pointer VTU12 (B), the pointer VP to the pointer pointer VTU12P (B) and the position pointer TUPOS to the content of the position counter TU12POS (B). In the other case there is a TU-2, in which the pointers V and VP are also assigned. The pointer V is set equal to the pointer pointer VTU2 (B), the pointer VP equal to the pointer pointer VTU2P (B) and the position pointer TUPOS equal to the content of the position counter TU2POS (B). The TU identifier is also assigned 0.

The next step is to determine which of the four frames is present at a TU-11, TU-12 or TU-2. This information is taken from the H4 arrangement. When the first frame is present (H4 _akt (B, n) = 0), the pointer identifier V1 is set to the pointer V and the remaining pointer identifiers V2, V3, V3P and V4 are set to 0. If H4 _akt (B, n) is 1, the second frame is present. Then the pointer identification V2 is set to the pointer V and the remaining pointer identification to 0. If the third frame is present (H4 _act (B, n) = 2), the pointer identifier V3 is set to the pointer V and the pointer identifier V3P is set to the pointer VP. The other pointer identifiers are assigned 0. If H4 _act (B, n) is not equal to 2, the data byte belongs to the fourth frame. In this case, only the pointer identification V4 is assigned the pointer V. The other pointer identifiers are set to 0. With this last instruction, the state sequence of the receive addressing arrangement 7 is ended.

After the state sequence of the receive addressing arrangement 7 , the state sequence of the write decision arrangement 9 is processed. Here, the write command for writing to the buffer memory 1 and an increase in the count of various write counters is carried out. After the start, it is taken from the management memory whether a VC-4 is present in an AU-4. If this query is answered in the affirmative, it is checked whether there is a J1 identifier. This information is provided by the receiving pointer circuit 5 . If this is affirmed, a pointer J1D is assigned 1. Otherwise the pointer J1D is set to 0. Then it is determined whether there is valid data (DAT = 1?). A write command is only generated if there is valid data.

If it turns out that there is no AU-4 with a VC-4, it is then queried whether an AU-3 with a VC-3 is present. The management memory supplies this information. If this is the case, the pointer J1D is set to 1, if a J1 marking has been determined. In the other In this case, the pointer is assigned 0. Then will with valid data (DAT = 1) and with no fixed stuffing Possibility in AU-3 (column counter OFF (B) ≠ 29 and ≠ 58) of the Write command formed.

If there is no AU-3 with a VC-3, it is checked whether the pointer TUPOS, which determines the position of a data byte in a container, is equal to the pointer value for a V5 or J1 byte. The pointer value is supplied by the receiving pointer circuit 5 . If the answer is affirmative, the pointer J1D is assigned 1 and in the other case 0. Then it is asked whether there is a TU-3. The management memory provides this information. If this is the case, a write command is given if a) valid data (DAT = 1) is available and b) the TU pointer TU3D (B) is set to 1 and c) there is no positive stuffing action or d) there is a negative stuffing action . If no TU-3 occurs, a write command is only given if a) valid data (DAT = 1) is available and b) the TU pointer TUG2D (B) is 1 and c) the pointer identifier V1 is 0 and d) the pointer designation V2 is 0 and e) the pointer designation V3 is 0 or there is a negative stuffing action and f) the pointer designation V3P is 0 or there is no positive stuffing action and g) the pointer designation V4 is 0. At the end of the write decision arrangement module, it is checked whether a write command is present. If this is the case, the counts of the write counters VC4SC, VC3SC (B) and LOSC (PA) are increased and the command "write buffer memory with data byte and pointer J1D" is given. The writing decision arrangement is thus ended.

When the state of the H4 arrangement 8 is checked, it is first checked whether the column counter AUS (B) is 0 and the row counter AUZ (B) is 5 and the pointer DAT is 1. In each AU-4 or AU-3, the H4 byte, which indicates the frame number, is transmitted in the 1st column and the 5th line. It is first checked whether the AU-4 is present. Then an H4 value is determined for each area identifier of the AU-4 (B = 1, 2, 3) and for the respective area in an AU-3. The frame number (H4 value) is obtained from the two least significant bits of the H4 byte. The H4 value is then stored in a memory located in the H4 arrangement 8 . This H4 value is referred to as the newly received H4 value H4 _new (B, n). This value is compared with the current H4 value H4 _akt (B, n-1) increased by 1. The current H4 value indicates the frame number of the previously received VC-4 or VC-3. The variable "n" refers to the newly received and the new H4 value to be determined. "n-1" refers to the respective previous H4 value. If the newly received H4 value is equal to the current H4 value increased by 1, the current H4 value is set equal to the newly received H4 value (H4 _act (B, n): = H4 _new (B, n)) . If this is not the case, it is checked whether the newly received H4 value forms a sequence together with the four last H4 values received before. A sequence means that the four frame numbers are sent periodically. There is no sequence if, for example, first the first and then the fourth frame has been sent. If such a sequence is available, the current H4 value is set equal to the newly received H4 value (H4 _act (B, n): = H4 _new (B, n)). If this is not the case, the current H4 value is incremented (H4 _act (B, n): = H4 _act (B, n) +1).

In Fig. 12, the block diagram of the receive pointer circuit 5 is shown. This contains a main arrangement 10 , an AU pointer counter 11 and an AU position counter 12 for counting the AU user data bytes and the AU pointer. The AU pointer counter 11 receives the AU pointer identifier from the pre-buffer circuit 3, which identifies the beginning of an AU pointer. The AU pointer counter 11 changes its counter content when an AU pointer byte occurs. The counter content of the AU pointer counter 11 is supplied to the main arrangement 10 and the AU position counter 12 . The AU position counter 12 also receives the lock signal and the area identifier B from the pre-buffer circuit 3. The counter content of the position counter 2 is given to the main arrangement 10 . The position counter 12 also supplies the pointer DAT.

The main arrangement 10 in the receive pointer circuit 5 contains several memories and counters. It receives a pointer address PA from the write circuit 4 , the pointer identifiers V1, V2 and V3 and the TU identifier. The pointer address PA is buffered in an address buffer. The calculation of the pointer value and whether there are positive or negative stuffing actions is carried out using an H1V1 memory, a pointer memory, a pointer counter and a stuffing counter. The main arrangement 10 also receives the data bytes from the pre-buffer circuit 3 .

The main arrangement 10 may change the pointer DAT in the event of a negative or positive stuffing action. Then it also provides the information whether a darning action is planned. The calculated pointer value P _akt (PA, n) for the TU-3, TU-2, TU-12 and TU-11, like the J1 identifier for the beginning of a VC-4 or VC-3 Contai ners leave .

In Appendix B, the state sequences of the receive pointer circuit 5 are described. First, the state flow of the AU pointer counter 11 is explained. The AU pointer identifier is supplied by the pre-buffer circuit 3 to the AU pointer counter 11 when the start of the AU pointer is present. If there is an AU pointer identifier, the count (AUPO) of the AU pointer counter 11 is set to the value 0. In the other case, a query is made as to whether the count of the AU pointer counter 11 has the value 12. If the value is not 12, there is a data byte of the AU pointer or the positive darning point. Then the count (AUPO) of the AU pointer counter 11 is increased by one unit. In the other case, no change is made to the content of the AU pointer counter 11 .

The state sequence of the AU position counter 12 shows the determination of whether there is valid data and the determination of the position of the respective data byte in the STM-1 frame. First, it is asked whether a lock signal from the pre-buffer circuit 3 is supplied. If this is not the case, the pointer DAT is set to 1, ie there is valid data. It is then checked whether the first area is present, ie whether the area identifier B is 0. If this is affirmed, the counter content (AUVC) of the AU position counter 12 is increased by one unit. The counter content (AUVC) of the AU position counter 12 is therefore only increased if the first area is present, ie it counts from 0 to 782 (9 lines, 87 columns). In the other case, the content of the AU position counter 12 is not changed. If there is a blocking signal, the pointer DAT is set to 0. No valid data is then available. It is then determined whether the first positive darning point is present. This is indicated by the AU pointer counter 11 from the first branch. If the count (AUPO) of the AU pointer counter 11 is 9, the first positive justification point is present. Then the count (AUVC) of the AU position counter 12 is set to 0. In the other case, the content of the AU position counter 12 is not changed.

The state sequence of the main arrangement 10 is then described. Here, the pointer address PA supplied by the write circuit 4 is this stored in an address latch after reading. The next step is to check whether there is an H1, H2, V1 or V2 byte. For this purpose, the counter status (AUPO) of the AU pointer counter 11 and the write circuit 4 are evaluated. If an H1 or H2 byte is present, the AU pointer counter 11 has the counter readings 0 to 5. The write circuit 4 outputs a pointer identifier V1 or V2 if there is a V1 or V2 byte.

If the answer is affirmative, the next step is to check whether there is an H1 or V1 byte. Is that the case, the H1 or V1 byte is stored in an H1V1 memory saved. If the question is answered in the negative, i.e. H. it is a H2 or V2 byte in front is used for an evaluation routine jumped.

The evaluation routine is explained below. First the H1 or V1 byte is read from the H1V1 memory and the newly received H2 or V2 byte. The last received pointer value P (PA, n-1) and the current pointer value P _akt (PA, n-1) are retrieved from the pointer memory from the pointer memory. These pointer values are stored in a memory area of the pointer memory which is characterized by the pointer address PA supplied by the write circuit 4 . The current pointer value is the pointer value that indicates the start address of a VC-4, VC-3, TU-3, TU-2, TU-12 or TU-11. The variable "n" refers to the newly received and to be calculated pointer values. "n-1" refers to the previous data byte. A new current pointer value is then determined in the following. This results from the current current pointer value, a newly read pointer value and the last received pointer value.

First, a pointer counter PZ is incremented. Then the STOPFDAT pointer is set to 1, which indicates whether the new current pointer value is set to the previous current or the newly received pointer value. If the newly entered pointer value P (PA, n) is not equal to the last received pointer value P (PA, n-1), the counter reading of the pointer counter PZ is set to the value 1. If the opposite is the case, it is checked whether the current pointer value P _act (PA, n-1) is equal to the new pointer value P (PA, n). If this is the case, the counter reading of the pointer counter PZ is set to the value 0. If the question is answered in the negative, the STOPFDAT pointer is first set to 0 and then checked whether the content of the pointer counter PZ is 3. If this is not the case, the current pointer value is not changed, ie P _act (PA, n): = P _act (PA, n-1). If the content of the pointer counter PZ is 3, the new current pointer value P _act (PA, n) is set equal to the new pointer value P (PA, n).

In addition to updating the pointer value, the evaluation routine also checks whether a darning action should be carried out. In CCITT recommendation G709 the conditions in Fig. 3.3 are. explains when there is a positive or a negative darning point. The pointer value consisting of ten bits alternately has so-called I bits and D bits. If the majority of the five I bits are inverted, a positive stuffing action is to be carried out, and if the majority of the five D bits are inverted, a negative stuffing action is to be carried out.

A stuffing action is performed only when the pointer STOPFDAT is equal to 1, ie, the current pointer value P _akt (PA, n) is not yet determined. If a stuffing action is to be carried out, it is checked whether the content of a stuffing counter SZ has the value 3. If the answer is affirmative, the question is asked whether there is an H2 byte. This is taken from the count (AUPO) of the AU pointer counter 11 . If there is an H2 byte, it is checked whether there is a positive stuffing action. If so, the current pointer value P _akt (PA, n) is set equal to 0 if it is equal to the 782nd Otherwise the current pointer value P _act (PA, n) is incremented (P _act (PA, n): = P _act (PA, n-1) +1). The current pointer value is checked for 782 because there are 783 data bytes in an administration unit AU-3 or per area in an administration unit AU-4. If there is a negative stuffing action, the current pointer value is decremented (P _act (PA, n): = P _act (PA, n-1) -1) if it is not equal to 0. Otherwise the current pointer value is set to 782. If there is no H2 byte, the current pointer value is adopted and the counter value of the stuffing counter SZ is set to the value 0. If the content of the stuffing counter SZ is not equal to 3, no stuffing action is carried out and the stuffing counter SZ is assigned the value 0. If no stuffing action is to be carried out, it is checked whether the content of the stuffing counter SZ has the value 3. If this is the case, the content of the stuffing counter SZ is not changed. In the other case, the stuffing counter SZ is incremented. This concludes the evaluation routine.

After the evaluation routine is executed in the state end of the main assembly 10 of the current pointer value P _akt (PA, n) and the new pointer value P (PA, n) and the stuffing is whether positive, negative or not filled, stored in the pointer memory .

The following part of the state flow of the main arrangement 10 determines whether there is an H3 or V3 byte and the location of the J1 byte. So there is no H1, H2, V1 or V2 byte. Then you are asked whether there is an H3 byte. This is determined from the counter reading (AUPO) of the AU pointer counter 11 . If there is an H3 byte, it is checked whether there is a negative justification point. If there is no negative darning point, the pointer DAT is set to 0 and the program jumps to the end. There is then no data in the H3 pointer and no J1 byte. In the other case, the pointer DAT is set to 1, ie there are user data bytes at the location of the H3 pointer. Then jump to mark 21 . If the existing data byte is not an H3 byte, a check is carried out to determine whether there is a stuffing point for an AU-3 or AU-4. In this case, the content of the AU pointer counter 11 has the numbers 9, 10 or 11. If there is no such darning point, jump to mark 21 . In the other case, if there is a positive justification point, the pointer DAT is set to 0, ie there are no user data bytes, and the program then jumps to the end.

Next comes the 21 mark. Next is then the pointer value P _akt (PA, n) for the TU-3, TU-2, TU-12 and TU-11 supplied and the stuffing information from the pointer memory to the write circuit. 4 A pointer value P _akt (PA, n) for AU-4 or AU-3 is not output to the write control circuit and remains in the pointer memory chert vomit.

Then it is determined whether the J1 byte is present. , It is checked whether the read out of the memory pointer AU pointer value P _akt (PA, n) the content (AUVC) of the AU Posi tion counter 12 is the same. If so, a J1 flag is given to write circuit 4 .

Finally, it is determined whether there is a V3 byte. Such a V3 byte is present when the write circuit 4 supplies the pointer identifier V3. The following checks to determine whether there are darning actions are only carried out if the STOPFDAT pointer is equal to 1. If the answer is affirmative, it is first checked whether there is a positive darning action. If this is the case, the system jumps to an identification routine 1 (Appendix B). In the identification routine 1, when a TU-3 is present, that is supplied by the write circuit 4 TU-ID is 4, the new current pointer value P _akt (PA, n) is incremented, if the previous pointer value P _akt (PA n, -1) is not equal to 764. If the up THE PREVIOUS pointer value 764, the new pointer value P _akt (PA, n) is set equal to the 0th When a TU-2 (TU identifier equal to 0) is present, the new pointer value P _akt (PA, n) not only incremented in the number 427th Then it is set to 0. If the TU identifier is 2 (TU-12), the new pointer value P _act (PA, n) is set to 0 if the previous pointer value P _act (PA, n-1) is 139 and is otherwise incremented. In the case of a TU-11 (TU identifier equal to 3), the new pointer value P _akt (PA, n) is set to 0 if the previous pointer value P _akt (PA, n-1) is 103 and is otherwise incremented. After execution of the identification routine 1, the current pointer value P _act (PA, n) is stored in the pointer memory.

If there is a negative darning action, the system jumps to an identification routine 2 (Appendix B). Identifier routine 2 first asks whether the TU identifier is 4, ie there is a TU-3. If this is the case, it is checked whether the current pointer value P _akt (PA, n-1) is 0. If this is affirmed, the new current pointer value P _akt (PA, n) is set equal to 764 and decrements in the other case. When a TU-2 (0 TU-ID the same) is present, the new pointer value P _akt (PA, n) is equal to 427 set when the previous pointer value P _akt (PA n-1) is equal to 0 and is decremented in the other case . If the TU identifier is 2 (TU-12), the new pointer value P _act (PA, n) is set to 139 if the previous pointer value P _act (PA, n-1) is 0 and decremented in the other case. When a TU-11 (TU-identifier 3 equal) is present, the new pointer value P _akt (PA, n) is decremented when the bisheri ge current pointer value P _akt (PA n-1) and equal to 0 in the other case, if the previous current pointer value P _act (PA, n-1) is 0, the new current pointer value P _act (PA, n) is set to 103. The end of the state sequence of the main arrangement 10 has thus been reached.

An increment or decrement of the pointer value tes in the identification routines 1 or 2 only take place, if the H3 pointer byte of a TU-3 or the V3 pointer byte a TU-2, TU-12 or TU-11 has occurred. if the Evaluation of the H1 or V1 and H2 or V2 pointer bytes results in a positive or negative darning action and the current pointer value after the H2 or V2 Pointer byte and occurs before the H3 or V3 pointer byte, is nevertheless only after the occurrence of the H3 or V3 Pointer bytes an increment or decrement of the current pointer value carried out. The negative or  positive darning point only occurs with the appearance of the H3 or V3 pointer byte influences the start of the TU transport unit concerned.

A second exemplary embodiment of the circuit arrangement according to the invention for controlling a buffer memory 13 for a readout process is shown schematically in FIG. 13. The buffer memory 13 is controlled by a transmission control arrangement 14 and receives a read command and a buffer memory address PS from the latter. The buffer memory 13 supplies the transmission control arrangement with the user data bytes stored at the buffer memory address PS and the pointer value J1D. Furthermore, the send control arrangement 14 also receives data from a management memory of the system management, and stuffing data from a stuffing decision circuit, not shown here, which is known, for example, from German patent application P 41 08 429. The read circuit then supplies output data to the subsequent circuit arrangement, not shown, which combines the output data with SOH data.

The transmission control arrangement 14 contains a transmission pointer circuit 15 and a reading circuit 16 . The reading circuit 16 supplies to the transmission pointer circuit 15 a pointer address PA a TU identifier, pointer identifiers V1, V2, V3, V3P and V4, the counter reading from an STM column counter and STM line counter and a position pointer TUPOS. The transmit pointer circuit 15 supplies the H1, H2, V1 and V2 bytes to the read circuit 16 . It also tells you when there is a positive or negative darning action and the pointer value.

In Fig. 14 is a block diagram of the read circuit 16 is shown, which includes a transmission counter arrangement 17 , a transmission addressing arrangement 18 , a transmission frame counter arrangement 19 and a read decision arrangement 20 . The transmission counter arrangement 17 is constructed similarly to the reception counter arrangement 6 . It contains three counter levels assigned to an area. Each counter stage contains a column counter AUS (B), a row counter AUZ (B), a counter TUG2 (B), a counter TU11 (B) and a counter TU12 (B). There are also four position counters TU3POS (B), TU2POS (B), TU12POS (B) and TU11POS (B) in each counter level. These counters have the same function as the counters in the receive counter arrangement 6 . On the basis of the different counter readings, the transmit counter arrangement 17 sets different pointer pointers (H1TU3 (B),..., VTU12 (B)) which indicate that the data byte present may be a pointer byte or a stuffing point. These pointers are delivered to the send addressing arrangement 18 . Furthermore, the send addressing arrangement 18 receives the counter readings of the position counters.

Of the buffer memory 13 of the transmitter 17 Zähleranord be voltage supplied to the data bytes and from a management storage system management receives the transmit data counter assembly 17, respectively. To the read decision arrangement 20 , the transmission counter arrangement 17 also supplies the TU pointers TU3D (B) and TUG2 (B).

In the transmit frame counter arrangement 19 there is an STM column counter STMS, an STM row counter STMZ, an area counter B and a position counter AUPOS. The counters are started by a start indicator from the system management that is delivered periodically. The STM column counter counts the columns of the STM-1 frame and the STM line counter counts the rows of the STM-1 frame. The area counter assigns one of three areas to each column and supplies its counter content as area identification B to the transmission counter arrangement 17 , the transmission address arrangement 18 and the read decision arrangement 20 . The position counter AUPOS counts in an STM-1 frame the positions in an AU user data area with the area identifier B = 0. The counter contents of the STM column counter and the STM row counter are still supplied to the transmission counter arrangement 17 . Furthermore, a pointer AUDAT is generated in the transmission frame counter arrangement 19 , which indicates the data bytes of the AU user data area. This pointer AUDAT is supplied to the transmission counter arrangement 17 and the read decision arrangement 20 . The Sen de frame counter arrangement 19 also indicates which of the four frames is present. For this purpose, it outputs the value H4 _akt (B, n), which is supplied to the send addressing arrangement 18 . Furthermore, the transmission frame counter arrangement 19 also outputs a pointer identifier H1, H2, H3 and H3P for the AU pointer bytes to the read decision arrangement 20 .

In the send addressing arrangement 18 the TU-Ken voltage, the pointer address PA, the buffer memory address PS, a pointer identifier V1, V2, V3, V3P and V4 and a position pointer TUPOS are formed. The position pointer TUPOS supplies the value of one of the position counters TU3POS (B), TU2POS (B), TU12POS (B) or TU11POS (B). A pointer identifier V1 to V4 indicates which pointer byte is present and whether there is a positive stuffing option.

The read decision assembly 20 , which receives data bytes and pointer J1D from the buffer memory 13 , H1, H2, V1 and V2 bytes and a notification of a stuffing action from the transmit pointer circuit 15 , generates a read error and output data bytes. To form the buffer memory address PS from the read decision arrangement 20 to the send addressing arrangement 18 , the counter was supplied by a read counter. Just as in the write decision arrangement 9 , a read counter VC4RC for a VC-4, a write counter VC3RC (B) for each VC-3 and a write counter LORC (PA) for a maximum of 84 low-bit containers are present in the read decision arrangement 20 . There is also an AU-3 column counter AU3S (B) that counts the columns of an AU-3.

The arrangements 17 to 20 can also be parts of an application-specific integrated circuit (ASIC) or processor elements, which are explained below using a status sequence.

First, the transmit frame counter arrangement is described using the state sequence listed in Appendix C. If there is a start indicator periodically supplied by the system management to the send frame counter arrangement, the counter reading of the STM column counter STMS, the STM row counter STMZ and the area counter B is set to 0. The position counter AUPOS is set to 521 (the value 521 represents the position of the last byte in the previous frame for the first area.). The pointer H4 _akt (B, n) is incremented. With the value 4, the pointer H4 _akt (B, n) is set to 0. If there is no start indicator, the STM column counter STMS is incremented up to the value 270. Then the STM column counter STMS is set to 0. If the STM column counter STMS is 0, the row counter STMZ is increased by one unit to the value 9. Then this column counter is set to 0. The area counter is also incremented if there is no start indicator. The range counter represents a modulo-3 counter, which is set from 3 to 0 for the counter content. With the counters described so far, a column and a line are marked in the STM-1 frame and the respective area is identified by an area identifier B.

Next, the pointer labels H1, H2, H3 and H3P formed which are the pointer bytes in the AU pointer mark. If the counter content of the STM line counter STMZ is 3, it is checked which column the data byte is heard. If the STM column counter STMS is 0, 1 or 2, the pointer identifier H1 is set to 1 and in the other case to 0 if the STM column counter STMS is 3, 4 or 5, the Pointer identification H2 is 1 and in the other case set to 0 if the STM column counter STMS is 1 6, 7 or 8, the pointer label H3 becomes 1 and otherwise set to 0 and if the STM Column counter STMS is 9, 10 or 11, there is one positive darning before and the pointer marking H3P is set to 1 and in the other case to 0. Finally, a pointer AUDAT is set to 1 if the STM column counter STMS is greater than 8. Otherwise the AUDAT pointer is assigned the value 0. The pointer AUDAT identifies the area for valid transmission data and closes the SOH of the STM-1 frame and the AU pointerbe rich enough. Then it is checked whether the pointer AUDAT is 1 and the area identifier B is 0. Is this if the answer is yes, the position counter AUPOS is incremented. At the value 783 increases the counter reading of the position counter 0 set.

The status or program flow of the transmission counter arrangement 17 is described below. After the start, you are asked whether the AUDAT pointer is equal to 1. If this is not the case, the system jumps back to the start. In the other case, it is checked whether the counter content of the STM column counter STMS is 9 and the counter content of the STM line counter STMZ is 3. If the answer is affirmative, the system jumps to the initialization routine that was described when the receive counter arrangement 6 (Appendix A) expired. The counters of the individual meter stages in the transmission counter arrangement 17 are thus initialized immediately after the occurrence of the AU pointer bytes. If the data byte is not present immediately after the AU pointer bytes, it is checked whether the area identifier B is 0. If this is the case, it is checked whether there is an AU-4. This information is obtained from the management store. If this is the case, the system jumps to counter routine 1 (Appendix A), which has also already been used in receive counter arrangement 6 . In the other case, the routine 2 (Appendix A) is jumped to, which was also described in the reception counter arrangement 6 . If the area identifier B is not equal to 0, the program jumps back to the start and the program sequence of the transmission counter arrangement 17 is ended. In the case of the transmission counter arrangement 17 , only one counting stage is required, since the individual areas within the STM-1 frame are not shifted relative to one another, ie counting is only carried out for the 1st area (area identifier B = 0).

Zuerst wird nach dem Start der Sende-TUG2-Adreß-Routine eine Zwischenadresse ZW gleich "BBTTT" gesetzt. Die beiden Buchstaben "B" stehen für den Bereich und die drei Buch­ staben "T" sind für den Inhalt des Zählers TUG2(B) reser­ viert. Wenn eine TU-2 vorliegt (aus Managementspeicher) wird die Pointeradresse PA gleich der Zwischenadresse und bei niederwertigen Bits, die gleich "0" gesetzt sind, zusammengefügt. Wenn keine TU-2 vorliegt, wird aus dem Managementspeicher entnommen, ob eine TU-12 vorkommt. Ist dies der Fall, wird als Pointeradresse PA ein Datenwort gebildet, welches als höherwertige Bits die Zwischenadres­ se ZW und als niederwertige Bits den Inhalt des Zählers TU12(B) enthält. Liegt keine TU-12 vor, liegt eine TU-11 vor. Die Pointeradresse PA wird dann aus der Zwischen­ adresse und dem Inhalt des Zählers TU11(B) zusammengefügt. Anschließend wird noch die Pufferspeicheradresse PS aus der Pointeradresse PA und dem Inhalt des Lesezählers LORC(PA) zusammengesetzt. Die Pointeradresse bildet dabei die höherwertigen Bits. Hiermit ist die Sende-TUG2-Adreß- Routine beendet.

Anschließend werden die in der Sende-Zähleranordnung 17 bestimmten Zeiger für Pointerpositionen den Pointerkenn­ zeichnungen V1, V2, V3, V3P und V4 und der Inhalt eines Positionszählers dem Positionszeiger TUPOS in der Sende- Adressierungsanordnung 18 zugewiesen. Als erstes wird mit Hilfe des Managementspeichers überprüft, ob eine TU-3 vorliegt. Ist dies der Fall, wird die TU-Kennung gleich 4 gesetzt und der Pointerkennzeichnung V1 der Pointerzeiger H1TU3(B) der Pointerkennzeichnung V2 der Pointerzeiger H2TU3(B) der Pointerkennzeichnung V3 der Pointerzeiger H3TU3(B), der Pointerkennzeichnung V3P der Pointerzeiger H3TU3P(B) und der Pointerkennzeichnung V4 der Wert 0 zu­ gewiesen. Dem Positionszeiger TUPOS wird noch der Zähler­ inhalt des Positionszählers TU3POS(B) zugewiesen.

Liegt keine TU-3 vor, wird gefragt, ob eine VC-3 in einer AU3 oder ein VC-4 in einer AU-4 vorliegt. Wird die Frage bejaht, werden die Pointerkennzeichnungen V1 gleich H1, V2 gleich H2, V3 gleich H3, V3P gleich H3P und V4 gleich 0 und der Positionszeiger TUPOS gleich dem Zählerstand des Positionszählers AUPOS gesetzt. Im anderen Fall wird über­ prüft, ob eine TU-11 vorhanden ist (aus dem Management­ speicher). Ist dies der Fall, wird die TU-Kennung gleich 3 gesetzt, ein Zeiger V gleich dem Pointerzeiger VTU11(B), ein Zeiger VP gleich dem Pointerzeiger VUT11P(B) und der Positionszeiger TUPOS gleich dem Inhalt des Positionszäh­ lers TU11POS(B) gesetzt. Liegt keine TU-11 vor, wird mit­ tels des Managementspeichers dann überprüft, ob eine TU-12 vorhanden ist. Ist dies der Fall, wird die TU-Kennung gleich 2, der Zeiger V gleich dem Pointerzeiger VTU12(B), der Zeiger VP gleich dem Pointerzeiger VTU12P(B) und der Positionszeiger TUPOS gleich dem Inhalt des Positionszäh­ lers TU12POS(B) gesetzt. Im anderen Fall wird die TU-Ken­ nung mit dem Wert 0, der Zeiger V mit dem Pointerzeiger VTU2(B), der Zeiger VP mit dem Pointerzeiger VTU2P(B) und der Positionszeiger mit dem Inhalt des Positionszählers TU2POS(B) belegt.

Im folgenden werden die Zeiger V und VP den Pointerkenn­ zeichnungen V1 bis V4 zugewiesen. Hierzu muß ermittelt werden, welcher Rahmen vorliegt. Wenn der erste Rahmen vorliegt (H4_akt(B, n) = 0), wird die Pointerkennzeichnung V1 gleich dem Zeiger V und die restlichen Pointerkenn­ zeichnungen gleich 0 gesetzt. Wenn der zweite Rahmen vor­ liegt (H4_akt(B, n) = 1), wird die Pointerkennzeichnung V2 gleich dem Zeiger V und die restlichen Pointerkenn­ zeichnungen gleich 0 gesetzt. Bei Vorliegen des dritten Rahmens (H4_akt(B, n) = 2) wird die Pointerkennzeichnung V3 gleich dem Zeiger V und die Pointerkennzeichnung V3P gleich dem Zeiger VP gesetzt. Die anderen Zeiger werden mit dem Wert 0 belegt. Liegt der vierte Rahmen vor, wird der Pointerkennzeichnung V4 der Zeiger V und den anderen Pointerkennzeichnungen der Wert 0 zugeordnet. Mit dieser letzten Instruktion ist der Zustandsablauf der Sende- Adressierungsanordnung 18 beendet.

Im folgenden wird der Zustandsablauf der Leseentschei­ dungsanordnung 20 (Anhang C) beschrieben. Hier wird der Lesebefehl zum Beschreiben des Pufferspeichers 13 und eine Erhöhung des Zählerstandes verschiedener Zähler vorgenom­ men. Nach dem Start wird aus dem Managementspeicher ent­ nommen, ob ein VC-4 in einer AU-4 vorliegt. Ist das der Fall, wird überprüft, ob die Bereichskennung B gleich 0 ist. Wird dies bejaht, wird als nächstes überprüft, ob die Pointerkennzeichnung H1 gleich 1 ist. Dann liegt nämlich das erste Byte des AU-Pointers vor. Ist die Pointerkenn­ zeichnung H1 gleich 1, wird als Ausgangsdatenbyte das H1- Byte, welches von der Sende-Pointerschaltung 15 geliefert wird, verwendet. Ist die Pointerkennzeichnung H1 nicht gleich 1, wird überprüft, ob die Pointerkennzeichnung H2 gleich 1 ist. In diesem Fall wird das von der Sende-Poin­ terschaltung 15 gelieferte H2-Byte als Ausgangsdatenbyte verwendet. Wenn auch die Pointerkennzeichnung H2 ungleich 1 ist, wird ein Lesebefehl für jeweils drei Datenbytes erzeugt, wenn a) der Zeiger AUDAT gleich 1 ist und keine positive Stopfaktion vorliegt oder b) eine negative Stopf­ aktion vorliegt.

Wenn die Bereichskennung B ungleich 0 ist, wird zuerst abgefragt, ob die Pointerkennzeichnung H1 gleich 1 ist. Ist dies der Fall, werden die Ausgangsdaten mit Festwerten (Y-Bytes) belegt (vergl. Fig. 3.1/G709). Ist die Pointer­ kennzeichnung H1 ungleich 1, wird überprüft, ob die Poin­ terkennzeichnung H2 gleich 1 ist. Ist dies der Fall, wer­ den die Ausgangsdaten mit weiteren Festwerten, d. h. alle Bits werden gleich 1 gesetzt, belegt (vergl. Fig. 3. 1/G709).

Als nächstes wird dann abgefragt, ob der Lesebefehl vor­ liegt. Wird dies bejaht, wird überprüft, ob der Zeiger J1D, der vom Pufferspeicher 13 geliefert wird, gleich 1 ist. Wird dies ebenfalls bejaht, wird, wenn der erste Bereich vorliegt, d. h. die Bereichskennung B gleich 0 ist, der Zählerinhalt des Lesezählers VC4RC inkrementiert. Bei dem Zählerinhalt 64 wird der Lesezähler VC4RC gleich 0 gesetzt. Wenn der zweite Bereich vorliegt, d. h. die Be­ reichskennung B gleich 1 ist, wird der Lesezähler um zwei Einheiten erhöht. Dies kann nach dem Einschalten der Schaltungsanordnung passieren, wenn der Zeiger J1D dem 2. Bereich zugeordnet ist. In dem anderen Fall, wenn der Zeiger J1D dem 3. Bereich (Bereichskennung B = 2) zugeordnet ist, wird keine Erhöhung des Lesezählers vorgenommen. Durch Nichtzählen wird nämlich auf den ersten Bereich korrigiert. Wenn der Zeiger J1D ungleich 1 ist, wird der Modulo-64-Lesezähler VC4RC inkrementiert. Als Ausgangs­ daten werden dann die Pufferspeicherdaten geliefert.

Als nächstes wird überprüft, ob ein VC-3 eines Bereiches in einer AU-3 vorkommt. Diese Information wird ebenfalls vom Managementspeicher des Systemmanagements geliefert.

Falls der VC-3 in einer AU-3 vorliegt, wird überprüft, ob die Pointerkennzeichnung H1 gleich 1 ist. Ist dies der Fall, wird als Ausgangsdatenbyte das von der Sende-Poin­ terschaltung gelieferte H1-Byte genommen. Im anderen Fall wird überprüft, ob die Pointerkennzeichnung H2 gleich 1 ist. Wenn das bejaht wird, wird als Ausgangsdatenbyte das H2-Byte von der Sende-Pointerschaltung 15 verwendet. Ist die Pointerkennzeichnung H2 ungleich 1, wird zu einer Hilfsroutine (Anhang C) gesprungen.

Hier wird zuerst überprüft (Hilfsroutine), ob a) der Zei­ ger AUDAT gleich 1 ist und ob keine positive Stopfaktion vorliegt oder b) eine negative Stopfaktion vorliegt. Bei einer Bejahung wird ein AU-3-Spaltenzähler AU3S(B) inkre­ mentiert. Bei einem Zählerstand von 87 des AU-3-Spalten­ zählers AU3S(B) wird dieser gleich 0 gesetzt. Dieser AU-3- Spaltenzähler AU3S(B) kennzeichnet eine Spalte in einer AU-3 (vergl. hierzu Fig. 2.3/G709). Zur Feststellung, ob feste Stopfstellen vorliegen, wird überprüft, ob der AU3- Spaltenzähler AU3S(B) gleich 29 oder gleich 58 ist. Ist das nicht der Fall, wird ein Lesebefehl erzeugt und der Lesezähler VC3RC(B) wird inkrementiert. Bei dem Wert 32 wird der Lesezähler VC3RC(B) gleich 0 gesetzt. Dann wird das Datenbyte des Pufferspeichers 13 als Ausgangsdatenbyte verwendet. Zum Schluß der Hilfsroutine wird überprüft, ob der Zeiger J1D gleich 1 ist. Ist dies der Fall, wird der AU-3-Spaltenzähler AU3S(B) gleich 0 gesetzt (Initiali­ sierung). Damit ist die Hilfsroutine beendet.

Als nächstes wird im Zustandsablauf der Leseentscheidungs­ anordnung 20 mit Hilfe des Managementspeichers überprüft, ob eine TU-3 vorliegt. Ist das der Fall, wird gefragt, ob a) der Zeiger AUDAT gleich 1 und b) der Zeiger TU3D(B) gleich 1 und keine positive Stopfaktion vorliegt oder c) eine negative Stopfaktion vorliegt. Ist dies der Fall, wird ein Lesebefehl erzeugt und der Lesezähler VC3RC(B) wird um eine Einheit erhöht. Bei einem Zählerstand von 32 wird dieser Lesezähler VC3RC(B) gleich 0 gesetzt. Dann wird noch das aus dem Pufferspeicher 13 ausgelesene Daten­ byte als Ausgangsdatenbyte ausgegeben. Wenn keine TU-3 vorliegt, wird überprüft, ob a) der Zeiger AUDAT gleich 1 und b) der Zeiger TUG2D(B) gleich 1 und c) die Pointer­ kennzeichnung V1 gleich 0 gesetzt ist und d) die Pointer­ kennzeichnung V2 gleich 0 gesetzt ist und e) die Pointer­ kennzeichnung V3 gleich 0 gesetzt ist oder eine negative Stopfaktion vorliegt und f) die Pointerkennzeichnung V3P gleich 0 gesetzt ist oder keine positive Stopfaktion vor­ liegt und g) die Pointerkennzeichnung V4 gleich 0 gesetzt ist. Ist diese Bedingung erfüllt, wird ein Lesebefehl erzeugt und ein Lesezähler LORC(PA) inkrementiert, der dem ausgelesenen Datenbyte zugeordnet ist. Ferner wird das Datenbyte als Ausgangsdatenbyte ausgegeben. Ein Lesezähler LORC(PA) ist ein Modulo-12-Zähler. Damit ist der Zustands­ ablauf der Leseentscheidungsanordnung 20 beendet.

Zum Schluß wird der Zustandsablauf der Sende-Pointerschal­ tung 15 (Anhang D) beschrieben, die einen Adreßzwischen­ speicher und einen Pointerspeicher enthält. Nach dem Start wird die von der Leseschaltung 16 gelieferte Pointeradres­ se PA in dem Adreßzwischenspeicher abgespeichert. Dann wird überprüft, ob eine Pointerkennzeichnung H1 oder V1 gleich 1 ist. Ist das der Fall, wird zu einer H1V1-Routine gesprungen. Ist das nicht der Fall, wird überprüft, ob die Pointerkennzeichnung H2 oder V2 gleich 1 ist. Wird dies bejaht, wird zu einer H2V2-Routine gesprungen. Bei einer Verneinung wird dann geprüft, ob die Pointerkennzeichnung H3 oder V3 gleich 1 ist. Ist dies der Fall, wird zu einer H3V3-Routine gesprungen. Ist die Pointerkennzeichnung H3 oder V3 nicht gleich 1, wird abgefragt, ob der Zeiger J1D gleich 1 ist, d. h. ob ein J1- oder V5-Byte dem entspre­ chenden Datenbyte aus dem Pufferspeicher 13 zugeordnet ist. Ist das nicht der Fall wird zum Ende des Programm- bzw. Zustandsablauf der Sende-Pointerschaltung 15 gesprun­ gen. Im anderen Fall wird der Wert des Positionszeigers TUPOS als Pointerwert P_akt(PA, n) im Pointerspeicher gespei­ chert. Damit ist der Zustandsablauf der Sende-Pointer­ schaltung 15 beendet.

Im folgenden wird die H1V1-Routine (Anhang D) beschrieben. Nach dem Start wird zuerst überprüft, ob gestopft werden soll. Diese Information wird von der hier nicht näher dargestellten Stopfentscheidungsschaltung geliefert. Wird das verneint, wird ein H1- oder V1-Byte mit dem Pointer­ wert gebildet und zum Ende der H1V1-Routine gesprungen. Im anderen Fall, wenn gestopft werden soll, wird die Stopf­ information im Pointerspeicher gespeichert und überprüft, ob positiv gestopft werden soll. Dann wird ein H1- oder V1-Byte mit dem Pointerwert mit einem invertierten I-Bit gebildet und zum Ende der Routine gesprungen. Wenn negativ gestopft werden soll, wird das H1- oder V1-Byte mit dem Pointerwert mit einem invertierten D-Bit gebildet.

In der H2V2-Routine (Anhang D) wird die Bildung eines H2- oder V2-Bytes beschrieben. Nach dem Start wird überprüft, ob gestopft werden soll. Ist das nicht der Fall, wird das H2- oder V2-Byte aus dem Pointerwert gebildet. Im anderen Fall wird bei einer positiven Stopfung das H2- oder V2- Byte aus dem Pointerwert mit invertierten I-Bits gebildet. Bei einer negativen Stopfung wird das H2- oder V2-Byte aus dem Pointerwert mit invertierten D-Bits gebildet. Damit ist die H2V2-Routine beendet.

Nach dem Start der H3V3-Routine (Anhang D) wird zuerst überprüft, ob die Pointerkennzeichnung H3 gleich 1 ist. Wenn das der Fall ist, wird überprüft, ob gestopft werden soll. Wenn gestopft werden soll, wird gefragt, ob positiv gestopft werden soll. Bei einer Bejahung, wird überprüft, ob der Pointerwert P_akt(PA, n-1) gleich 782 ist. Ist dies der Fall, wird der Pointerwert P_akt(PA, n) gleich 0 gesetzt. Im anderen Fall wird der Pointerwert inkrementiert (P_akt(PA, n): = P_akt(PA, n-1)+1). Bei einer negativen Stopfung wird gefragt, ob der Pointerwert P_akt(PA, n-1) gleich 0 ist. Ist dies der Fall, wird der Pointerwert P_akt(PA, n) gleich 782 gesetzt. Im anderen Fall wird der Pointerwert dekre­ mentiert (P_akt(PA, n): = P_akt(PA, n-1)-1). Wenn die Pointerkenn­ zeichnung H3 ungleich 1 ist, liegt die Stelle für das V3- Byte vor. Wenn gestopft werden soll, wird bei einer posi­ tiven Stopfaktion zur Kennungsroutine 1 (Anhang B) und bei einer negativen Stopfaktion zur Kennungsroutine 2 (An­ hang B) gesprungen. Diese beiden Kennungsroutinen 1 und 2 sind schon jeweils bei der Erläuterung der Empfangs-Poin­ terschaltung 5 beschrieben worden. Zum Schluß wird der aktuelle Pointerwert P_akt(PA, n) im Pointerspeicher gespei­ chert. Damit ist die H3V3-Routine beendet. Anhang A Empfangs-Zähleranordnung 6

Start:
DAT = 1?
nein: zurück zum Start
ja: Liegt J1-Kennzeichnung vor?
ja: Liegt Verwaltungseinheit AU-4 vor?
ja: Setze Bereich B: = 0, 1, 2:
Sprung zur Initialisierungsroutine
nein: Sprung zur Initialisierungsroutine
nein: Liegt Verwaltungseinheit AU-4 vor?
ja: Sprung zur Zählerroutine 1
nein: Sprung zur Zählerroutine 2
Ende: Initialisierungsroutine

Start:
Spaltenzähler AUS(B): = 0
Zeilenzähler AUZ(B) = 0
Zähler TUG2(B): = 6
Zähler TU11(B): = 3
Zähler TU12(B): = 2
Positionszähler TU3POS(B) = 594
H4_akt(B, n) = 0?
ja: Positionszähler TU2POS(B): = 320
Positionszähler TU12POS(B): = 104
Positionszähler TU11POS(B) = 77
Ende: Zählerroutine 1

Start:
Spaltenzähler AUS (B) = 86?
ja: Spaltenzähler AUS(B): = 0
Zeilenzähler AUZ(B): = AUZ(B)+1 MOD 9
nein: Spaltenzähler AUS(B): = AUS(B)+1
Spaltenzähler AUS(B)<1?
nein: TU-Zeiger TU3D(B): = 0
ja: TU-Zeiger TU3D(B): = 1
Positionszähler TU3POS(B): = TU3POS(B)+1 MOD 765
Spaltenzähler AUS(B) = 1?
nein: Pointerzeiger H1TU3(B), H2TU3(B), H3TU3(B): = 0
Spaltenzähler AUS(B) = 2 und Zeilenzähler AUZ(B) = 2?
nein: Pointerzeiger H3TU3P(B): = 0
ja: Pointerzeiger H3TU3P(B): = 1
ja: Zeilenzähler AUZ(B) = 0?
ja: Pointerzeiger H1TU3(B): = 1
nein: Zeilenzähler AUZ(B) = 1?
ja: Pointerzeiger H2TU3(B): = 1
nein: Zeilenzähler AUZ(B) = 2?
ja: Pointerzeiger H3TU3(B): = 1
Spaltenzähler AUS(B)<2?
nein: TU-Zeiger TUG2D(B): = 0
ja: TU-Zeiger TUG2D(B): = 1
Zähler TUG2(B) = 6?
nein: Zähler TUG2(B): = TUG2(B)+1
ja: Zähler TUG2(B): = 0
Spaltenzähler AUS(B)<10 und Zeilenzähler AUZ(B) = 0?
ja: Pointerzeiger VTU2(B): = 1
nein: Pointerzeiger VTU2(B): = 0
Positionszähler
TU2POS(B): = TU2POS(B)+1 MOD 428
Spaltenzähler AUS(B)<17 und Zeilenzähler AUZ(B) = 0?
nein: Pointerzeiger VTU2P(B): = 0
ja: Pointerzeiger VTU2P(B): = 1
Spaltenzähler AUS(B)<2 und Zähler TUG2(B) = 0?
nein: Sprung zur Marke 11
ja: Zähler TU11(B) = 3?
nein: Zähler TU11(B): = TU11(B)+1
ja: Zähler TU11(B): = 0
Spaltenzähler AUS(B)<31 und Zeilenzähler AUZ(B) = 0?
ja: Pointerzeiger VTU11(B): = 1
nein: Pointerzeiger VTU11(B): = 0
Positionszähler
TU11POS(B): = TU11POS(B)+1 MOD 104
Spaltenzähler AUS(B)<59 und Zeilenzähler AUZ(B) = 0?
ja: Pointerzeiger VTU11P(B): = 1
nein: Pointerzeiger VTU11P(B): = 0
Marke 11:
Spaltenzähler AUS(B)<2 und Zähler TUG2(B) = 0?
ja: Zähler TU12(B) = 2?
nein: Zähler TU12(B): = TU12(B)+1
ja: Zähler TU12(B): = 0
Spaltenzähler AUS(B)<24 und Zeilenzähler AUZ(B) = 0?
ja: Pointerzeiger VTU12(B): = 1
nein: Pointerzeiger VTU12(B): = 0
Positionszähler
TU12POS(B): = TU12POS(B)+1 MOD 140
Spaltenzähler AUS(B)<45 und Zeilenzähler AUZ(B) = 0?
ja: Pointerzeiger VTU12P(B): = 1
nein: Pointerzeiger VTU12P(B): = 0
Ende: Zählerroutine 2

Start:
Spaltenzähler AUS (B) = 86?
ja: Spaltenzähler AUS(B): = 0
Zeilenzähler AUZ(B): = AUZ(B)+1 MOD 9
nein: Spaltenzähler AUS(B): = AUS(B)+1
Spaltenzähler AUS(B) = 0 oder AUS(B) = 29 oder AUS(B) = 58?
ja: TU-Zeiger TUG2D(B): = 0
nein: TU-Zeiger TUG2D(B): = 1
Zähler TUG2(B) = 6?
nein: Zähler TUG2(B): = TUG2(B)+1
ja: Zähler TUG2(B): = 0
Spaltenzähler AUS(B)<7?
nein: Pointerzeiger VTU2(B): = 1
ja: Pointerzeiger VTU2(B): = 0
Positionszähler
TU2POS(B): = TU2POS(B)+1 MOD 428
Spaltenzähler AUS(B)<14?
nein: Pointerzeiger VTU2P(B): = 1
ja: Pointerzeiger VTU2P(B): = 0
Zähler TUG2(B) = 0?
nein: Sprung zur Marke 12
ja: Zähler TU11(B) = 3?
nein: Zähler TU11(B): = TU11(B)+1
ja: Zähler TU11(B): = 0
Spaltenzähler AUS(B)<28?
nein: Pointerzeiger VTU11(B): = 1
ja: Pointerzeiger VTU11(B): = 0
Positionszähler
TU11POS(B): = TU11POS(B)+1 MOD 104
Spaltenzähler AUS(B) <57?
ja: Pointerzeiger VTU11P(B): = 0
nein: Pointerzeiger VTU11P(B): = 1
Marke 12:
Zähler TUG2(B) = 0?
ja: Zähler TU12(B) = 2?
nein: Zähler TU12(B): = TU12(B)+1
ja: Zähler TU12(B): = 0
Spaltenzähler AUS(B)<21?
nein: Pointerzeiger VTU12(B): = 1
ja: Pointerzeiger VTU12(B): = 0
Positionszähler
TU12POS(B): = TU12POS(B)+1 MOD 140
Spaltenzähler AUS(B)<43?
ja: Pointerzeiger VTU12P(B): = 1
nein: Pointerzeiger VTU12P(B): = 0
Ende: Empfangs-Adressierungsanordnung 7

Start:
TU-Kennung: = 0
Liegt eine VC-4 vor?
ja: Pufferspeicheradresse PS: = Schreibzähler VC4SC Pointeradresse PA: = "00111BB"
nein: Liegt eine VC-3 in einer AU-3 vor?
ja: Pufferspeicheradresse PS: = Schreibzähler VC3SC(B)
Pointeradresse PA: = "00111BB"
nein: Liegt eine VC-3 in einer AU-4 vor?
ja: Pufferspeicheradresse PS: = Schreibzähler VC3SC(B)
Pointeradresse PA: = "BB00000"
nein: Gehe zur TUG-2-Adreß-Routine
Liegt TU-3 vor?
ja: TU-Kennung: = 4
Pointerkennzeichnung V1: = H1TU3 (B), V2: = H2TU3 (B), V3: = H3TU3(B), V3P: = H3TU3P(B), V4: = 0 und Positions­ zeiger TUPOS: = TU3POS (B)
nein: Liegt VC-3 in AU-3 oder VC-4 in AU-4 vor?
ja: Pointerkennzeichnung V1: = 0, V2: = 0, V3: = 0, V3P: = 0, V4: = 0
nein: Liegt TU-11 vor?
ja: TU-Kennung: = 3
Zeiger V: = VTU11(B), VP: = VTU11P(B), TUPOS: = TU11POS(B)
nein: Liegt TU-12 vor?
ja: TU-Kennung: = 2
Zeiger V: = VTU12(B), VP: = VTU12P(B), TUPOS: = TU12POS(B)
nein: TU-Kennung: = 0
Zeiger V: = VTU2(B), VP: = VTU2P(B), TUPOS: = TU2POS(B)
H4_akt(B, n) = 0?
ja: Pointerkennzeichnung V1: = V, V2: = 0, V3: = 0, V3P: = 0, V4: = 0
nein: H4_akt(B, n) = 1?
ja: Pointerkennzeichnung V1: = 0, V2: = V, V3: = 0, V3P: = 0, V4: = 0
nein: H4_akt(B, n) = 2?
ja: Pointerkennzeichnung V1: = 0, V2: = 0, V3: = V, V3P: = VP, V4: = 0
nein: Pointerkennzeichnung V1: = 0, V2: = 0, V3: = 0, V3P: = 0, V4: = V
Ende: Empfangs-TUG2-Adreß-Routine

Start:
Zwischenadresse ZW: = "BBTTT"
Liegt TU-2 vor?
ja: Pointeradresse PA: = ZW/"00"
nein: Liegt TU-12 vor?
ja: Pointeradresse PA: = ZW/TU12(B)
nein: Pointeradresse PA: = ZW/TU11(B)
Pufferspeicheradresse PS: = PA/Schreibzähler LOSC(PA)
Ende: Schreibentscheidungsanordnung 9

Start:
Liegt AU-4 mit VC-4 vor?
ja: Liegt J1-Kennzeichnung vor?
ja: Zeiger J1D: = 1
nein: Zeiger J1D: = 0
DAT = 1?
ja: Erzeugung des Schreibbefehls
nein: Liegt AU-3 mit VC-3 eines Bereiches vor?
ja: Liegt J1-Kennzeichnung vor?
ja: Zeiger J1D: = 1
nein: Zeiger J1D: = 0
Ist DAT = 1 und Spaltenzähler AUS(B) ≠29 und ≠58?
ja: Erzeugung des Schreibbefehls
nein: Ist TUPOS = Pointerwert?
ja: Zeiger J1D: = 1
nein: Zeiger J1D: = 0
Liegt TU-3 vor?
ja: a) Ist DAT = 1 und
b) ist TU3D(B) = 1 gesetzt und
c) liegt keine positive Stopfaktion vor oder
d) liegt eine negative Stopfaktion vor?
ja: Erzeugung des Schreibbefehls
nein: a) Ist DAT = 1 und
b) ist TUG2D(B) = 1 gesetzt und
c) ist V1 = 0 gesetzt und
d) ist V2 = 0 gesetzt und
e) ist V3 = 0 gesetzt oder liegt eine ne­ gative Stopfaktion vor und
f) ist V3P = 0 gesetzt oder liegt keine positive Stopfaktion vor und
g) ist V4 = 0 gesetzt?
ja: Erzeugung des Schreibbefehls
Liegt Schreibbefehl vor?
ja: Schreibzähler VC4SC: = VC4SC+1 MOD 64
Schreibzähler VC3SC(B): = VC3SC(B)+1 MOD 32
Schreibzähler LOSC(PA): = LOSC(PA)+1 MOD 12
Datenbyte und Zeiger J1D in Pufferspeicher
Ende: H4-Anordnung 8

Start:
Spaltenzähler AUS(B) = 0 und Zeilenzähler AUZ(B) = 5 und DAT = 1?
ja: Liegt AU-4 vor?
ja: Setze B: = 0, 1, 2:
Ermittlung des H4-Wertes aus den beiden niederwer­ tigsten Bits des H4-Bytes;
Speicherung des H4-Wertes in H4-Speicher;
Ist der neu empfangene H4-Wert H4_neu(B, n) gleich dem aktuellen H4-Wert H4_akt(B, n-1)+1?
ja: H4_akt(B, n): = H4_neu(B, n)
nein: Bildet der neu empfangene H4-Wert H4_neu(B, n) zusammen mit den davor empfangenen vier letz­ ten H4-Werten H4_neu(B, n-i), i = 1, . . . , 4, eine Sequenz?
ja: H4_akt(B, n): = H4_neu(B, n)
nein: H4_akt(B, n): = H4_akt(B, n-1)+1
Ende: Anhang B Empfangs-Pointerschaltung 5 AU-Pointerzähler 11

Start:
Liegt AU-Pointer-Kennung vor?
ja: AU-Pointerzähler AUPO: = 0
nein: AU-Pointerzähler AUPO = 12?
nein: AU-Pointerzähler AUPO: = AUPO+1
ja: keine Veränderung des Inhaltes des AU-Pointerzählers AUPO
Ende: AU-Positionszähler 12

Start:
Liegt ein Sperrsignal vor?
nein: DAT: = 1
Liegt erster Bereich vor (B = 0)?
ja: AU-Positionszähler AUVC: = AUVC+1
nein: Keine Änderung des Inhaltes des AU-Positions­ zählers AUVC
ja: DAT: = 0
Liegt die erste positive Stopfstelle vor?
ja: AU-Positionszähler AUVC: = 0
nein: Keine Änderung des Inhaltes des AU-Positions­ zählers AUVC
Ende: Hauptanordnung 10

Start:
Abspeicherung der Pointeradresse PA in einem Adreßzwischenspeicher;
Liegt ein H1-, H2-, V1- oder V2-Byte vor?
ja: Liegt H1- oder V1-Byte vor?
ja: Zwischenspeicherung des H1- oder V1-Bytes im H1V1-Speicher;
nein: Sprung zur Auswerteroutine
Speichere den aktuellen Pointerwert P_akt(PA, n) und den neuen Pointerwert P(PA, n) und Stopf­ information im Pointerspeicher;
nein: Liegt H3-Byte vor?
ja: Liegt eine negative Stopfstelle vor?
nein: DAT: = 0
Sprung zum Ende
ja: DAT: = 1
Sprung zur Marke 21
nein: Liegt eine Stopfstelle für Verwaltungseinheit AU-3 oder AU-4 vor?
nein: Sprung zur Marke 21
ja: Liegt positive Stopfstelle vor?
ja: DAT: = 0
Sprung zum Ende
Marke 21:
Ausgabe vom Pointerwert P_akt(PA, n) für TU-3, TU-2, TU-12, TU-11 und Stopfinformation aus Pointerspei­ cher an Schreibschaltung 4;
Ist der aus dem Pointerspeicher ausgelesene Pointer­ wert P_akt(PA, n) für AU-4, AU-3 gleich dem Inhalt des Positionszählers AUVC?
ja: Ausgabe der J1-Kennzeichnung
Liegt V3-Byte vor und STOPFDAT = 1?
ja: Liegt positive Stopfaktion vor?
ja: Sprung zur Kennungsroutine 1
Speicherung des aktuellen Pointerwertes P_akt(PA, n) in Pointerspeicher;
nein: Liegt negative Stopfaktion vor?
nein: Sprung zum Ende
ja: Sprung zur Kennungsroutine 2
Speicherung des aktuellen Pointer­ wertes P_akt(PA, n) in Pointer­ speicher;
Ende: Auswerteroutine

Start:
Eingabe des H1- oder V1-Bytes aus H1V1-Speicher, des neu empfangenen H2- oder V2-Bytes, des zuletzt empfangenen Pointerwertes P(PA, n-1) und des aktuellen Pointerwertes P_akt(PA, n-1) aus Pointerspeicher;
Pointerzähler PZ: = PZ+1;
STOPFDAT: = 1
Ist der neu empfangene Pointerwert P(PA, n) gleich dem zu­ letzt empfangenen Pointerwert P(PA, n-1)?
ja: Ist der aktuelle Pointerwert P_akt(PA, n-1) gleich dem neuen Pointerwert P(PA, n)?
ja: Pointerzähler PZ: = 0
nein: STOPFDAT: = 0
Pointerzähler PZ = 3?
nein: P_akt(PA, n): = P_akt(PA, n-1)
ja: P_akt(PA, n): = P(PA, n)
nein: Pointerzähler PZ: = 1
Soll eine Stopfaktion durchgeführt werden und STOPFDAT = 1?
ja: Stopfzähler SZ: = 3?
ja: Liegt H2-Byte vor?
ja: Liegt positive Stopfaktion vor?
ja: Pointerwert P_akt(PA, n-1) = 782?
ja: P_akt(PA, n): = 0
nein: P_akt(PA, n): = P_akt(PA, n-1)+1
nein: Liegt negative Stopfaktion vor?
ja: Pointerwert P_akt(PA, n-1) = 0?
ja: P_akt(PA, n): = 782
nein: P_akt(PA, n): = P_akt(PA, n-1)-1
nein: P_akt(PA, n) = P_akt(PA, n-1)
Stopfzähler SZ: = 0
nein: keine Stopfaktion durchführen
Stopfzähler SZ: = 0
nein: Stopfzähler SZ = 3?
ja: Stopfzähler SZ: = SZ
nein: Stopfzähler SZ: = SZ+1
Ende: Kennungsroutine 1

Start:
TU-Kennung = 4?
ja: Pointerwert P_akt(PA, n-1) = 764?
ja: Pointerwert P_akt(PA, n): = 0
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)+1
TU-Kennung = 0?
ja: Pointerwert P_akt(PA, n-1) = 427?
ja: Pointerwert P_akt(PA, n): = 0
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)+1
TU-Kennung = 2?
ja: Pointerwert P_akt(PA, n-1) = 139?
ja: Pointerwert P_akt(PA, n): = 0
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)+1
TU-Kennung = 3?
ja: Pointerwert P_akt(PA, n-1) = 103?
ja: Pointerwert P_akt(PA, n): = 0
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)+1
Ende: Kennungsroutine 2

Start:
TU-Kennung = 4?
ja: Pointerwert P_akt(PA, n-1) = 0?
ja: Pointerwert P_akt(PA, n): = 764
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)+1
TU-Kennung = 0?
ja: Pointerwert P_akt(PA, n-1) = 0?
ja: Pointerwert P_akt(PA, n): = 427
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)-1
TU-Kennung = 2?
ja: Pointerwert P_akt(PA, n-1) = 0?
ja: Pointerwert P_akt(PA, n): = 139
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)-1
TU-Kennung = 3?
ja: Pointerwert P_akt(PA, n-1) = 0?
ja: Pointerwert P_akt(PA, n): = 103
nein: Pointerwert P_akt(PA, n): = P_akt(PA, n-1)-1 Anhang C Sende-Rahmenzähleranordnung 19

Start:
Liegt Start-Kennzeichen vor?
ja: STM-Spaltenzähler STMS: = 0
STM-Zeilenzähler STMZ: = 0
Bereichszähler B: = 0
Positionszähler AUPOS: = 521
H4_akt(B, n): = H4_akt(B, n-1)+1 MOD 4
nein: STM-Spaltenzähler STMS: = STMS+1 MOD 270
STM-Spaltenzähler STMS = 0?
ja: STM-Zeilenzähler STMZ: = STMZ+1 MOD 9
Bereichszähler B: = B+1 MOD 3
STM-Zeilenzähler STMZ = 3?
ja: STM-Spaltenzähler STMS = 0, 1 oder 2?
ja: Pointerkennzeichnung H1: = 1
nein: Pointerkennzeichnung H1: = 0
STM-Spaltenzähler STMS = 3, 4 oder 5?
ja: Pointerkennzeichnung H2: = 1
nein: Pointerkennzeichnung H2: = 0
STM-Spaltenzähler STMS = 6, 7 oder 8?
ja: Pointerkennzeichnung H3: = 1
nein: Pointerkennzeichnung H3: = 0
STM-Spaltenzähler STMS = 9, 10 oder 11?
ja: Pointerkennzeichnung H3P: = 1
nein: Pointerkennzeichnung H3P: = 0
STM-Spaltenzähler STMS < 8?
ja: Zeiger AUDAT: = 1
nein: Zeiger AUDAT: = 0
AUDAT = 1 und Bereichszähler B = 0?
ja: Positionszähler AUPOS: = AUPOS+1 MOD 783
Ende: Sende-Zähleranordnung 17

Start:
AUDAT = 1?
nein: zurück zum Start
ja: STM-Spaltenzähler STMS = 9 und STM-Zeilenzäh­ ler STMZ = 3?
ja: Sprung zur Initialisierungsroutine
nein: Bereichszähler B = 0 vor?
ja: Liegt Verwaltungseinheit AU-4 vor?
ja: Sprung zur Zählerroutine 1
nein: Sprung zur Zählerroutine 2
nein: zurück zum Start;
Ende: Sende-Adressierungsanordnung 18

Start:
TU-Kennung: = 0
Liegt ein VC-4 vor?
ja: Pufferspeicheradresse PS: = Lesezähler VC4RC
Pointeradresse PA: = "00111BB"
nein: Liegt eine VC-3 in einer AU-3 vor?
ja: Pufferspeicheradresse PS: = Lesezähler VC3RC(B)
Pointeradresse PA: = "00111BB"
nein: Liegt eine VC-3 in einer AU-4 vor?
ja: Pufferspeicheradresse PS: = Lesezähler VC3RC(B)
Pointeradresse PA = "BB00000"
nein: Gehe zur Sende-TUG-2-Adreß-Routine
Liegt TU-3 vor?
ja: TU-Kennung: = 4
Pointerkennzeichnung V1: = H1TU3 (B), V2: = H2TU3 (B), V3: = H3TU3(B), V3P: = H3TU3P(B), V4: = 0
und Positionszeiger TUPOS: = TU3POS (B)
nein: Liegt VC-3 in AU-3 oder VC-4 in AU-4 vor?
ja: Pointerkennzeichnung V1: = H1, V2: = H2, V3: = H3, V3P: = H3P, V4: = 0 und TUPOS: = AUPOS
nein: Liegt TU-11 vor?
ja: TU-Kennung: = 3
Zeiger V: = VTU11(B), VP: = VTU11P(B), TUPOS: = TU11POS (B)
nein: Liegt TU-12 vor?
ja: TU-Kennung: = 2
Zeiger V: = VTU12(B), VP: = VTU12P(B), TUPOS: = TU12POS ( B)
nein: TU-Kennung: = 0
Zeiger V: = VTU2(B), VP: = VTU2P(B), TUPOS: = TU2POS(B)
H4_akt(B, n) = 0?
ja: Pointerkennzeichnung V1: = V, V2: = 0, V3: = 0, V3P: = O, V4: = 0
nein: H4_akt(B, n) = 1?
ja: Pointerkennzeichnung V1: = 0, V2: = V, V3: = 0, V3P: = 0, V4: = 0
nein: H4_akt(B, n) = 2?
ja: Pointerkennzeichnung V1: = 0, V2: = 0, V3: = V, V3P: = VP, V4: = 0
nein: Pointerkennzeichnung V1: = 0, V2: = 0, V3: = 0, V3P: = 0, V4: = V
Ende: Sende-TUG2-Adreß-Routine

Start:
Zwischenadresse ZW: = "BBTTT"
Liegt TU-2 vor?
ja: Pointeradresse PA: = ZW/"00"
nein: Liegt TU-12 vor?
ja: Pointeradresse PA: = ZW/TU12(B)
nein: Pointeradresse PA: = ZW/TU11(B)
Pufferspeicheradresse PS: = PA/Lesezähler LORC(PA)
Ende: Leseentscheidungsanordnung 20

Start:
Liegt AU-4 mit VC-4 vor?
ja: Bereichskennung B = 0?
ja: Pointerkennzeichnung H1 = 1?
ja: Ausgangsdaten: = H1-Byte
nein: Pointerkennzeichnung H2 = 1?
ja: Ausgangsdaten: = H2-Byte
nein: a) Ist AUDAT = 1 und liegt keine positive Stopfaktion oder
b) liegt eine negative Stopfaktion vor?
ja: Erzeugung des Lesebefehls
nein: Pointerkennzeichnung H1 = 1?
ja: Ausgangsdaten: = Festwerte
nein: Pointerkennzeichnung H2 = 1?
ja: Ausgangsdaten: = Festwerte
Liegt Lesebefehl vor?
ja: J1D = 1?
ja: Bereichskennung B = 0?
ja: Lesezähler VC4RC: = VC4RC+1 MOD 64
nein: Bereichskennung B = 1?
ja: Lesezähler
VC4RC: = VC4RC+2 MOD 64
nein: Lesezähler VC4RC: = VC4RC+1 MOD 64
Ausgangsdaten = Pufferspeicherdaten
nein: Liegt AU-3 mit VC-3 eines Bereiches vor?
ja: Pointerkennzeichnung H1 = 1?
ja: Ausgangsdaten: = H1-Byte
nein: Pointerkennzeichnung H2 = 1?
ja: Ausgangsdaten: = H2-Byte
nein: Sprung zur Hilfsroutine
nein: Liegt TU-3 vor?
ja: a) Ist AUDAT = 1 und
b) Ist TU3D(B) = 1 und liegt keine positi­ ve Stopfaktion oder
c) Liegt eine negative Stopfaktion vor?
ja: Erzeugung des Lesebefehls
Lesezähler
VC3RC(B): = VC3RC(B)+1 MOD 32
Ausgangsdaten: = Pufferdaten
nein: a) Ist AUDAT = 1 und
b) Ist TUG2D(B) = 1 und
c) Ist V1 = 0 gesetzt und
d) Ist V2 = 0 gesetzt und
e) Ist V3 = 0 gesetzt oder liegt eine negative Stopfaktion und
f) Ist V3P = 0 gesetzt oder liegt keine positive Stopfaktion und
g) ist V4 = 0 gesetzt?
ja: Erzeugung des Lesebefehls
Lesezähler
LORC(PA): = LORC(PA)+1 MOD 12
Ausgangsdaten: = Pufferspeicherdaten
Ende: Hilfsroutine

Start:
a) Ist AUDAT = 1 und liegt keine positive Stopfaktion vor oder
b) Liegt eine negative Stopfaktion vor?
ja: AU-3-Spaltenzähler AU3S(B): = AU3S(B)+1 MOD 87
AU-3-Spaltenzähler AU3S(B) = 29 oder AU3S(B) = 58?
nein: Erzeugung eines Lesebefehls
Lesezähler VC3RC(B): = VC3RC(B)+1 MOD 32
Ausgangsdaten: = Pufferspeicherdaten
J1D = 1?
ja: AU-3-Spaltenzähler AU3S(B) = 0
nein: Sprung zum Ende der Leseentscheidungsanordnung
Ende: Anhang D Sende-Pointerschaltung 15

Start:
Abspeicherung der Pointeradresse PA in einem Adreßzwischenspeicher
Pointerkennzeichnung H1 = 1 oder V1 = 1?
ja: Sprung zur H1V1-Routine
nein: Pointerkennzeichnung H2 = 1 oder V2 = 1?
ja: Sprung zur H2V2-Routine
nein: Pointerkennzeichnung H3 = 1 oder V3 = 1?
ja: Sprung zur H3V3-Routine
nein: J1D = 1?
ja: Speicherung des Wertes des Posi­ tionszeigers als Pointerwert P_akt(PA, n) im Pointerspeicher
Ende: H1V1-Routine

Start:
Soll gestopft werden?
nein: Bildung von H1- oder V1-Byte mit dem Pointerwert Sprung zum Ende
ja: Speicherung der Stopfinformation im Pointerspeicher
Soll positiv gestopft werden?
ja: Bildung von H1- oder V1-Byte mit dem Pointer­ wert mit einem invertierten I-Bit;
Sprung zum Ende
nein: Bildung von H1- oder V1-Byte mit dem Pointer­ wert mit einem invertierten D-Bit;
Ende: H2V2-Routine

Start:
Soll gestopft werden?
nein: Bildung von H2- oder V2-Byte aus dem Pointerwert
Sprung zum Ende
ja: Soll positiv gestopft werden?
ja: Bildung von H2- oder V2-Byte aus dem Pointer­ wert mit invertierten I-Bits;
Sprung zum Ende
nein: Bildung von H2- oder V2-Byte aus dem Pointer­ wert mit invertierten D-Bits;
Ende: H3V3-Routine

Start:
Pointerkennzeichnung H3 = 1?
ja: Soll gestopft werden?
ja: Soll positiv gestopft werden?
ja: Pointerwert P_akt(PA, n-1) = 782?
ja: Pointerwert P_akt(PA, n): = 0
nein: Pointerwert P_akt(PA, n) = P_akt(PA, n-1)+1
nein: Pointerwert P_akt (PA, n-1) = 0?
ja: Pointerwert P_akt(PA, n): = 782
nein: Pointerwert
P_akt(PA, n) = P_akt(PA, n-1)-1
nein: Soll gestopft werden?
ja: Soll positiv gestopft werden?
ja: Sprung zur Kennungsroutine 1
nein: Sprung zur Kennungsroutine 2
Speicherung des aktuellen Pointerwertes P_akt(PA, n) in Poin­ terspeicher
Ende:

In the send addressing arrangement18th apart from the TU Identifier a pointer address PA and a buffer memory address se PS formed for a data byte. In the state of the Send addressing arrangement188388 00070 552 001000280000000200012000285913827700040 0002004222546 00004 38269OL <is the TU identifier first set to 0. Then it is checked whether a VC-4 is present lies (from management memory). If so, it will Buffer memory address PS is equal to the content of the read counter VC4RC and the pointer address PA set to "00111BB". The two letters "B" are reserved for the area. If there is no VC-4, a query is made as to whether it is in an AU-3 a VC-3 is present (from management memory). Is this if the answer is affirmative, the buffer memory address PS becomes equal to the In stop of the read counter VC3RC (B) and the pointer address PA  set to "00111BB". There is also no VC-3 in one AU-3 before, it checks if there is a VC-3 in an AU-4 is transported (from management memory). Is this if the answer is affirmative, the buffer memory address PS becomes equal to the In stop of the read counter VC3RC (B) and the pointer address PA set equal to "BB00000". This query will also no, becomes the send TUG-2 address routine (Appendix C) jumped.

First, after the start of the transmit TUG2 address routine, an intermediate address ZW is set to "BBTTT". The two letters "B" stand for the area and the three letters "T" are reserved for the content of the counter TUG2 (B). If there is a TU-2 (from management memory), the pointer address PA is combined with the intermediate address and with low-order bits that are set to "0". If there is no TU-2, it is extracted from the management memory whether a TU-12 occurs. If this is the case, a data word is formed as the pointer address PA, which contains the intermediate addresses ZW as high-order bits and the content of the counter TU12 (B) as low-order bits. If there is no TU-12, there is a TU-11. The pointer address PA is then combined from the intermediate address and the content of the counter TU11 (B). Then the buffer memory address PS is composed of the pointer address PA and the content of the read counter LORC (PA). The pointer address forms the most significant bits. This ends the send TUG2 address routine.

The pointers for pointer positions determined in the transmission counter arrangement 17 are then assigned to the pointer identifiers V1, V2, V3, V3P and V4 and the content of a position counter to the position pointer TUPOS in the transmission addressing arrangement 18 . First, the management memory is used to check whether there is a TU-3. If this is the case, the TU identifier is set to 4 and the pointer identifier V1, the pointer pointer H1TU3 (B), the pointer identifier V2, the pointer pointer H2TU3 (B), the pointer identifier V3, the pointer pointer H3TU3 (B), the pointer identifier V3P, the pointer pointer H3TU3P ( ) and the pointer identifier V4 the value 0. The counter content of the position counter TU3POS (B) is also assigned to the position pointer TUPOS.

If there is no TU-3, you are asked whether there is a VC-3 in an AU3 or a VC-4 in an AU-4. If the question is answered in the affirmative, the pointer identifications V1 are set to H1, V2 to H2, V3 to H3, V3P to H3P and V4 to 0 and the position pointer TUPOS is set to the counter reading of the position counter AUPOS. In the other case, it is checked whether a TU-11 is available (from the management memory). If this is the case, the TU identifier is set equal to 3, a pointer V equals the pointer pointer VTU11 (B), a pointer VP equals the pointer pointer VUT11P (B) and the position pointer TUPOS equals the content of the position counter TU11POS (B) . If there is no TU-11, the management memory is then used to check whether a TU-12 is available. If this is the case, the TU identifier is set to 2, the pointer V to the pointer pointer VTU12 (B), the pointer VP to the pointer pointer VTU12P (B) and the position pointer TUPOS to the content of the position counter TU12POS (B). In the other case, the TU identifier is assigned the value 0, the pointer V with the pointer pointer VTU2 (B), the pointer VP with the pointer pointer VTU2P (B) and the position pointer with the content of the position counter TU2POS (B).

In the following, the pointers V and VP are assigned to the pointer markings V1 to V4. To do this, it must be determined which frame is present. When the first frame is present (H4 _act (B, n) = 0), the pointer identifier V1 is set to the pointer V and the remaining pointer identifier is set to 0. If the second frame is present (H4 _act (B, n) = 1), the pointer identifier V2 is set to the pointer V and the remaining pointer identifiers are set to 0. If the third frame is present (H4 _act (B, n) = 2), the pointer identifier V3 is set to the pointer V and the pointer identifier V3P is set to the pointer VP. The other pointers are assigned the value 0. If the fourth frame is present, pointer V4 is assigned pointer V and the other pointer identifiers are assigned the value 0. With this last instruction, the state sequence of the send addressing arrangement 18 is ended.

The state sequence of the read decision arrangement 20 (Appendix C) is described below. Here the read command for writing to the buffer memory 13 and an increase in the count of various counters is taken. After the start, it is taken from the management memory whether there is a VC-4 in an AU-4. If this is the case, it is checked whether the area identifier B is 0. If the answer is affirmative, the next step is to check whether the pointer identifier H1 is equal to 1. Then the first byte of the AU pointer is available. If the pointer characteristic drawing H1 equal to 1, output data byte as the byte H1, which is supplied from the transmit pointer circuit 15, is used. If the pointer identifier H1 is not equal to 1, it is checked whether the pointer identifier H2 is equal to 1. In this case, the H2 byte supplied by the transmitter pointer circuit 15 is used as the output data byte. If the pointer identifier H2 is not equal to 1, a read command is generated for every three data bytes if a) the AUDAT pointer is 1 and there is no positive stuffing action or b) there is a negative stuffing action.

If the area identifier B is not equal to 0, the first question is whether the pointer identifier H1 is equal to 1. If this is the case, the output data are assigned fixed values (Y bytes) (see Fig. 3.1 / G709). If the pointer label H1 is not equal to 1, a check is made to determine whether the pointer label H2 is equal to 1. If this is the case, who the output data with further fixed values, ie all bits are set equal to 1, occupied (see Fig. 3. 1 / G709).

The next question is whether the read command is present. If the answer is affirmative, it is checked whether the pointer J1D, which is supplied by the buffer memory 13 , is equal to 1. If this is also affirmed, when the first area is present, ie the area identifier B is 0, the counter content of the read counter VC4RC is incremented. With the counter content 64 , the read counter VC4RC is set to 0. If the second area is present, ie the area identifier B is 1, the read counter is increased by two units. This can happen after switching on the circuit arrangement if the pointer J1D is assigned to the second area. In the other case, if the pointer J1D is assigned to the third area (area identifier B = 2), the read counter is not incremented. By not counting, the first area is corrected. If the pointer J1D is not equal to 1, the modulo 64 read counter VC4RC is incremented. The buffer memory data are then supplied as output data.

Next, it is checked whether a VC-3 of an area occurs in an AU-3. This information is also provided by the management memory of the system management.

If the VC-3 is in an AU-3, it is checked whether the pointer identifier H1 is 1. If this is the case, the H1 byte supplied by the transmit pointer circuit is used as the output data byte. In the other case, it is checked whether the pointer identifier H2 is 1. If the answer is affirmative, the H2 byte from the transmission pointer circuit 15 is used as the output data byte. If the pointer identifier H2 is not equal to 1, the system jumps to an auxiliary routine (Appendix C).

Here it is first checked (auxiliary routine) whether a) the AUDAT pointer is equal to 1 and whether there is no positive stuffing action or b) there is a negative stuffing action. If the answer is affirmative, an AU-3 column counter AU3S (B) is incremented. With a count of 87 of the AU-3 column counter AU3S (B), this is set to 0. This AU-3 column counter AU3S (B) identifies a column in an AU-3 (cf. Fig. 2.3 / G709). To determine whether there are fixed darning points, it is checked whether the AU3 column counter AU3S (B) is 29 or 58. If this is not the case, a read command is generated and the read counter VC3RC (B) is incremented. With the value 32, the read counter VC3RC (B) is set to 0. Then the data byte of the buffer memory 13 is used as an output data byte. At the end of the auxiliary routine, it is checked whether the pointer J1D is equal to 1. If this is the case, the AU-3 column counter AU3S (B) is set to 0 (initialization). This ends the auxiliary routine.

Next, it is checked in the state sequence of the read decision arrangement 20 with the help of the management memory whether a TU-3 is present. If this is the case, the question is asked whether a) the AUDAT pointer is 1 and b) the TU3D (B) pointer is 1 and there is no positive stuffing action, or c) there is a negative stuffing action. If this is the case, a read command is generated and the read counter VC3RC (B) is increased by one unit. With a counter reading of 32, this read counter VC3RC (B) is set to 0. Then the data byte read from the buffer memory 13 is output as an output data byte. If there is no TU-3, it is checked whether a) the pointer AUDAT is 1 and b) the pointer TUG2D (B) is 1 and c) the pointer designation V1 is set to 0 and d) the pointer designation V2 is set to 0 and e) the pointer marking V3 is set to 0 or there is a negative stuffing action and f) the pointer marking V3P is set to 0 or there is no positive stuffing action and g) the pointer marking V4 is set to 0. If this condition is met, a read command is generated and a read counter LORC (PA) is incremented, which is assigned to the data byte read out. The data byte is also output as an output data byte. A read counter LORC (PA) is a modulo 12 counter. The state sequence of the read decision arrangement 20 is thus ended.

Finally, the state sequence of the transmit pointer circuit 15 (Appendix D) is described, which contains an address buffer and a pointer memory. After the start, the pointer address PA supplied by the reading circuit 16 is stored in the address buffer. It is then checked whether a pointer identifier H1 or V1 is 1. If this is the case, the system jumps to an H1V1 routine. If this is not the case, it is checked whether the pointer marking H2 or V2 is 1. If the answer is affirmative, the system jumps to an H2V2 routine. If the answer is no, it is then checked whether the pointer identification H3 or V3 is equal to 1. If this is the case, the system jumps to an H3V3 routine. If the pointer identifier H3 or V3 is not equal to 1, a query is made as to whether the pointer J1D is equal to 1, ie whether a J1 or V5 byte is assigned to the corresponding data byte from the buffer memory 13 . If this is not the case, the end of the program or status sequence of the transmit pointer circuit 15 is jumped. In the other case, the value of the position pointer TUPOS is stored in the pointer memory as a pointer value P _act (PA, n). The state sequence of the transmit pointer circuit 15 is thus ended.

The H1V1 routine (Appendix D) is described below. After the start, a check is first carried out to determine whether to stop. This information is supplied by the justification decision circuit, not shown here. If the answer is no, an H1 or V1 byte is formed with the pointer value and the program jumps to the end of the H1V1 routine. In the other case, if stuffing is to be done, the stuffing information is stored in the pointer memory and a check is carried out to determine whether positive stuffing is to be done. Then an H1 or V1 byte is formed with the pointer value with an inverted I bit and the program jumps to the end of the routine. If negative stuffing is to be done, the H1 or V1 byte is formed with the pointer value with an inverted D bit.

The H2V2 routine (Appendix D) describes the formation of an H2 or V2 byte. After the start, a check is carried out to determine whether to stop. If this is not the case, the H2 or V2 byte is formed from the pointer value. In the other case, with a positive stuffing, the H2 or V2 byte is formed from the pointer value with inverted I bits. In the event of negative stuffing, the H2 or V2 byte is formed from the pointer value with inverted D bits. This ends the H2V2 routine.

After starting the H3V3 routine (Appendix D) it is first checked whether the pointer identification H3 is equal to 1. If this is the case, a check is carried out to determine whether to stop. If you want to stop, you are asked whether you should stop positive. With an affirmative answer, whether the pointer value P _akt (PA n-1) is checked, is equal to the 782nd If this is the case, the pointer value P _akt (PA, n) is set equal to the 0th In the other case, the pointer value is incremented (P _act (PA, n): = P _act (PA, n-1) +1). With a negative stuffing whether the pointer value P _akt (PA, n-1) is asked, is equal to 0. If this is the case, the pointer value P _akt (PA, n) is set equal to the 782nd In the other case, the pointer value is decremented (P _act (PA, n): = P _act (PA, n-1) -1). If the pointer identifier H3 is not equal to 1, the position for the V3 byte is available. If tamping is to be performed, a positive tamping action jumps to identification routine 1 (Appendix B) and a negative tamping action to identification routine 2 (Appendix B). These two identification routines 1 and 2 have already been described in each case in the explanation of the receive pointer circuit 5 . Finally, the current pointer value P _akt (PA, n) is chert vomit in the pointer memory. This ends the H3V3 routine. Appendix A Receive counter arrangement 6

Begin:
DAT = 1?
no: back to the start
yes: Is there J1 marking?
yes: Is there an administrative unit AU-4?
yes: set area B: = 0, 1, 2:
Jump to the initialization routine
no: jump to the initialization routine
no: Is there an AU-4 administrative unit?
yes: jump to counter routine 1
no: jump to counter routine 2
The End: Initialization routine

Begin:
Column counter OFF (B): = 0
Line counter AUZ (B) = 0
Counter TUG2 (B): = 6
Counter TU11 (B): = 3
Counter TU12 (B): = 2
Position counter TU3POS (B) = 594
H4 _act (B, n) = 0?
yes: position counter TU2POS (B): = 320
Position counter TU12POS (B): = 104
Position counter TU11POS (B) = 77
The End: Counter routine 1

Begin:
Column counter OFF (B) = 86?
yes: column counter OFF (B): = 0
Line counter AUZ (B): = AUZ (B) +1 MOD 9
no: column counter OFF (B): = OFF (B) +1
Column counter OFF (B) <1?
no: TU pointer TU3D (B): = 0
yes: TU pointer TU3D (B): = 1
Position counter TU3POS (B): = TU3POS (B) +1 MOD 765
Column counter OFF (B) = 1?
no: pointer pointer H1TU3 (B), H2TU3 (B), H3TU3 (B): = 0
Column counter OFF (B) = 2 and row counter AUZ (B) = 2?
no: pointer pointer H3TU3P (B): = 0
yes: pointer pointer H3TU3P (B): = 1
yes: line counter AUZ (B) = 0?
yes: pointer pointer H1TU3 (B): = 1
no: line counter AUZ (B) = 1?
yes: pointer pointer H2TU3 (B): = 1
no: line counter AUZ (B) = 2?
yes: pointer pointer H3TU3 (B): = 1
Column counter OFF (B) <2?
no: TU pointer TUG2D (B): = 0
yes: TU pointer TUG2D (B): = 1
Counter TUG2 (B) = 6?
no: counter TUG2 (B): = TUG2 (B) +1
yes: counter TUG2 (B): = 0
Column counter OFF (B) <10 and row counter AUZ (B) = 0?
yes: pointer pointer VTU2 (B): = 1
no: pointer pointer VTU2 (B): = 0
Position counter
TU2POS (B): = TU2POS (B) +1 MOD 428
Column counter OFF (B) <17 and row counter AUZ (B) = 0?
no: pointer pointer VTU2P (B): = 0
yes: pointer pointer VTU2P (B): = 1
Column counter OFF (B) <2 and counter TUG2 (B) = 0?
no: jump to brand 11
yes: counter TU11 (B) = 3?
no: counter TU11 (B): = TU11 (B) +1
yes: counter TU11 (B): = 0
Column counter OFF (B) <31 and row counter AUZ (B) = 0?
yes: pointer pointer VTU11 (B): = 1
no: pointer pointer VTU11 (B): = 0
Position counter
TU11POS (B): = TU11POS (B) +1 MOD 104
Column counter OFF (B) <59 and row counter AUZ (B) = 0?
yes: pointer pointer VTU11P (B): = 1
no: pointer pointer VTU11P (B): = 0
Brand 11 :
Column counter OFF (B) <2 and counter TUG2 (B) = 0?
yes: counter TU12 (B) = 2?
no: counter TU12 (B): = TU12 (B) +1
yes: counter TU12 (B): = 0
Column counter OFF (B) <24 and row counter AUZ (B) = 0?
yes: pointer pointer VTU12 (B): = 1
no: pointer pointer VTU12 (B): = 0
Position counter
TU12POS (B): = TU12POS (B) +1 MOD 140
Column counter OFF (B) <45 and row counter AUZ (B) = 0?
yes: pointer pointer VTU12P (B): = 1
no: pointer pointer VTU12P (B): = 0
The End: Counter routine 2

Begin:
Column counter OFF (B) = 86?
yes: column counter OFF (B): = 0
Line counter AUZ (B): = AUZ (B) +1 MOD 9
no: column counter OFF (B): = OFF (B) +1
Column counter OFF (B) = 0 or OFF (B) = 29 or OFF (B) = 58?
yes: TU pointer TUG2D (B): = 0
no: TU pointer TUG2D (B): = 1
Counter TUG2 (B) = 6?
no: counter TUG2 (B): = TUG2 (B) +1
yes: counter TUG2 (B): = 0
Column counter OFF (B) <7?
no: pointer pointer VTU2 (B): = 1
yes: pointer pointer VTU2 (B): = 0
Position counter
TU2POS (B): = TU2POS (B) +1 MOD 428
Column counter OFF (B) <14?
no: pointer pointer VTU2P (B): = 1
yes: pointer pointer VTU2P (B): = 0
Counter TUG2 (B) = 0?
no: jump to brand 12
yes: counter TU11 (B) = 3?
no: counter TU11 (B): = TU11 (B) +1
yes: counter TU11 (B): = 0
Column counter OFF (B) <28?
no: pointer pointer VTU11 (B): = 1
yes: pointer pointer VTU11 (B): = 0
Position counter
TU11POS (B): = TU11POS (B) +1 MOD 104
Column counter OFF (B) <57?
yes: pointer pointer VTU11P (B): = 0
no: pointer pointer VTU11P (B): = 1
Brand 12 :
Counter TUG2 (B) = 0?
yes: counter TU12 (B) = 2?
no: counter TU12 (B): = TU12 (B) +1
yes: counter TU12 (B): = 0
Column counter OFF (B) <21?
no: pointer pointer VTU12 (B): = 1
yes: pointer pointer VTU12 (B): = 0
Position counter
TU12POS (B): = TU12POS (B) +1 MOD 140
Column counter OFF (B) <43?
yes: pointer pointer VTU12P (B): = 1
no: pointer pointer VTU12P (B): = 0
The End: Receive addressing arrangement 7

Begin:
TU identifier: = 0
Is there a VC-4?
yes: buffer memory address PS: = write counter VC4SC pointer address PA: = "00111BB"
no: is there a VC-3 in an AU-3?
yes: buffer memory address PS: = write counter VC3SC (B)
Pointer address PA: = "00111BB"
no: is there a VC-3 in an AU-4?
yes: buffer memory address PS: = write counter VC3SC (B)
Pointer address PA: = "BB00000"
no: go to the TUG-2 address routine
Is there TU-3?
yes: TU identifier: = 4
Pointer identification V1: = H1TU3 (B), V2: = H2TU3 (B), V3: = H3TU3 (B), V3P: = H3TU3P (B), V4: = 0 and position pointer TUPOS: = TU3POS (B)
no: Is VC-3 in AU-3 or VC-4 in AU-4?
yes: pointer marking V1: = 0, V2: = 0, V3: = 0, V3P: = 0, V4: = 0
no: is TU-11 available?
yes: TU identifier: = 3
Pointer V: = VTU11 (B), VP: = VTU11P (B), TUPOS: = TU11POS (B)
no: is TU-12 available?
yes: TU identifier: = 2
Pointer V: = VTU12 (B), VP: = VTU12P (B), TUPOS: = TU12POS (B)
no: TU identifier: = 0
Pointer V: = VTU2 (B), VP: = VTU2P (B), TUPOS: = TU2POS (B)
H4 _act (B, n) = 0?
yes: pointer marking V1: = V, V2: = 0, V3: = 0, V3P: = 0, V4: = 0
no: H4 _act (B, n) = 1?
yes: pointer marking V1: = 0, V2: = V, V3: = 0, V3P: = 0, V4: = 0
no: H4 _act (B, n) = 2?
yes: pointer marking V1: = 0, V2: = 0, V3: = V, V3P: = VP, V4: = 0
no: pointer marking V1: = 0, V2: = 0, V3: = 0, V3P: = 0, V4: = V
The End: Receive TUG2 address routine

Begin:
Intermediate address ZW: = "BBTTT"
Does TU-2 exist?
yes: pointer address PA: = ZW / "00"
no: is TU-12 available?
yes: pointer address PA: = ZW / TU12 (B)
no: pointer address PA: = ZW / TU11 (B)
Buffer memory address PS: = PA / write counter LOSC (PA)
The End: Writing decision arrangement 9

Begin:
Is there an AU-4 with VC-4?
yes: Is there J1 marking?
yes: pointer J1D: = 1
no: pointer J1D: = 0
DAT = 1?
yes: generation of the write command
no: Is there an AU-3 with VC-3 of an area?
yes: Is there J1 marking?
yes: pointer J1D: = 1
no: pointer J1D: = 0
Is DAT = 1 and column counter OFF (B) ≠ 29 and ≠ 58?
yes: generation of the write command
no: is TUPOS = pointer value?
yes: pointer J1D: = 1
no: pointer J1D: = 0
Is there TU-3?
yes: a) if DAT = 1 and
b) TU3D (B) = 1 is set and
c) there is no positive darning action or
d) is there a negative darning action?
yes: generation of the write command
no: a) if DAT = 1 and
b) TUG2D (B) = 1 is set and
c) V1 is set to 0 and
d) V2 is set to 0 and
e) is V3 = 0 or there is a negative tamping action and
f) V3P = 0 is set or there is no positive darning action and
g) is V4 = 0 set?
yes: generation of the write command
Is there a write command?
yes: write counter VC4SC: = VC4SC + 1 MOD 64
Write counter VC3SC (B): = VC3SC (B) +1 MOD 32
Write counter LOSC (PA): = LOSC (PA) +1 MOD 12
Data byte and pointer J1D in buffer memory
The End: H4 arrangement 8

Begin:
Column counter OFF (B) = 0 and row counter AUZ (B) = 5 and DAT = 1?
yes: is AU-4 available?
yes: set B: = 0, 1, 2:
Determination of the H4 value from the two least significant bits of the H4 byte;
Storage of the H4 value in H4 memory;
Is the newly received H4 value H4 _new (B, n) equal to the current H4 value H4 _act (B, n-1) +1?
yes: H4 _act (B, n): = H4 _new (B, n)
NO: Forms of the newly received value H4-H4 _new (B, n) along with the previously received four letz th H4-H4 _new values (B, ni), i = 1,. . . , 4, a sequence?
yes: H4 _act (B, n): = H4 _new (B, n)
no: H4 _act (B, n): = H4 _act (B, n-1) +1
The End: Appendix B Receive pointer circuit 5 AU pointer counter 11

Begin:
Is there an AU pointer identifier?
yes: AU pointer counter AUPO: = 0
no: AU pointer counter AUPO = 12?
no: AU pointer counter AUPO: = AUPO + 1
yes: no change in the content of the AU pointer counter AUPO
The End: AU position counter 12

Begin:
Is there a lock signal?
no: DAT: = 1
Is the first area available (B = 0)?
yes: AU position counter AUVC: = AUVC + 1
No: No change in the content of the AU position counter AUVC
yes: DAT: = 0
Is there the first positive darning point?
yes: AU position counter AUVC: = 0
No: No change in the content of the AU position counter AUVC
The End: Main assembly 10

Begin:
Storing the pointer address PA in an address buffer;
Is there an H1, H2, V1 or V2 byte?
yes: Is there a H1 or V1 byte?
yes: intermediate storage of the H1 or V1 byte in the H1V1 memory;
no: jump to the evaluation routine
Store the current pointer value P _akt (PA, n) and the new pointer value P (PA, n) and stuffing information in the pointer memory;
no: Is there an H3 byte?
yes: is there a negative darning point?
no: DAT: = 0
Jump to the end
yes: DAT: = 1
Jump to brand 21
no: Is there a darning station for administrative unit AU-3 or AU-4?
no: jump to brand 21
yes: Is there a positive darning site?
yes: DAT: = 0
Jump to the end
Brand 21 :
Output of the pointer value P _act (PA, n) for TU-3, TU-2, TU-12, TU-11 and stuffing information from pointer memory to write circuit 4 ;
Is the pointer value _Pakt (PA, n) read out of the pointer memory for AU-4, AU-3 equal to the content of the position counter AUVC?
yes: output of the J1 marking
Is there a V3 byte and STOPFDAT = 1?
yes: is there a positive darning campaign?
yes: jump to identification routine 1
Storing the current pointer value P _akt (PA, n) in pointer memory;
no: Is there a negative darning action?
no: jump to the end
yes: jump to identification routine 2
Storing the current pointer value P _akt (PA, n) in memory pointer;
The End: Evaluation routine

Begin:
Enter the H1 or V1 byte from the H1V1 memory, the newly received H2 or V2 byte, the last received pointer value P (PA, n-1) and the current pointer value P _akt (PA, n-1) from the pointer memory ;
Pointer counter PZ: = PZ + 1;
STOPDAT: = 1
Is the newly received pointer value P (PA, n) equal to the last received pointer value P (PA, n-1)?
Yes: If the current pointer value P _akt (PA, n-1) equal to the new pointer value P (PA, n)?
yes: pointer counter PZ: = 0
no: STOPDAT: = 0
Pointer counter PZ = 3?
no: P _act (PA, n): = P _act (PA, n-1)
yes: P _act (PA, n): = P (PA, n)
no: pointer counter PZ: = 1
Should a darning action be carried out and STOPFDAT = 1?
yes: stuffing counter SZ: = 3?
yes: Is there H2 byte?
yes: is there a positive darning campaign?
yes: pointer value P _akt (PA, n-1) = 782?
yes: P _act (PA, n): = 0
no: P _act (PA, n): = P _act (PA, n-1) +1
no: Is there a negative darning action?
yes: pointer value P _akt (PA, n-1) = 0?
yes: P _akt (PA, n): = 782
no: P _act (PA, n): = P _act (PA, n-1) -1
no: P _akt (PA, n) = P _akt (PA, n-1)
Stuff counter SZ: = 0
no: do not perform a darning action
Stuff counter SZ: = 0
no: stuffing counter SZ = 3?
yes: stuffing counter SZ: = SZ
no: stuffing counter SZ: = SZ + 1
The End: Identification routine 1

Begin:
TU identifier = 4?
yes: pointer value P _akt (PA, n-1) = 764?
yes: pointer value P _akt (PA, n): = 0
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) +1
TU identifier = 0?
yes: pointer value P _akt (PA, n-1) = 427?
yes: pointer value P _akt (PA, n): = 0
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) +1
TU identifier = 2?
yes: pointer value P _akt (PA, n-1) = 139?
yes: pointer value P _akt (PA, n): = 0
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) +1
TU identifier = 3?
yes: pointer value P _akt (PA, n-1) = 103?
yes: pointer value P _akt (PA, n): = 0
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) +1
The End: Identification routine 2

Begin:
TU identifier = 4?
yes: pointer value P _akt (PA, n-1) = 0?
yes: pointer value P _akt (PA, n): = 764
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) +1
TU identifier = 0?
yes: pointer value P _akt (PA, n-1) = 0?
yes: pointer value P _akt (PA, n): = 427
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) -1
TU identifier = 2?
yes: pointer value P _akt (PA, n-1) = 0?
yes: pointer value P _akt (PA, n): = 139
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) -1
TU identifier = 3?
yes: pointer value P _akt (PA, n-1) = 0?
yes: pointer value P _akt (PA, n): = 103
no: pointer value P _akt (PA, n): = P _akt (PA, n-1) -1 Appendix C. Transmit frame counter arrangement 19

Begin:
Is there a start number?
yes: STM column counter STMS: = 0
STM line counter STMZ: = 0
Area counter B: = 0
Position counter AUPOS: = 521
H4 _act (B, n): = H4 _act (B, n-1) +1 MOD 4
no: STM column counter STMS: = STMS + 1 MOD 270
STM column counter STMS = 0?
yes: STM line counter STMZ: = STMZ + 1 MOD 9
Area counter B: = B + 1 MOD 3
STM line counter STMZ = 3?
yes: STM column counter STMS = 0, 1 or 2?
yes: pointer identification H1: = 1
no: pointer identification H1: = 0
STM column counter STMS = 3, 4 or 5?
yes: pointer marking H2: = 1
no: pointer marking H2: = 0
STM column counter STMS = 6, 7 or 8?
yes: pointer identification H3: = 1
no: pointer identification H3: = 0
STM column counter STMS = 9, 10 or 11?
yes: pointer marking H3P: = 1
no: pointer identification H3P: = 0
STM column counter STMS <8?
yes: pointer AUDAT: = 1
no: pointer AUDAT: = 0
AUDAT = 1 and range counter B = 0?
yes: position counter AUPOS: = AUPOS + 1 MOD 783
The End: Transmit counter arrangement 17

Begin:
AUDAT = 1?
no: back to the start
yes: STM column counter STMS = 9 and STM row counter STMZ = 3?
yes: jump to initialization routine
no: range counter B = 0 before?
yes: Is there an administrative unit AU-4?
yes: jump to counter routine 1
no: jump to counter routine 2
no: back to the start;
The End: Send addressing arrangement 18

Begin:
TU identifier: = 0
Is there a VC-4?
yes: buffer memory address PS: = read counter VC4RC
Pointer address PA: = "00111BB"
no: is there a VC-3 in an AU-3?
yes: buffer memory address PS: = read counter VC3RC (B)
Pointer address PA: = "00111BB"
no: is there a VC-3 in an AU-4?
yes: buffer memory address PS: = read counter VC3RC (B)
Pointer address PA = "BB00000"
no: go to the send TUG-2 address routine
Is there TU-3?
yes: TU identifier: = 4
Pointer identification V1: = H1TU3 (B), V2: = H2TU3 (B), V3: = H3TU3 (B), V3P: = H3TU3P (B), V4: = 0
and position pointer TUPOS: = TU3POS (B)
no: Is VC-3 in AU-3 or VC-4 in AU-4?
yes: pointer marking V1: = H1, V2: = H2, V3: = H3, V3P: = H3P, V4: = 0 and TUPOS: = AUPOS
no: is TU-11 available?
yes: TU identifier: = 3
Pointer V: = VTU11 (B), VP: = VTU11P (B), TUPOS: = TU11POS (B)
no: is TU-12 available?
yes: TU identifier: = 2
Pointer V: = VTU12 (B), VP: = VTU12P (B), TUPOS: = TU12POS (B)
no: TU identifier: = 0
Pointer V: = VTU2 (B), VP: = VTU2P (B), TUPOS: = TU2POS (B)
H4 _act (B, n) = 0?
yes: pointer marking V1: = V, V2: = 0, V3: = 0, V3P: = O, V4: = 0
no: H4 _act (B, n) = 1?
yes: pointer marking V1: = 0, V2: = V, V3: = 0, V3P: = 0, V4: = 0
no: H4 _act (B, n) = 2?
yes: pointer marking V1: = 0, V2: = 0, V3: = V, V3P: = VP, V4: = 0
no: pointer marking V1: = 0, V2: = 0, V3: = 0, V3P: = 0, V4: = V
The End: Send TUG2 address routine

Begin:
Intermediate address ZW: = "BBTTT"
Does TU-2 exist?
yes: pointer address PA: = ZW / "00"
no: is TU-12 available?
yes: pointer address PA: = ZW / TU12 (B)
no: pointer address PA: = ZW / TU11 (B)
Buffer memory address PS: = PA / read counter LORC (PA)
The End: Read decision arrangement 20

Begin:
Is there an AU-4 with VC-4?
yes: area identifier B = 0?
yes: pointer marking H1 = 1?
yes: output data: = H1 byte
no: pointer marking H2 = 1?
yes: output data: = H2 byte
no: a) If AUDAT = 1 and there is no positive darning action or
b) is there a negative darning action?
yes: generation of the read command
no: pointer identification H1 = 1?
yes: output data: = fixed values
no: pointer marking H2 = 1?
yes: output data: = fixed values
Is there a read command?
yes: J1D = 1?
yes: area identifier B = 0?
yes: read counter VC4RC: = VC4RC + 1 MOD 64
no: area identifier B = 1?
yes: read counter
VC4RC: = VC4RC + 2 MOD 64
no: read counter VC4RC: = VC4RC + 1 MOD 64
Output data = buffer memory data
no: Is there an AU-3 with VC-3 of an area?
yes: pointer marking H1 = 1?
yes: output data: = H1 byte
no: pointer marking H2 = 1?
yes: output data: = H2 byte
no: jump to the auxiliary routine
no: is TU-3 available?
yes: a) Is AUDAT = 1 and
b) If TU3D (B) = 1 and there is no positive darning action or
c) Is there a negative darning action?
yes: generation of the read command
Read counter
VC3RC (B): = VC3RC (B) +1 MOD 32
Output data: = buffer data
no: a) Is AUDAT = 1 and
b) Is TUG2D (B) = 1 and
c) If V1 = 0 is set and
d) Is V2 = 0 and
e) If V3 = 0 is set or there is a negative darning action and
f) If V3P = 0 is set or there is no positive darning action and
g) is V4 = 0 set?
yes: generation of the read command
Read counter
LORC (PA): = LORC (PA) +1 MOD 12
Output data: = buffer memory data
The End: Helper routine

Begin:
a) If AUDAT = 1 and there is no positive darning action or
b) Is there a negative darning action?
yes: AU-3 column counter AU3S (B): = AU3S (B) +1 MOD 87
AU-3 column counter AU3S (B) = 29 or AU3S (B) = 58?
no: generation of a read command
Read counter VC3RC (B): = VC3RC (B) +1 MOD 32
Output data: = buffer memory data
J1D = 1?
yes: AU-3 column counter AU3S (B) = 0
no: jump to the end of the reading decision arrangement
The End: Appendix D. Transmit pointer circuit 15

Begin:
Storage of the pointer address PA in an address buffer
Pointer marking H1 = 1 or V1 = 1?
yes: jump to the H1V1 routine
no: pointer marking H2 = 1 or V2 = 1?
yes: jump to the H2V2 routine
no: pointer identification H3 = 1 or V3 = 1?
yes: jump to the H3V3 routine
no: J1D = 1?
yes: storage of the value of the position pointer as pointer value P _act (PA, n) in the pointer memory
The End: H1V1 routine

Begin:
Should be darned?
no: formation of H1 or V1 byte with the pointer value jump to the end
yes: storage of the stuffing information in the pointer memory
Should positive stuffing be used?
yes: formation of H1 or V1 byte with the pointer value with an inverted I bit;
Jump to the end
no: formation of H1 or V1 byte with the pointer value with an inverted D bit;
The End: H2V2 routine

Begin:
Should be darned?
no: formation of H2 or V2 bytes from the pointer value
Jump to the end
yes: should the stuffing be positive?
yes: formation of H2 or V2 bytes from the pointer value with inverted I bits;
Jump to the end
no: formation of H2 or V2 bytes from the pointer value with inverted D bits;
The End: H3V3 routine

Begin:
Pointer marking H3 = 1?
yes: Should be darned?
yes: should the stuffing be positive?
yes: pointer value P _akt (PA, n-1) = 782?
yes: pointer value P _akt (PA, n): = 0
no: pointer value P _akt (PA, n) = P _akt (PA, n-1) +1
no: pointer value P _akt (PA, n-1) = 0?
yes: pointer value P _akt (PA, n): = 782
no: pointer value
P _act (PA, n) = P _act (PA, n-1) -1
no: should be darned?
yes: should the stuffing be positive?
yes: jump to identification routine 1
no: jump to identification routine 2
Storing the current pointer value P _akt (PA, n) in Poin terspeicher
The End:

Claims (18)

1. Circuit arrangement for evaluating or forming pointer bytes of a signal to be received or sent, the synchronous digital hierarchy with a control arrangement ( 2 , 14 )

• by means of counters ( 6 , 11 , 12 , 17 ) for determining the position of the data bytes serving as pointer bytes in the signal,
• - to identify the data bytes and
• - For taking at least pointer values from the marked pointer bytes or for inserting least least pointer values into the marked pointer terbytes is provided.

2. Circuit arrangement according to claim 2, characterized in
that the control arrangement ( 2 , 14 ) contains at least one counter ( 11 , 19 ) provided for counting the AU pointer bytes,
that the control arrangement ( 2 , 14 ) for forming a pointer for an AU pointer byte or a possible darning is hen hen certain counter readings are reached. 3. Circuit arrangement according to claim 2, characterized in that
that the control arrangement ( 2 , 14 ) contains at least one counter arrangement ( 6 , 17 ) provided for counting the data bytes in the AU user data area and
that by evaluating the meter readings of the meter arrangement ( 6 , 17 ), the control arrangement ( 2 , 14 ) for determining the position of the data bytes in the AU user data area, for assigning the data bytes to the TU transport units and for forming a pointer identifier for a TU pointer byte or a possible darning point is provided. 4. Circuit arrangement according to claim 3, characterized in that the counter arrangement ( 6 , 17 )

• at least one column counter each for determining the column and at least one row counter each for determining the row in an AU-4 or AU-3 management unit,
• a position counter for at least one TU-3 for identifying the user data bytes in a TU-3,
• - a counter to identify TUG-2,
• at least one counter for identifying TU-12 in at least one TUG-2,
• - At least one counter for identifying TU-11 in at least one TU-11 and
• - Contains at least one position counter for at least one TU-2, one TU-12 and one TU-11 for identifying the user data bytes in a TU-2, a TU-12 and a TU-11.

5. Circuit arrangement according to claim 4, characterized in that in the control arrangement ( 2 , 14 ) Poin terschaltung ( 5 , 15 ) in the presence of a Pointerkennzeichen voltage for the H1 or V1 and H2 or V2 pointer bytes each Extraction of a part of the pointer value from or for inserting a part of the pointer value into the pointer bytes is provided. 6. Circuit arrangement according to claim 5, characterized in that a pointer memory contained in the pointer circuit ( 5 , 15 ) at least for storing a pointer value to be formed by one of the addressing arrangement ( 7 , 18 ) contained in the control arrangement ( 2 , 14 ) Pointer address marked storage space is provided. 7. Circuit arrangement according to claim 6, characterized in that the addressing arrangement ( 7 , 18 ) for formation

• - from fixed pointer addresses for the VC-4 and VC-3,
• - From the counter for marking a TUG-2 dependent pointer addresses for the TU-2 and
• - Pointer addresses dependent on the counter for identifying a TUG-2 and on the respective counter for identifying a TU-12 or TU-11 are provided for the TU-12 and TU-11.

8. Circuit arrangement for evaluating pointer bytes of a signal to be received of the synchronous digital hierarchy according to one of claims 5 to 7, characterized in that if the newly received and the last received pointer value match and if the previous current pointer value and the new pointer value do not match the pointer circuit ( 5 ) is provided at most for setting the newly received pointer value as the current pointer value. 9. Circuit arrangement according to claim 8, characterized in that the pointer circuit ( 5 ) is provided when a positive or negative darning action occurs only after the occurrence of the H3 or V3 pointer byte of a transport unit for incrementing or decrementing the pointer values. 10. Circuit arrangement according to claim 8 or 9, characterized in that the initialization of the counter of the counter arrangement ( 6 ) is provided in each case at the beginning of an AU-4 or AU-3 management unit. 11. Circuit arrangement according to one of claims 8 to 10, characterized in that the control arrangement ( 2 ) receives a lock signal when there are no user data and that the lock signal blocks an AU position counter ( 12 ) for counting the AU user data bytes. 12. Circuit arrangement according to one of claims 8 to 11, characterized in that if the respective current pointer value matches the content of the corresponding position counter, the control arrangement ( 2 ) for outputting a pointer for the start of an AU-4, AU-3, TU-3, TU-2, TU-12 or TU-11 is provided. 13. Circuit arrangement according to one of claims 8 to 11, characterized in that the control arrangement ( 2 ) receives an AU pointer identifier for identifying the beginning of the AU pointer, which has an AU pointer counter ( 11 ) for counting the AU pointer bytes initialized. 14. Circuit arrangement for forming pointer bytes of a signal to be sent of the synchronous digital hierarchy according to one of claims 7 to 13, characterized in that upon delivery of a pointer for the beginning of an AU-4, AU-3, TU-3, TU-2 , TU-12 or TU-11, the pointer circuit ( 15 ) for forming the current pointer value from the counter content of the corresponding position counter is provided. 15. Circuit arrangement according to claim 14, characterized in that the pointer circuit ( 15 ) is provided with a positive or negative stuffing for incrementing or decrementing the current pointer value. 16. Circuit arrangement for forming pointer bytes of a signal to be transmitted of the synchronous digital hierarchy according to one of claims 7 to 15, characterized in that the control arrangement ( 14 ) a transmission frame counter arrangement ( 19 ) with a column counter for determining the column te and one Line counter for determining the line in the frame-synchronized signal of the synchronous digital hierarchy contains. 17. Circuit arrangement according to claim 16, characterized in that the initialization of the counter of the numerator arrangement ( 17 ) is provided in each case at the beginning of the 9th column and the 4th line in the context of the signal. 18. Circuit arrangement according to claim 16 or 17, characterized in that the column and row counter in the transmit frame counting arrangement ( 19 ) is used for determining Pointerkennzeichennun gene for the AU pointer bytes.