DE3788000D1 - Speicheradressierschaltung mit Wechseltätigkeit für ausgewählte Bits einer Eingangsadresse. - Google Patents
Speicheradressierschaltung mit Wechseltätigkeit für ausgewählte Bits einer Eingangsadresse.Info
- Publication number
- DE3788000D1 DE3788000D1 DE87107767T DE3788000T DE3788000D1 DE 3788000 D1 DE3788000 D1 DE 3788000D1 DE 87107767 T DE87107767 T DE 87107767T DE 3788000 T DE3788000 T DE 3788000T DE 3788000 D1 DE3788000 D1 DE 3788000D1
- Authority
- DE
- Germany
- Prior art keywords
- alternation
- input address
- addressing circuit
- memory addressing
- selected bits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
- Microcomputers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12265986A JPH0795398B2 (ja) | 1986-05-27 | 1986-05-27 | 1チップマイクロコンピュータ |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3788000D1 true DE3788000D1 (de) | 1993-12-09 |
DE3788000T2 DE3788000T2 (de) | 1994-02-24 |
Family
ID=14841453
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE87107767T Expired - Fee Related DE3788000T2 (de) | 1986-05-27 | 1987-05-27 | Speicheradressierschaltung mit Wechseltätigkeit für ausgewählte Bits einer Eingangsadresse. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4831587A (de) |
EP (1) | EP0248353B1 (de) |
JP (1) | JPH0795398B2 (de) |
DE (1) | DE3788000T2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5640338A (en) * | 1995-12-07 | 1997-06-17 | Hyundai Electronics Industries Co. Ltd. | Semiconductor memory device |
US6567289B1 (en) | 2000-08-23 | 2003-05-20 | Advanced Micro Devices, Inc. | Physical memory layout with various sized memory sectors |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4117470A (en) * | 1976-10-08 | 1978-09-26 | Data General Corporation | Data bit compression system |
US4651275A (en) * | 1981-07-02 | 1987-03-17 | Texas Instruments Incorporated | Microcomputer having read/write memory for combined macrocode and microcode storage |
FR2540277A1 (fr) * | 1983-02-01 | 1984-08-03 | Brion Alain | Memoire de mots munie d'un circuit de transcodage d'adresses |
-
1986
- 1986-05-27 JP JP12265986A patent/JPH0795398B2/ja not_active Expired - Fee Related
-
1987
- 1987-05-27 DE DE87107767T patent/DE3788000T2/de not_active Expired - Fee Related
- 1987-05-27 US US07/071,519 patent/US4831587A/en not_active Expired - Lifetime
- 1987-05-27 EP EP87107767A patent/EP0248353B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0248353A3 (en) | 1990-05-23 |
JPH0795398B2 (ja) | 1995-10-11 |
EP0248353A2 (de) | 1987-12-09 |
EP0248353B1 (de) | 1993-11-03 |
DE3788000T2 (de) | 1994-02-24 |
JPS62279594A (ja) | 1987-12-04 |
US4831587A (en) | 1989-05-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |