DE3741671A1 - CVD process for the edge passivation of semiconductor components - Google Patents
CVD process for the edge passivation of semiconductor componentsInfo
- Publication number
- DE3741671A1 DE3741671A1 DE19873741671 DE3741671A DE3741671A1 DE 3741671 A1 DE3741671 A1 DE 3741671A1 DE 19873741671 DE19873741671 DE 19873741671 DE 3741671 A DE3741671 A DE 3741671A DE 3741671 A1 DE3741671 A1 DE 3741671A1
- Authority
- DE
- Germany
- Prior art keywords
- cvd process
- deposition
- semiconductor components
- edge passivation
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims abstract description 22
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 238000002161 passivation Methods 0.000 title claims abstract description 9
- 239000011248 coating agent Substances 0.000 claims abstract description 4
- 238000000576 coating method Methods 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 230000005855 radiation Effects 0.000 claims description 4
- 239000012808 vapor phase Substances 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 1
- 238000010276 construction Methods 0.000 claims 1
- 238000001182 laser chemical vapour deposition Methods 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 238000000151 deposition Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000006303 photolysis reaction Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
Description
Die Erfindung bezieht sich auf ein CVD-Verfahren zur Randpassivierung nach dem Oberbegriff des Anspruchs 1.The invention relates to a CVD method for Edge passivation according to the preamble of claim 1.
Bekannte Verfahren zur Passivierung von Halbleiterbau elementen durch Materialabscheidung aus der Dampfphase (CVD-Verfahren) erfordern eine Aufheizung des gesamten Bauelements. In Thin Solid Films, 75 (1981), S. 125, Aufsatz von D. Josif et al. ist z.B. eine Aufheizung auf eine Temperatur im Bereich von 500° bis 650°C angegeben. Bei einem solchen bekannten Verfahren wird die gesamte Oberfläche eines Halbleiterbauelements beschichtet. Das bedeutet, daß an den Stellen, an denen keine Passivie rungsschicht erwünscht ist, diese nachträglich, z.B. durch Ätzen wieder entfernt werden muß.Known methods for passivating semiconductor devices elements through material separation from the vapor phase (CVD process) require heating of the whole Component. In Thin Solid Films, 75 (1981), p. 125, Review by D. Josif et al. is e.g. a heating up specified a temperature in the range of 500 ° to 650 ° C. In such a known method, the entire Surface of a semiconductor device coated. The means that in places where there is no passive layer is subsequently desired, e.g. must be removed again by etching.
Davon ausgehend liegt der vorliegenden Erfindung die Aufgabe zugrunde, ein Verfahren anzugeben, das diesen Nachteil nicht aufweist.Based on this, the present invention is the Task to specify a method that this Disadvantage does not have.
Diese Aufgabe wird bei einem Verfahren zur Herstellung einer Passivierungsschicht gemäß dem Oberbegriff des Anspruchs 1 durch dessen kennzeichnende Merkmale gelöst. Ausgestaltungen der Erfindung sind in Unteransprüchen angegeben.This task is done in a manufacturing process a passivation layer according to the preamble of Claim 1 solved by its characteristic features. Embodiments of the invention are in the subclaims specified.
Die im Kennzeichen angegebene Methode zur Materialab scheidung ist an sich seit Jahren als Laser-CVD-Verfah ren bekannt. Jedoch ist in keiner der hierzu bekanntge wordenen Veröffentlichungen eine Anregung zur Anwendung für die Randpassivierung gegeben.The method of material specified in the indicator Divorce has been a laser CVD process for years ren known. However, none of these are known publications a suggestion for the application given for edge passivation.
Bei der vorgeschlagenen Art der Materialabscheidung bleibt das Halbleiterbauelement kalt. Es tritt lediglich im Gasgemisch über der zu beschichtenden Oberfläche und direkt an der beschichteten Oberfläche eine lokale Tem peraturerhöhung ein. Dadurch unterbleibt auf vorteilhaf te Weise eine thermische Beeinflussung des Halbleiter bauelements während der Passivierungsbeschichtung.With the proposed type of material separation the semiconductor device remains cold. It just occurs in the gas mixture over the surface to be coated and a local temperature directly on the coated surface increase in temperature. This avoids advantageous te thermal influence of the semiconductor component during the passivation coating.
Das Verfahren wird nachstehend anhand eines in der Zeichnung schematisch dargestellten Anordnungsbeispiels zur Durchführung des Verfahrens näher erläutert.The procedure is described below using one of the Drawing schematically illustrated arrangement example to carry out the method explained in more detail.
Die nicht maßstäbliche Zeichnung zeigt eine Reaktions kammer 1 mit einem Quarzfenster 2 und Öffnungen für ei nen Gaseinlaß 3 und einen Gasauslaß 4. In der Kammer 1 ist auf einem beweglichen Träger 5 ein Halbleiterbauele ment 6 angeordnet, dessen Rand 7 beschichtet werden soll durch Abscheidung von isolierendem Material aus einem Gasgemisch 8. Die Abscheidung wird ausgelöst durch Be strahlung mit Laserlicht 9 aus einer Laserlichtquelle 10. Das Laserlicht ist jeweils auf einen Punkt kurz über der Oberfläche fokusiert. Die Steuerung der Laserlicht quelle 10 und der Bewegung des Trägers 5 kann mit einem Steuer- und Regelgerät erfolgen, das einen Mikrocomputer enthält.The not to scale drawing shows a reaction chamber 1 with a quartz window 2 and openings for egg NEN gas inlet 3 and a gas outlet 4th In the chamber 1 , a semiconductor component 6 is arranged on a movable support 5 , the edge 7 of which is to be coated by deposition of insulating material from a gas mixture 8 . The deposition is triggered by radiation with laser light 9 from a laser light source 10 . The laser light is focused on a point just above the surface. The control of the laser light source 10 and the movement of the carrier 5 can be done with a control device that contains a microcomputer.
In die Reaktionskammer 1 wird ein Gasgemisch 8 aus z.B. SiH4+x × N2O gegeben. Das zu beschichtende Bauelement 6 ist nicht aufgeheizt. Durch Bestrahlung mit dem foku sierten Laserstrahl 9 wird das Gas über den zu beschich tenden Stellen aufgeheizt und dadurch eine Materialab scheidung ausgelöst. Es sind unterschiedliche Laser- CVD-Verfahren bekannt, die zur Randpassivierung benutzt werden können. Aus der bereits oben angegebenen Litera turstelle D. Josif et al. ist beispielsweise als Be schichtungsmaterial SIPOS (Semi-Insulating Polysilicon) bekannt, das besonders gut zur Randpassivierung geeignet ist. Aber auch Poly-Silizium und amorphes Silizium sind geeignete Materialien.A gas mixture 8 of, for example, SiH 4 + x × N 2 O is introduced into the reaction chamber 1 . The component 6 to be coated is not heated. By irradiation with the focussed laser beam 9 , the gas is heated up over the areas to be coated, thereby triggering a material separation. Different laser CVD methods are known which can be used for edge passivation. From the literature point D. Josif et al. is known for example as coating material SIPOS (Semi-Insulating Polysilicon), which is particularly well suited for edge passivation. However, polysilicon and amorphous silicon are also suitable materials.
Für die Abscheidung von amorphem Silizium aus SiH4+x × N₂O in der Dampfphase ist aus M. Hanabusa, A. Namiki and K. Yoshihara, "Laser-induced Vapor Dispo sition of Silicon", Appl. Phys. Lett. 35 (1979), Seite 626ff. ein Verfahren bekannt, bei dem eine Laserstrahl einwirkung senkrecht zum Halbleiterbauelement erfolgt. Aus R. Bilenchi, I. Gianinoni and M. Musci, "Hydrogenated amorphous silicon growth by CO2 laser photodissociation of silane", J. Appl. Phas. 53 (1982), Seite 6479ff. und M. Meunier, T. R. Gattuso, D. Adler and J. S. Haggerty, "Hydrogenated amorphous produced by laser induced chemi cal vapor deposition of silane", Appl. Phys. Lett. 43 (1983), Seite 273ff. sind ähnliche Verfahren bekannt, bei denen die Bestrahlung parallel zum Halbleiterbauele ment, d.h. parallel zu der zu beschichtenden Fläche er folgt. Einzelheiten zur Durchführung dieser Verfahren sind der jeweils angegebenen Literatur zu entnehmen. In der Zeichnung sind beide Möglichkeiten der Bestrahlung angegeben, indem zwei Laserlichtquellen 10 dargestellt sind, wovon jedoch nur eine zur Durchführung des Verfah rens benötigt wird.For the deposition of amorphous silicon from SiH 4 + x × N₂O in the vapor phase, M. Hanabusa, A. Namiki and K. Yoshihara, "Laser-induced Vapor Disposition of Silicon", Appl. Phys. Lett. 35 (1979), page 626ff. a method is known in which a laser beam is applied perpendicular to the semiconductor device. From R. Bilenchi, I. Gianinoni and M. Musci, "Hydrogenated amorphous silicon growth by CO 2 laser photodissociation of silane", J. Appl. Phas. 53 (1982), page 6479ff. and M. Meunier, TR Gattuso, D. Adler and JS Haggerty, "Hydrogenated amorphous produced by laser induced chemical vapor deposition of silane", Appl. Phys. Lett. 43 (1983), page 273ff. Similar methods are known in which the radiation is parallel to the semiconductor component, ie it follows the surface to be coated. Details of the implementation of these processes can be found in the literature given in each case. In the drawing, both possibilities of irradiation are indicated in that two laser light sources 10 are shown, of which only one is required to carry out the method.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19873741671 DE3741671A1 (en) | 1987-12-09 | 1987-12-09 | CVD process for the edge passivation of semiconductor components |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19873741671 DE3741671A1 (en) | 1987-12-09 | 1987-12-09 | CVD process for the edge passivation of semiconductor components |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE3741671A1 true DE3741671A1 (en) | 1989-06-22 |
Family
ID=6342179
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19873741671 Withdrawn DE3741671A1 (en) | 1987-12-09 | 1987-12-09 | CVD process for the edge passivation of semiconductor components |
Country Status (1)
| Country | Link |
|---|---|
| DE (1) | DE3741671A1 (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2944118A1 (en) * | 1979-10-30 | 1981-05-14 | Heinrich-Hertz-Institut für Nachrichtentechnik Berlin GmbH, 1000 Berlin | Semiconductor selective epitaxial layer forming system - uses laser radiation with mask forming pattern for different crystal growth rates |
| EP0038178A1 (en) * | 1980-04-10 | 1981-10-21 | Fujitsu Limited | Method of manufacturing a semiconductor device containing a Schottky barrier, and device |
| EP0052277A2 (en) * | 1980-11-19 | 1982-05-26 | International Business Machines Corporation | Semiconductor device and process for producing same |
| US4431459A (en) * | 1981-07-17 | 1984-02-14 | National Semiconductor Corporation | Fabrication of MOSFETs by laser annealing through anti-reflective coating |
| US4565584A (en) * | 1982-01-29 | 1986-01-21 | Hitachi, Ltd. | Method of producing single crystal film utilizing a two-step heat treatment |
| US4599133A (en) * | 1982-05-07 | 1986-07-08 | Hitachi, Ltd. | Method of producing single-crystal silicon film |
| DE2943153C2 (en) * | 1979-10-25 | 1987-07-30 | Siemens Ag, 1000 Berlin Und 8000 Muenchen, De |
-
1987
- 1987-12-09 DE DE19873741671 patent/DE3741671A1/en not_active Withdrawn
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2943153C2 (en) * | 1979-10-25 | 1987-07-30 | Siemens Ag, 1000 Berlin Und 8000 Muenchen, De | |
| DE2944118A1 (en) * | 1979-10-30 | 1981-05-14 | Heinrich-Hertz-Institut für Nachrichtentechnik Berlin GmbH, 1000 Berlin | Semiconductor selective epitaxial layer forming system - uses laser radiation with mask forming pattern for different crystal growth rates |
| EP0038178A1 (en) * | 1980-04-10 | 1981-10-21 | Fujitsu Limited | Method of manufacturing a semiconductor device containing a Schottky barrier, and device |
| EP0052277A2 (en) * | 1980-11-19 | 1982-05-26 | International Business Machines Corporation | Semiconductor device and process for producing same |
| US4431459A (en) * | 1981-07-17 | 1984-02-14 | National Semiconductor Corporation | Fabrication of MOSFETs by laser annealing through anti-reflective coating |
| US4565584A (en) * | 1982-01-29 | 1986-01-21 | Hitachi, Ltd. | Method of producing single crystal film utilizing a two-step heat treatment |
| US4599133A (en) * | 1982-05-07 | 1986-07-08 | Hitachi, Ltd. | Method of producing single-crystal silicon film |
Non-Patent Citations (7)
| Title |
|---|
| JP-Japanese Journal of Appl.Phys., Bd.23,Nr.2,1984S.L-91-L93,Growth of Hydrogenated Amorphouse SilicFilms by Arf Excim.Laser Photodissoc. of Disilane * |
| US-VLSI Fabrication Principels,1983, S.432 * |
| US-Z: Appl. Phys.Lett. 41, H.1, 1982, S.59-61, Metal-oxide-semiconductor field-effect transistorsfabricated in laterally seeded epitaxial Si layerson SiO 2 * |
| US-Z: IEEE Transactions on Electron Devices, Vol. ED-30, Nr. 7, 1983, S.737-744, Electrical and Structural Properties of Pulse Laser-Annealed Polycrystalline Silicon Films * |
| US-Z: J. Appl.Phys. 54, Nr.8, 1983, S.4633-4640, Laser-recrystallized polycrystalline silicon resistors for integrated circiuts applications * |
| US-Z: Solid State Technology, Juni 1985,S.220-227,Laser-Induced Chemical Vapor Deposition * |
| US-Z:Appl.Phys.Lett. 42, H.9, 1983, S.809-811, Current-assisted laser annealing of polysilicon films * |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OM8 | Search report available as to paragraph 43 lit. 1 sentence 1 patent law | ||
| 8139 | Disposal/non-payment of the annual fee |